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1.1 root 1: /*
2: * QEMU MIPS Jazz support
3: *
4: * Copyright (c) 2007-2008 Hervé Poussineau
5: *
6: * Permission is hereby granted, free of charge, to any person obtaining a copy
7: * of this software and associated documentation files (the "Software"), to deal
8: * in the Software without restriction, including without limitation the rights
9: * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10: * copies of the Software, and to permit persons to whom the Software is
11: * furnished to do so, subject to the following conditions:
12: *
13: * The above copyright notice and this permission notice shall be included in
14: * all copies or substantial portions of the Software.
15: *
16: * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17: * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18: * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19: * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20: * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21: * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22: * THE SOFTWARE.
23: */
24:
25: #include "hw.h"
26: #include "mips.h"
1.1.1.4 root 27: #include "mips_cpudevs.h"
1.1 root 28: #include "pc.h"
29: #include "isa.h"
30: #include "fdc.h"
31: #include "sysemu.h"
1.1.1.5 ! root 32: #include "arch_init.h"
1.1 root 33: #include "boards.h"
34: #include "net.h"
1.1.1.3 root 35: #include "esp.h"
1.1.1.2 root 36: #include "mips-bios.h"
1.1.1.3 root 37: #include "loader.h"
1.1.1.4 root 38: #include "mc146818rtc.h"
1.1.1.5 ! root 39: #include "blockdev.h"
1.1 root 40:
41: enum jazz_model_e
42: {
43: JAZZ_MAGNUM,
44: JAZZ_PICA61,
45: };
46:
47: static void main_cpu_reset(void *opaque)
48: {
49: CPUState *env = opaque;
50: cpu_reset(env);
51: }
52:
53: static uint32_t rtc_readb(void *opaque, target_phys_addr_t addr)
54: {
1.1.1.3 root 55: return cpu_inw(0x71);
1.1 root 56: }
57:
58: static void rtc_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
59: {
1.1.1.3 root 60: cpu_outw(0x71, val & 0xff);
1.1 root 61: }
62:
1.1.1.3 root 63: static CPUReadMemoryFunc * const rtc_read[3] = {
1.1 root 64: rtc_readb,
65: rtc_readb,
66: rtc_readb,
67: };
68:
1.1.1.3 root 69: static CPUWriteMemoryFunc * const rtc_write[3] = {
1.1 root 70: rtc_writeb,
71: rtc_writeb,
72: rtc_writeb,
73: };
74:
75: static void dma_dummy_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
76: {
77: /* Nothing to do. That is only to ensure that
78: * the current DMA acknowledge cycle is completed. */
79: }
80:
1.1.1.3 root 81: static CPUReadMemoryFunc * const dma_dummy_read[3] = {
1.1 root 82: NULL,
83: NULL,
84: NULL,
85: };
86:
1.1.1.3 root 87: static CPUWriteMemoryFunc * const dma_dummy_write[3] = {
1.1 root 88: dma_dummy_writeb,
89: dma_dummy_writeb,
90: dma_dummy_writeb,
91: };
92:
93: #define MAGNUM_BIOS_SIZE_MAX 0x7e000
94: #define MAGNUM_BIOS_SIZE (BIOS_SIZE < MAGNUM_BIOS_SIZE_MAX ? BIOS_SIZE : MAGNUM_BIOS_SIZE_MAX)
95:
1.1.1.4 root 96: static void cpu_request_exit(void *opaque, int irq, int level)
97: {
98: CPUState *env = cpu_single_env;
99:
100: if (env && level) {
101: cpu_exit(env);
102: }
103: }
104:
1.1 root 105: static
1.1.1.2 root 106: void mips_jazz_init (ram_addr_t ram_size,
1.1 root 107: const char *cpu_model,
108: enum jazz_model_e jazz_model)
109: {
1.1.1.2 root 110: char *filename;
1.1 root 111: int bios_size, n;
112: CPUState *env;
113: qemu_irq *rc4030, *i8259;
114: rc4030_dma *dmas;
1.1.1.2 root 115: void* rc4030_opaque;
1.1 root 116: int s_rtc, s_dma_dummy;
1.1.1.2 root 117: NICInfo *nd;
1.1 root 118: PITState *pit;
1.1.1.3 root 119: DriveInfo *fds[MAX_FD];
1.1.1.5 ! root 120: qemu_irq esp_reset, dma_enable;
1.1.1.4 root 121: qemu_irq *cpu_exit_irq;
1.1.1.2 root 122: ram_addr_t ram_offset;
123: ram_addr_t bios_offset;
1.1 root 124:
125: /* init CPUs */
126: if (cpu_model == NULL) {
127: #ifdef TARGET_MIPS64
128: cpu_model = "R4000";
129: #else
130: /* FIXME: All wrong, this maybe should be R3000 for the older JAZZs. */
131: cpu_model = "24Kf";
132: #endif
133: }
134: env = cpu_init(cpu_model);
135: if (!env) {
136: fprintf(stderr, "Unable to find CPU definition\n");
137: exit(1);
138: }
139: qemu_register_reset(main_cpu_reset, env);
140:
141: /* allocate RAM */
1.1.1.4 root 142: ram_offset = qemu_ram_alloc(NULL, "mips_jazz.ram", ram_size);
1.1.1.2 root 143: cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
144:
1.1.1.4 root 145: bios_offset = qemu_ram_alloc(NULL, "mips_jazz.bios", MAGNUM_BIOS_SIZE);
1.1.1.2 root 146: cpu_register_physical_memory(0x1fc00000LL,
147: MAGNUM_BIOS_SIZE, bios_offset | IO_MEM_ROM);
148: cpu_register_physical_memory(0xfff00000LL,
149: MAGNUM_BIOS_SIZE, bios_offset | IO_MEM_ROM);
1.1 root 150:
151: /* load the BIOS image. */
152: if (bios_name == NULL)
153: bios_name = BIOS_FILENAME;
1.1.1.2 root 154: filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
155: if (filename) {
156: bios_size = load_image_targphys(filename, 0xfff00000LL,
157: MAGNUM_BIOS_SIZE);
158: qemu_free(filename);
159: } else {
160: bios_size = -1;
161: }
1.1 root 162: if (bios_size < 0 || bios_size > MAGNUM_BIOS_SIZE) {
163: fprintf(stderr, "qemu: Could not load MIPS bios '%s'\n",
1.1.1.2 root 164: bios_name);
1.1 root 165: exit(1);
166: }
167:
168: /* Init CPU internal devices */
169: cpu_mips_irq_init_cpu(env);
170: cpu_mips_clock_init(env);
171:
172: /* Chipset */
1.1.1.2 root 173: rc4030_opaque = rc4030_init(env->irq[6], env->irq[3], &rc4030, &dmas);
1.1.1.5 ! root 174: s_dma_dummy = cpu_register_io_memory(dma_dummy_read, dma_dummy_write, NULL,
! 175: DEVICE_NATIVE_ENDIAN);
1.1 root 176: cpu_register_physical_memory(0x8000d000, 0x00001000, s_dma_dummy);
177:
178: /* ISA devices */
179: i8259 = i8259_init(env->irq[4]);
1.1.1.3 root 180: isa_bus_new(NULL);
181: isa_bus_irqs(i8259);
1.1.1.4 root 182: cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
183: DMA_init(0, cpu_exit_irq);
1.1 root 184: pit = pit_init(0x40, i8259[0]);
185: pcspk_init(pit);
186:
187: /* ISA IO space at 0x90000000 */
1.1.1.5 ! root 188: isa_mmio_init(0x90000000, 0x01000000);
1.1 root 189: isa_mem_base = 0x11000000;
190:
191: /* Video card */
192: switch (jazz_model) {
193: case JAZZ_MAGNUM:
1.1.1.2 root 194: g364fb_mm_init(0x40000000, 0x60000000, 0, rc4030[3]);
1.1 root 195: break;
196: case JAZZ_PICA61:
1.1.1.2 root 197: isa_vga_mm_init(0x40000000, 0x60000000, 0);
1.1 root 198: break;
199: default:
200: break;
201: }
202:
203: /* Network controller */
1.1.1.2 root 204: for (n = 0; n < nb_nics; n++) {
205: nd = &nd_table[n];
206: if (!nd->model)
1.1.1.3 root 207: nd->model = qemu_strdup("dp83932");
1.1.1.2 root 208: if (strcmp(nd->model, "dp83932") == 0) {
209: dp83932_init(nd, 0x80001000, 2, rc4030[4],
210: rc4030_opaque, rc4030_dma_memory_rw);
211: break;
212: } else if (strcmp(nd->model, "?") == 0) {
213: fprintf(stderr, "qemu: Supported NICs: dp83932\n");
214: exit(1);
215: } else {
216: fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
217: exit(1);
1.1 root 218: }
219: }
220:
1.1.1.2 root 221: /* SCSI adapter */
222: esp_init(0x80002000, 0,
223: rc4030_dma_read, rc4030_dma_write, dmas[0],
1.1.1.5 ! root 224: rc4030[5], &esp_reset, &dma_enable);
1.1.1.2 root 225:
1.1 root 226: /* Floppy */
227: if (drive_get_max_bus(IF_FLOPPY) >= MAX_FD) {
228: fprintf(stderr, "qemu: too many floppy drives\n");
229: exit(1);
230: }
231: for (n = 0; n < MAX_FD; n++) {
1.1.1.3 root 232: fds[n] = drive_get(IF_FLOPPY, 0, n);
1.1 root 233: }
1.1.1.3 root 234: fdctrl_init_sysbus(rc4030[1], 0, 0x80003000, fds);
1.1 root 235:
236: /* Real time clock */
1.1.1.4 root 237: rtc_init(1980, NULL);
1.1.1.5 ! root 238: s_rtc = cpu_register_io_memory(rtc_read, rtc_write, NULL,
! 239: DEVICE_NATIVE_ENDIAN);
1.1 root 240: cpu_register_physical_memory(0x80004000, 0x00001000, s_rtc);
241:
242: /* Keyboard (i8042) */
243: i8042_mm_init(rc4030[6], rc4030[7], 0x80005000, 0x1000, 0x1);
244:
245: /* Serial ports */
1.1.1.4 root 246: if (serial_hds[0]) {
247: #ifdef TARGET_WORDS_BIGENDIAN
248: serial_mm_init(0x80006000, 0, rc4030[8], 8000000/16, serial_hds[0], 1, 1);
249: #else
250: serial_mm_init(0x80006000, 0, rc4030[8], 8000000/16, serial_hds[0], 1, 0);
251: #endif
252: }
253: if (serial_hds[1]) {
254: #ifdef TARGET_WORDS_BIGENDIAN
255: serial_mm_init(0x80007000, 0, rc4030[9], 8000000/16, serial_hds[1], 1, 1);
256: #else
257: serial_mm_init(0x80007000, 0, rc4030[9], 8000000/16, serial_hds[1], 1, 0);
258: #endif
259: }
1.1 root 260:
261: /* Parallel port */
262: if (parallel_hds[0])
263: parallel_mm_init(0x80008000, 0, rc4030[0], parallel_hds[0]);
264:
265: /* Sound card */
266: /* FIXME: missing Jazz sound at 0x8000c000, rc4030[2] */
1.1.1.5 ! root 267: audio_init(i8259, NULL);
1.1 root 268:
269: /* NVRAM: Unprotected at 0x9000, Protected at 0xa000, Read only at 0xb000 */
270: ds1225y_init(0x80009000, "nvram");
271:
272: /* LED indicator */
273: jazz_led_init(0x8000f000);
274: }
275:
276: static
1.1.1.2 root 277: void mips_magnum_init (ram_addr_t ram_size,
1.1 root 278: const char *boot_device,
279: const char *kernel_filename, const char *kernel_cmdline,
280: const char *initrd_filename, const char *cpu_model)
281: {
1.1.1.2 root 282: mips_jazz_init(ram_size, cpu_model, JAZZ_MAGNUM);
1.1 root 283: }
284:
285: static
1.1.1.2 root 286: void mips_pica61_init (ram_addr_t ram_size,
1.1 root 287: const char *boot_device,
288: const char *kernel_filename, const char *kernel_cmdline,
289: const char *initrd_filename, const char *cpu_model)
290: {
1.1.1.2 root 291: mips_jazz_init(ram_size, cpu_model, JAZZ_PICA61);
1.1 root 292: }
293:
1.1.1.2 root 294: static QEMUMachine mips_magnum_machine = {
1.1 root 295: .name = "magnum",
296: .desc = "MIPS Magnum",
297: .init = mips_magnum_init,
298: .use_scsi = 1,
299: };
300:
1.1.1.2 root 301: static QEMUMachine mips_pica61_machine = {
1.1 root 302: .name = "pica61",
303: .desc = "Acer Pica 61",
304: .init = mips_pica61_init,
305: .use_scsi = 1,
306: };
1.1.1.2 root 307:
308: static void mips_jazz_machine_init(void)
309: {
310: qemu_register_machine(&mips_magnum_machine);
311: qemu_register_machine(&mips_pica61_machine);
312: }
313:
314: machine_init(mips_jazz_machine_init);
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