Annotation of qemu/hw/mips_jazz.c, revision 1.1.1.6

1.1       root        1: /*
                      2:  * QEMU MIPS Jazz support
                      3:  *
                      4:  * Copyright (c) 2007-2008 HervĂ© Poussineau
                      5:  *
                      6:  * Permission is hereby granted, free of charge, to any person obtaining a copy
                      7:  * of this software and associated documentation files (the "Software"), to deal
                      8:  * in the Software without restriction, including without limitation the rights
                      9:  * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
                     10:  * copies of the Software, and to permit persons to whom the Software is
                     11:  * furnished to do so, subject to the following conditions:
                     12:  *
                     13:  * The above copyright notice and this permission notice shall be included in
                     14:  * all copies or substantial portions of the Software.
                     15:  *
                     16:  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
                     17:  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
                     18:  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
                     19:  * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
                     20:  * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
                     21:  * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
                     22:  * THE SOFTWARE.
                     23:  */
                     24: 
                     25: #include "hw.h"
                     26: #include "mips.h"
1.1.1.4   root       27: #include "mips_cpudevs.h"
1.1       root       28: #include "pc.h"
                     29: #include "isa.h"
                     30: #include "fdc.h"
                     31: #include "sysemu.h"
1.1.1.5   root       32: #include "arch_init.h"
1.1       root       33: #include "boards.h"
                     34: #include "net.h"
1.1.1.3   root       35: #include "esp.h"
1.1.1.2   root       36: #include "mips-bios.h"
1.1.1.3   root       37: #include "loader.h"
1.1.1.4   root       38: #include "mc146818rtc.h"
1.1.1.5   root       39: #include "blockdev.h"
1.1.1.6 ! root       40: #include "sysbus.h"
1.1       root       41: 
                     42: enum jazz_model_e
                     43: {
                     44:     JAZZ_MAGNUM,
                     45:     JAZZ_PICA61,
                     46: };
                     47: 
                     48: static void main_cpu_reset(void *opaque)
                     49: {
                     50:     CPUState *env = opaque;
                     51:     cpu_reset(env);
                     52: }
                     53: 
                     54: static uint32_t rtc_readb(void *opaque, target_phys_addr_t addr)
                     55: {
1.1.1.3   root       56:     return cpu_inw(0x71);
1.1       root       57: }
                     58: 
                     59: static void rtc_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
                     60: {
1.1.1.3   root       61:     cpu_outw(0x71, val & 0xff);
1.1       root       62: }
                     63: 
1.1.1.3   root       64: static CPUReadMemoryFunc * const rtc_read[3] = {
1.1       root       65:     rtc_readb,
                     66:     rtc_readb,
                     67:     rtc_readb,
                     68: };
                     69: 
1.1.1.3   root       70: static CPUWriteMemoryFunc * const rtc_write[3] = {
1.1       root       71:     rtc_writeb,
                     72:     rtc_writeb,
                     73:     rtc_writeb,
                     74: };
                     75: 
                     76: static void dma_dummy_writeb(void *opaque, target_phys_addr_t addr, uint32_t val)
                     77: {
                     78:     /* Nothing to do. That is only to ensure that
                     79:      * the current DMA acknowledge cycle is completed. */
                     80: }
                     81: 
1.1.1.3   root       82: static CPUReadMemoryFunc * const dma_dummy_read[3] = {
1.1       root       83:     NULL,
                     84:     NULL,
                     85:     NULL,
                     86: };
                     87: 
1.1.1.3   root       88: static CPUWriteMemoryFunc * const dma_dummy_write[3] = {
1.1       root       89:     dma_dummy_writeb,
                     90:     dma_dummy_writeb,
                     91:     dma_dummy_writeb,
                     92: };
                     93: 
                     94: #define MAGNUM_BIOS_SIZE_MAX 0x7e000
                     95: #define MAGNUM_BIOS_SIZE (BIOS_SIZE < MAGNUM_BIOS_SIZE_MAX ? BIOS_SIZE : MAGNUM_BIOS_SIZE_MAX)
                     96: 
1.1.1.4   root       97: static void cpu_request_exit(void *opaque, int irq, int level)
                     98: {
                     99:     CPUState *env = cpu_single_env;
                    100: 
                    101:     if (env && level) {
                    102:         cpu_exit(env);
                    103:     }
                    104: }
                    105: 
1.1       root      106: static
1.1.1.2   root      107: void mips_jazz_init (ram_addr_t ram_size,
1.1       root      108:                      const char *cpu_model,
                    109:                      enum jazz_model_e jazz_model)
                    110: {
1.1.1.2   root      111:     char *filename;
1.1       root      112:     int bios_size, n;
                    113:     CPUState *env;
                    114:     qemu_irq *rc4030, *i8259;
                    115:     rc4030_dma *dmas;
1.1.1.2   root      116:     void* rc4030_opaque;
1.1       root      117:     int s_rtc, s_dma_dummy;
1.1.1.2   root      118:     NICInfo *nd;
1.1.1.6 ! root      119:     DeviceState *dev;
        !           120:     SysBusDevice *sysbus;
        !           121:     ISADevice *pit;
1.1.1.3   root      122:     DriveInfo *fds[MAX_FD];
1.1.1.5   root      123:     qemu_irq esp_reset, dma_enable;
1.1.1.4   root      124:     qemu_irq *cpu_exit_irq;
1.1.1.2   root      125:     ram_addr_t ram_offset;
                    126:     ram_addr_t bios_offset;
1.1       root      127: 
                    128:     /* init CPUs */
                    129:     if (cpu_model == NULL) {
                    130: #ifdef TARGET_MIPS64
                    131:         cpu_model = "R4000";
                    132: #else
                    133:         /* FIXME: All wrong, this maybe should be R3000 for the older JAZZs. */
                    134:         cpu_model = "24Kf";
                    135: #endif
                    136:     }
                    137:     env = cpu_init(cpu_model);
                    138:     if (!env) {
                    139:         fprintf(stderr, "Unable to find CPU definition\n");
                    140:         exit(1);
                    141:     }
                    142:     qemu_register_reset(main_cpu_reset, env);
                    143: 
                    144:     /* allocate RAM */
1.1.1.4   root      145:     ram_offset = qemu_ram_alloc(NULL, "mips_jazz.ram", ram_size);
1.1.1.2   root      146:     cpu_register_physical_memory(0, ram_size, ram_offset | IO_MEM_RAM);
                    147: 
1.1.1.4   root      148:     bios_offset = qemu_ram_alloc(NULL, "mips_jazz.bios", MAGNUM_BIOS_SIZE);
1.1.1.2   root      149:     cpu_register_physical_memory(0x1fc00000LL,
                    150:                                  MAGNUM_BIOS_SIZE, bios_offset | IO_MEM_ROM);
                    151:     cpu_register_physical_memory(0xfff00000LL,
                    152:                                  MAGNUM_BIOS_SIZE, bios_offset | IO_MEM_ROM);
1.1       root      153: 
                    154:     /* load the BIOS image. */
                    155:     if (bios_name == NULL)
                    156:         bios_name = BIOS_FILENAME;
1.1.1.2   root      157:     filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
                    158:     if (filename) {
                    159:         bios_size = load_image_targphys(filename, 0xfff00000LL,
                    160:                                         MAGNUM_BIOS_SIZE);
                    161:         qemu_free(filename);
                    162:     } else {
                    163:         bios_size = -1;
                    164:     }
1.1       root      165:     if (bios_size < 0 || bios_size > MAGNUM_BIOS_SIZE) {
                    166:         fprintf(stderr, "qemu: Could not load MIPS bios '%s'\n",
1.1.1.2   root      167:                 bios_name);
1.1       root      168:         exit(1);
                    169:     }
                    170: 
                    171:     /* Init CPU internal devices */
                    172:     cpu_mips_irq_init_cpu(env);
                    173:     cpu_mips_clock_init(env);
                    174: 
                    175:     /* Chipset */
1.1.1.2   root      176:     rc4030_opaque = rc4030_init(env->irq[6], env->irq[3], &rc4030, &dmas);
1.1.1.5   root      177:     s_dma_dummy = cpu_register_io_memory(dma_dummy_read, dma_dummy_write, NULL,
                    178:                                          DEVICE_NATIVE_ENDIAN);
1.1       root      179:     cpu_register_physical_memory(0x8000d000, 0x00001000, s_dma_dummy);
                    180: 
                    181:     /* ISA devices */
                    182:     i8259 = i8259_init(env->irq[4]);
1.1.1.3   root      183:     isa_bus_new(NULL);
                    184:     isa_bus_irqs(i8259);
1.1.1.4   root      185:     cpu_exit_irq = qemu_allocate_irqs(cpu_request_exit, NULL, 1);
                    186:     DMA_init(0, cpu_exit_irq);
1.1.1.6 ! root      187:     pit = pit_init(0x40, 0);
1.1       root      188:     pcspk_init(pit);
                    189: 
                    190:     /* ISA IO space at 0x90000000 */
1.1.1.5   root      191:     isa_mmio_init(0x90000000, 0x01000000);
1.1       root      192:     isa_mem_base = 0x11000000;
                    193: 
                    194:     /* Video card */
                    195:     switch (jazz_model) {
                    196:     case JAZZ_MAGNUM:
1.1.1.2   root      197:         g364fb_mm_init(0x40000000, 0x60000000, 0, rc4030[3]);
1.1       root      198:         break;
                    199:     case JAZZ_PICA61:
1.1.1.2   root      200:         isa_vga_mm_init(0x40000000, 0x60000000, 0);
1.1       root      201:         break;
                    202:     default:
                    203:         break;
                    204:     }
                    205: 
                    206:     /* Network controller */
1.1.1.2   root      207:     for (n = 0; n < nb_nics; n++) {
                    208:         nd = &nd_table[n];
                    209:         if (!nd->model)
1.1.1.3   root      210:             nd->model = qemu_strdup("dp83932");
1.1.1.2   root      211:         if (strcmp(nd->model, "dp83932") == 0) {
                    212:             dp83932_init(nd, 0x80001000, 2, rc4030[4],
                    213:                          rc4030_opaque, rc4030_dma_memory_rw);
                    214:             break;
                    215:         } else if (strcmp(nd->model, "?") == 0) {
                    216:             fprintf(stderr, "qemu: Supported NICs: dp83932\n");
                    217:             exit(1);
                    218:         } else {
                    219:             fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
                    220:             exit(1);
1.1       root      221:         }
                    222:     }
                    223: 
1.1.1.2   root      224:     /* SCSI adapter */
                    225:     esp_init(0x80002000, 0,
                    226:              rc4030_dma_read, rc4030_dma_write, dmas[0],
1.1.1.5   root      227:              rc4030[5], &esp_reset, &dma_enable);
1.1.1.2   root      228: 
1.1       root      229:     /* Floppy */
                    230:     if (drive_get_max_bus(IF_FLOPPY) >= MAX_FD) {
                    231:         fprintf(stderr, "qemu: too many floppy drives\n");
                    232:         exit(1);
                    233:     }
                    234:     for (n = 0; n < MAX_FD; n++) {
1.1.1.3   root      235:         fds[n] = drive_get(IF_FLOPPY, 0, n);
1.1       root      236:     }
1.1.1.3   root      237:     fdctrl_init_sysbus(rc4030[1], 0, 0x80003000, fds);
1.1       root      238: 
                    239:     /* Real time clock */
1.1.1.4   root      240:     rtc_init(1980, NULL);
1.1.1.5   root      241:     s_rtc = cpu_register_io_memory(rtc_read, rtc_write, NULL,
                    242:                                    DEVICE_NATIVE_ENDIAN);
1.1       root      243:     cpu_register_physical_memory(0x80004000, 0x00001000, s_rtc);
                    244: 
                    245:     /* Keyboard (i8042) */
                    246:     i8042_mm_init(rc4030[6], rc4030[7], 0x80005000, 0x1000, 0x1);
                    247: 
                    248:     /* Serial ports */
1.1.1.4   root      249:     if (serial_hds[0]) {
                    250: #ifdef TARGET_WORDS_BIGENDIAN
                    251:         serial_mm_init(0x80006000, 0, rc4030[8], 8000000/16, serial_hds[0], 1, 1);
                    252: #else
                    253:         serial_mm_init(0x80006000, 0, rc4030[8], 8000000/16, serial_hds[0], 1, 0);
                    254: #endif
                    255:     }
                    256:     if (serial_hds[1]) {
                    257: #ifdef TARGET_WORDS_BIGENDIAN
                    258:         serial_mm_init(0x80007000, 0, rc4030[9], 8000000/16, serial_hds[1], 1, 1);
                    259: #else
                    260:         serial_mm_init(0x80007000, 0, rc4030[9], 8000000/16, serial_hds[1], 1, 0);
                    261: #endif
                    262:     }
1.1       root      263: 
                    264:     /* Parallel port */
                    265:     if (parallel_hds[0])
                    266:         parallel_mm_init(0x80008000, 0, rc4030[0], parallel_hds[0]);
                    267: 
                    268:     /* Sound card */
                    269:     /* FIXME: missing Jazz sound at 0x8000c000, rc4030[2] */
1.1.1.5   root      270:     audio_init(i8259, NULL);
1.1       root      271: 
1.1.1.6 ! root      272:     /* NVRAM */
        !           273:     dev = qdev_create(NULL, "ds1225y");
        !           274:     qdev_init_nofail(dev);
        !           275:     sysbus = sysbus_from_qdev(dev);
        !           276:     sysbus_mmio_map(sysbus, 0, 0x80009000);
1.1       root      277: 
                    278:     /* LED indicator */
                    279:     jazz_led_init(0x8000f000);
                    280: }
                    281: 
                    282: static
1.1.1.2   root      283: void mips_magnum_init (ram_addr_t ram_size,
1.1       root      284:                        const char *boot_device,
                    285:                        const char *kernel_filename, const char *kernel_cmdline,
                    286:                        const char *initrd_filename, const char *cpu_model)
                    287: {
1.1.1.2   root      288:     mips_jazz_init(ram_size, cpu_model, JAZZ_MAGNUM);
1.1       root      289: }
                    290: 
                    291: static
1.1.1.2   root      292: void mips_pica61_init (ram_addr_t ram_size,
1.1       root      293:                        const char *boot_device,
                    294:                        const char *kernel_filename, const char *kernel_cmdline,
                    295:                        const char *initrd_filename, const char *cpu_model)
                    296: {
1.1.1.2   root      297:     mips_jazz_init(ram_size, cpu_model, JAZZ_PICA61);
1.1       root      298: }
                    299: 
1.1.1.2   root      300: static QEMUMachine mips_magnum_machine = {
1.1       root      301:     .name = "magnum",
                    302:     .desc = "MIPS Magnum",
                    303:     .init = mips_magnum_init,
                    304:     .use_scsi = 1,
                    305: };
                    306: 
1.1.1.2   root      307: static QEMUMachine mips_pica61_machine = {
1.1       root      308:     .name = "pica61",
                    309:     .desc = "Acer Pica 61",
                    310:     .init = mips_pica61_init,
                    311:     .use_scsi = 1,
                    312: };
1.1.1.2   root      313: 
                    314: static void mips_jazz_machine_init(void)
                    315: {
                    316:     qemu_register_machine(&mips_magnum_machine);
                    317:     qemu_register_machine(&mips_pica61_machine);
                    318: }
                    319: 
                    320: machine_init(mips_jazz_machine_init);

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