Annotation of qemu/hw/omap_clk.c, revision 1.1.1.1

1.1       root        1: /*
                      2:  * OMAP clocks.
                      3:  *
                      4:  * Copyright (C) 2006-2008 Andrzej Zaborowski  <balrog@zabor.org>
                      5:  *
                      6:  * Clocks data comes in part from arch/arm/mach-omap1/clock.h in Linux.
                      7:  *
                      8:  * This program is free software; you can redistribute it and/or
                      9:  * modify it under the terms of the GNU General Public License as
                     10:  * published by the Free Software Foundation; either version 2 of
                     11:  * the License, or (at your option) any later version.
                     12:  *
                     13:  * This program is distributed in the hope that it will be useful,
                     14:  * but WITHOUT ANY WARRANTY; without even the implied warranty of
                     15:  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
                     16:  * GNU General Public License for more details.
                     17:  *
                     18:  * You should have received a copy of the GNU General Public License along
                     19:  * with this program; if not, write to the Free Software Foundation, Inc.,
                     20:  * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
                     21:  */
                     22: #include "hw.h"
                     23: #include "omap.h"
                     24: 
                     25: struct clk {
                     26:     const char *name;
                     27:     const char *alias;
                     28:     struct clk *parent;
                     29:     struct clk *child1;
                     30:     struct clk *sibling;
                     31: #define ALWAYS_ENABLED         (1 << 0)
                     32: #define CLOCK_IN_OMAP310       (1 << 10)
                     33: #define CLOCK_IN_OMAP730       (1 << 11)
                     34: #define CLOCK_IN_OMAP1510      (1 << 12)
                     35: #define CLOCK_IN_OMAP16XX      (1 << 13)
                     36: #define CLOCK_IN_OMAP242X      (1 << 14)
                     37: #define CLOCK_IN_OMAP243X      (1 << 15)
                     38: #define CLOCK_IN_OMAP343X      (1 << 16)
                     39:     uint32_t flags;
                     40:     int id;
                     41: 
                     42:     int running;               /* Is currently ticking */
                     43:     int enabled;               /* Is enabled, regardless of its input clk */
                     44:     unsigned long rate;                /* Current rate (if .running) */
                     45:     unsigned int divisor;      /* Rate relative to input (if .enabled) */
                     46:     unsigned int multiplier;   /* Rate relative to input (if .enabled) */
                     47:     qemu_irq users[16];                /* Who to notify on change */
                     48:     int usecount;              /* Automatically idle when unused */
                     49: };
                     50: 
                     51: static struct clk xtal_osc12m = {
                     52:     .name      = "xtal_osc_12m",
                     53:     .rate      = 12000000,
                     54:     .flags     = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
                     55: };
                     56: 
                     57: static struct clk xtal_osc32k = {
                     58:     .name      = "xtal_osc_32k",
                     59:     .rate      = 32768,
                     60:     .flags     = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
                     61:             CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                     62: };
                     63: 
                     64: static struct clk ck_ref = {
                     65:     .name      = "ck_ref",
                     66:     .alias     = "clkin",
                     67:     .parent    = &xtal_osc12m,
                     68:     .flags     = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
                     69:             ALWAYS_ENABLED,
                     70: };
                     71: 
                     72: /* If a dpll is disabled it becomes a bypass, child clocks don't stop */
                     73: static struct clk dpll1 = {
                     74:     .name      = "dpll1",
                     75:     .parent    = &ck_ref,
                     76:     .flags     = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
                     77:             ALWAYS_ENABLED,
                     78: };
                     79: 
                     80: static struct clk dpll2 = {
                     81:     .name      = "dpll2",
                     82:     .parent    = &ck_ref,
                     83:     .flags     = CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
                     84: };
                     85: 
                     86: static struct clk dpll3 = {
                     87:     .name      = "dpll3",
                     88:     .parent    = &ck_ref,
                     89:     .flags     = CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
                     90: };
                     91: 
                     92: static struct clk dpll4 = {
                     93:     .name      = "dpll4",
                     94:     .parent    = &ck_ref,
                     95:     .multiplier        = 4,
                     96:     .flags     = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
                     97: };
                     98: 
                     99: static struct clk apll = {
                    100:     .name      = "apll",
                    101:     .parent    = &ck_ref,
                    102:     .multiplier        = 48,
                    103:     .divisor   = 12,
                    104:     .flags     = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
                    105: };
                    106: 
                    107: static struct clk ck_48m = {
                    108:     .name      = "ck_48m",
                    109:     .parent    = &dpll4,       /* either dpll4 or apll */
                    110:     .flags     = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
                    111: };
                    112: 
                    113: static struct clk ck_dpll1out = {
                    114:     .name      = "ck_dpll1out",
                    115:     .parent    = &dpll1,
                    116:     .flags     = CLOCK_IN_OMAP16XX,
                    117: };
                    118: 
                    119: static struct clk sossi_ck = {
                    120:     .name      = "ck_sossi",
                    121:     .parent    = &ck_dpll1out,
                    122:     .flags     = CLOCK_IN_OMAP16XX,
                    123: };
                    124: 
                    125: static struct clk clkm1 = {
                    126:     .name      = "clkm1",
                    127:     .alias     = "ck_gen1",
                    128:     .parent    = &dpll1,
                    129:     .flags     = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
                    130:             ALWAYS_ENABLED,
                    131: };
                    132: 
                    133: static struct clk clkm2 = {
                    134:     .name      = "clkm2",
                    135:     .alias     = "ck_gen2",
                    136:     .parent    = &dpll1,
                    137:     .flags     = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
                    138:             ALWAYS_ENABLED,
                    139: };
                    140: 
                    141: static struct clk clkm3 = {
                    142:     .name      = "clkm3",
                    143:     .alias     = "ck_gen3",
                    144:     .parent    = &dpll1,       /* either dpll1 or ck_ref */
                    145:     .flags     = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
                    146:             ALWAYS_ENABLED,
                    147: };
                    148: 
                    149: static struct clk arm_ck = {
                    150:     .name      = "arm_ck",
                    151:     .alias     = "mpu_ck",
                    152:     .parent    = &clkm1,
                    153:     .flags     = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
                    154:             ALWAYS_ENABLED,
                    155: };
                    156: 
                    157: static struct clk armper_ck = {
                    158:     .name      = "armper_ck",
                    159:     .alias     = "mpuper_ck",
                    160:     .parent    = &clkm1,
                    161:     .flags     = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
                    162: };
                    163: 
                    164: static struct clk arm_gpio_ck = {
                    165:     .name      = "arm_gpio_ck",
                    166:     .alias     = "mpu_gpio_ck",
                    167:     .parent    = &clkm1,
                    168:     .divisor   = 1,
                    169:     .flags     = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
                    170: };
                    171: 
                    172: static struct clk armxor_ck = {
                    173:     .name      = "armxor_ck",
                    174:     .alias     = "mpuxor_ck",
                    175:     .parent    = &ck_ref,
                    176:     .flags     = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
                    177: };
                    178: 
                    179: static struct clk armtim_ck = {
                    180:     .name      = "armtim_ck",
                    181:     .alias     = "mputim_ck",
                    182:     .parent    = &ck_ref,      /* either CLKIN or DPLL1 */
                    183:     .flags     = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
                    184: };
                    185: 
                    186: static struct clk armwdt_ck = {
                    187:     .name      = "armwdt_ck",
                    188:     .alias     = "mpuwd_ck",
                    189:     .parent    = &clkm1,
                    190:     .divisor   = 14,
                    191:     .flags     = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
                    192:             ALWAYS_ENABLED,
                    193: };
                    194: 
                    195: static struct clk arminth_ck16xx = {
                    196:     .name      = "arminth_ck",
                    197:     .parent    = &arm_ck,
                    198:     .flags     = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
                    199:     /* Note: On 16xx the frequency can be divided by 2 by programming
                    200:      * ARM_CKCTL:ARM_INTHCK_SEL(14) to 1
                    201:      *
                    202:      * 1510 version is in TC clocks.
                    203:      */
                    204: };
                    205: 
                    206: static struct clk dsp_ck = {
                    207:     .name      = "dsp_ck",
                    208:     .parent    = &clkm2,
                    209:     .flags     = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
                    210: };
                    211: 
                    212: static struct clk dspmmu_ck = {
                    213:     .name      = "dspmmu_ck",
                    214:     .parent    = &clkm2,
                    215:     .flags     = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
                    216:             ALWAYS_ENABLED,
                    217: };
                    218: 
                    219: static struct clk dspper_ck = {
                    220:     .name      = "dspper_ck",
                    221:     .parent    = &clkm2,
                    222:     .flags     = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
                    223: };
                    224: 
                    225: static struct clk dspxor_ck = {
                    226:     .name      = "dspxor_ck",
                    227:     .parent    = &ck_ref,
                    228:     .flags     = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
                    229: };
                    230: 
                    231: static struct clk dsptim_ck = {
                    232:     .name      = "dsptim_ck",
                    233:     .parent    = &ck_ref,
                    234:     .flags     = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
                    235: };
                    236: 
                    237: static struct clk tc_ck = {
                    238:     .name      = "tc_ck",
                    239:     .parent    = &clkm3,
                    240:     .flags     = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
                    241:             CLOCK_IN_OMAP730 | CLOCK_IN_OMAP310 |
                    242:             ALWAYS_ENABLED,
                    243: };
                    244: 
                    245: static struct clk arminth_ck15xx = {
                    246:     .name      = "arminth_ck",
                    247:     .parent    = &tc_ck,
                    248:     .flags     = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
                    249:     /* Note: On 1510 the frequency follows TC_CK
                    250:      *
                    251:      * 16xx version is in MPU clocks.
                    252:      */
                    253: };
                    254: 
                    255: static struct clk tipb_ck = {
                    256:     /* No-idle controlled by "tc_ck" */
                    257:     .name      = "tipb_ck",
                    258:     .parent    = &tc_ck,
                    259:     .flags     = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
                    260: };
                    261: 
                    262: static struct clk l3_ocpi_ck = {
                    263:     /* No-idle controlled by "tc_ck" */
                    264:     .name      = "l3_ocpi_ck",
                    265:     .parent    = &tc_ck,
                    266:     .flags     = CLOCK_IN_OMAP16XX,
                    267: };
                    268: 
                    269: static struct clk tc1_ck = {
                    270:     .name      = "tc1_ck",
                    271:     .parent    = &tc_ck,
                    272:     .flags     = CLOCK_IN_OMAP16XX,
                    273: };
                    274: 
                    275: static struct clk tc2_ck = {
                    276:     .name      = "tc2_ck",
                    277:     .parent    = &tc_ck,
                    278:     .flags     = CLOCK_IN_OMAP16XX,
                    279: };
                    280: 
                    281: static struct clk dma_ck = {
                    282:     /* No-idle controlled by "tc_ck" */
                    283:     .name      = "dma_ck",
                    284:     .parent    = &tc_ck,
                    285:     .flags     = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
                    286:             ALWAYS_ENABLED,
                    287: };
                    288: 
                    289: static struct clk dma_lcdfree_ck = {
                    290:     .name      = "dma_lcdfree_ck",
                    291:     .parent    = &tc_ck,
                    292:     .flags     = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
                    293: };
                    294: 
                    295: static struct clk api_ck = {
                    296:     .name      = "api_ck",
                    297:     .alias     = "mpui_ck",
                    298:     .parent    = &tc_ck,
                    299:     .flags     = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
                    300: };
                    301: 
                    302: static struct clk lb_ck = {
                    303:     .name      = "lb_ck",
                    304:     .parent    = &tc_ck,
                    305:     .flags     = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
                    306: };
                    307: 
                    308: static struct clk lbfree_ck = {
                    309:     .name      = "lbfree_ck",
                    310:     .parent    = &tc_ck,
                    311:     .flags     = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
                    312: };
                    313: 
                    314: static struct clk hsab_ck = {
                    315:     .name      = "hsab_ck",
                    316:     .parent    = &tc_ck,
                    317:     .flags     = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
                    318: };
                    319: 
                    320: static struct clk rhea1_ck = {
                    321:     .name      = "rhea1_ck",
                    322:     .parent    = &tc_ck,
                    323:     .flags     = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
                    324: };
                    325: 
                    326: static struct clk rhea2_ck = {
                    327:     .name      = "rhea2_ck",
                    328:     .parent    = &tc_ck,
                    329:     .flags     = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
                    330: };
                    331: 
                    332: static struct clk lcd_ck_16xx = {
                    333:     .name      = "lcd_ck",
                    334:     .parent    = &clkm3,
                    335:     .flags     = CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP730,
                    336: };
                    337: 
                    338: static struct clk lcd_ck_1510 = {
                    339:     .name      = "lcd_ck",
                    340:     .parent    = &clkm3,
                    341:     .flags     = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
                    342: };
                    343: 
                    344: static struct clk uart1_1510 = {
                    345:     .name      = "uart1_ck",
                    346:     /* Direct from ULPD, no real parent */
                    347:     .parent    = &armper_ck,   /* either armper_ck or dpll4 */
                    348:     .rate      = 12000000,
                    349:     .flags     = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
                    350: };
                    351: 
                    352: static struct clk uart1_16xx = {
                    353:     .name      = "uart1_ck",
                    354:     /* Direct from ULPD, no real parent */
                    355:     .parent    = &armper_ck,
                    356:     .rate      = 48000000,
                    357:     .flags     = CLOCK_IN_OMAP16XX,
                    358: };
                    359: 
                    360: static struct clk uart2_ck = {
                    361:     .name      = "uart2_ck",
                    362:     /* Direct from ULPD, no real parent */
                    363:     .parent    = &armper_ck,   /* either armper_ck or dpll4 */
                    364:     .rate      = 12000000,
                    365:     .flags     = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310 |
                    366:             ALWAYS_ENABLED,
                    367: };
                    368: 
                    369: static struct clk uart3_1510 = {
                    370:     .name      = "uart3_ck",
                    371:     /* Direct from ULPD, no real parent */
                    372:     .parent    = &armper_ck,   /* either armper_ck or dpll4 */
                    373:     .rate      = 12000000,
                    374:     .flags     = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310 | ALWAYS_ENABLED,
                    375: };
                    376: 
                    377: static struct clk uart3_16xx = {
                    378:     .name      = "uart3_ck",
                    379:     /* Direct from ULPD, no real parent */
                    380:     .parent    = &armper_ck,
                    381:     .rate      = 48000000,
                    382:     .flags     = CLOCK_IN_OMAP16XX,
                    383: };
                    384: 
                    385: static struct clk usb_clk0 = { /* 6 MHz output on W4_USB_CLK0 */
                    386:     .name      = "usb_clk0",
                    387:     .alias     = "usb.clko",
                    388:     /* Direct from ULPD, no parent */
                    389:     .rate      = 6000000,
                    390:     .flags     = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
                    391: };
                    392: 
                    393: static struct clk usb_hhc_ck1510 = {
                    394:     .name      = "usb_hhc_ck",
                    395:     /* Direct from ULPD, no parent */
                    396:     .rate      = 48000000, /* Actually 2 clocks, 12MHz and 48MHz */
                    397:     .flags     = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP310,
                    398: };
                    399: 
                    400: static struct clk usb_hhc_ck16xx = {
                    401:     .name      = "usb_hhc_ck",
                    402:     /* Direct from ULPD, no parent */
                    403:     .rate      = 48000000,
                    404:     /* OTG_SYSCON_2.OTG_PADEN == 0 (not 1510-compatible) */
                    405:     .flags     = CLOCK_IN_OMAP16XX,
                    406: };
                    407: 
                    408: static struct clk usb_w2fc_mclk = {
                    409:     .name      = "usb_w2fc_mclk",
                    410:     .alias     = "usb_w2fc_ck",
                    411:     .parent    = &ck_48m,
                    412:     .rate      = 48000000,
                    413:     .flags     = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
                    414: };
                    415: 
                    416: static struct clk mclk_1510 = {
                    417:     .name      = "mclk",
                    418:     /* Direct from ULPD, no parent. May be enabled by ext hardware. */
                    419:     .rate      = 12000000,
                    420:     .flags     = CLOCK_IN_OMAP1510,
                    421: };
                    422: 
                    423: static struct clk bclk_310 = {
                    424:     .name      = "bt_mclk_out",        /* Alias midi_mclk_out? */
                    425:     .parent    = &armper_ck,
                    426:     .flags     = CLOCK_IN_OMAP310,
                    427: };
                    428: 
                    429: static struct clk mclk_310 = {
                    430:     .name      = "com_mclk_out",
                    431:     .parent    = &armper_ck,
                    432:     .flags     = CLOCK_IN_OMAP310,
                    433: };
                    434: 
                    435: static struct clk mclk_16xx = {
                    436:     .name      = "mclk",
                    437:     /* Direct from ULPD, no parent. May be enabled by ext hardware. */
                    438:     .flags     = CLOCK_IN_OMAP16XX,
                    439: };
                    440: 
                    441: static struct clk bclk_1510 = {
                    442:     .name      = "bclk",
                    443:     /* Direct from ULPD, no parent. May be enabled by ext hardware. */
                    444:     .rate      = 12000000,
                    445:     .flags     = CLOCK_IN_OMAP1510,
                    446: };
                    447: 
                    448: static struct clk bclk_16xx = {
                    449:     .name      = "bclk",
                    450:     /* Direct from ULPD, no parent. May be enabled by ext hardware. */
                    451:     .flags     = CLOCK_IN_OMAP16XX,
                    452: };
                    453: 
                    454: static struct clk mmc1_ck = {
                    455:     .name      = "mmc_ck",
                    456:     .id                = 1,
                    457:     /* Functional clock is direct from ULPD, interface clock is ARMPER */
                    458:     .parent    = &armper_ck,   /* either armper_ck or dpll4 */
                    459:     .rate      = 48000000,
                    460:     .flags     = CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX | CLOCK_IN_OMAP310,
                    461: };
                    462: 
                    463: static struct clk mmc2_ck = {
                    464:     .name      = "mmc_ck",
                    465:     .id                = 2,
                    466:     /* Functional clock is direct from ULPD, interface clock is ARMPER */
                    467:     .parent    = &armper_ck,
                    468:     .rate      = 48000000,
                    469:     .flags     = CLOCK_IN_OMAP16XX,
                    470: };
                    471: 
                    472: static struct clk cam_mclk = {
                    473:     .name      = "cam.mclk",
                    474:     .flags     = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
                    475:     .rate      = 12000000,
                    476: };
                    477: 
                    478: static struct clk cam_exclk = {
                    479:     .name      = "cam.exclk",
                    480:     .flags     = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
                    481:     /* Either 12M from cam.mclk or 48M from dpll4 */
                    482:     .parent    = &cam_mclk,
                    483: };
                    484: 
                    485: static struct clk cam_lclk = {
                    486:     .name      = "cam.lclk",
                    487:     .flags     = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX,
                    488: };
                    489: 
                    490: static struct clk i2c_fck = {
                    491:     .name      = "i2c_fck",
                    492:     .id                = 1,
                    493:     .flags     = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
                    494:             ALWAYS_ENABLED,
                    495:     .parent    = &armxor_ck,
                    496: };
                    497: 
                    498: static struct clk i2c_ick = {
                    499:     .name      = "i2c_ick",
                    500:     .id                = 1,
                    501:     .flags     = CLOCK_IN_OMAP16XX | ALWAYS_ENABLED,
                    502:     .parent    = &armper_ck,
                    503: };
                    504: 
                    505: static struct clk clk32k = {
                    506:     .name      = "clk32-kHz",
                    507:     .flags     = CLOCK_IN_OMAP310 | CLOCK_IN_OMAP1510 | CLOCK_IN_OMAP16XX |
                    508:             CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED,
                    509:     .parent    = &xtal_osc32k,
                    510: };
                    511: 
                    512: static struct clk ref_clk = {
                    513:     .name      = "ref_clk",
                    514:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED,
                    515:     .rate      = 12000000,     /* 12 MHz or 13 MHz or 19.2 MHz */
                    516:     /*.parent  = sys.xtalin */
                    517: };
                    518: 
                    519: static struct clk apll_96m = {
                    520:     .name      = "apll_96m",
                    521:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED,
                    522:     .rate      = 96000000,
                    523:     /*.parent  = ref_clk */
                    524: };
                    525: 
                    526: static struct clk apll_54m = {
                    527:     .name      = "apll_54m",
                    528:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED,
                    529:     .rate      = 54000000,
                    530:     /*.parent  = ref_clk */
                    531: };
                    532: 
                    533: static struct clk sys_clk = {
                    534:     .name      = "sys_clk",
                    535:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED,
                    536:     .rate      = 32768,
                    537:     /*.parent  = sys.xtalin */
                    538: };
                    539: 
                    540: static struct clk sleep_clk = {
                    541:     .name      = "sleep_clk",
                    542:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED,
                    543:     .rate      = 32768,
                    544:     /*.parent  = sys.xtalin */
                    545: };
                    546: 
                    547: static struct clk dpll_ck = {
                    548:     .name      = "dpll",
                    549:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED,
                    550:     .parent    = &ref_clk,
                    551: };
                    552: 
                    553: static struct clk dpll_x2_ck = {
                    554:     .name      = "dpll_x2",
                    555:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED,
                    556:     .parent    = &ref_clk,
                    557: };
                    558: 
                    559: static struct clk wdt1_sys_clk = {
                    560:     .name      = "wdt1_sys_clk",
                    561:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X | ALWAYS_ENABLED,
                    562:     .rate      = 32768,
                    563:     /*.parent  = sys.xtalin */
                    564: };
                    565: 
                    566: static struct clk func_96m_clk = {
                    567:     .name      = "func_96m_clk",
                    568:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    569:     .divisor   = 1,
                    570:     .parent    = &apll_96m,
                    571: };
                    572: 
                    573: static struct clk func_48m_clk = {
                    574:     .name      = "func_48m_clk",
                    575:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    576:     .divisor   = 2,
                    577:     .parent    = &apll_96m,
                    578: };
                    579: 
                    580: static struct clk func_12m_clk = {
                    581:     .name      = "func_12m_clk",
                    582:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    583:     .divisor   = 8,
                    584:     .parent    = &apll_96m,
                    585: };
                    586: 
                    587: static struct clk func_54m_clk = {
                    588:     .name      = "func_54m_clk",
                    589:     .flags     = CLOCK_IN_OMAP242X,
                    590:     .divisor   = 1,
                    591:     .parent    = &apll_54m,
                    592: };
                    593: 
                    594: static struct clk sys_clkout = {
                    595:     .name      = "clkout",
                    596:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    597:     .parent    = &sys_clk,
                    598: };
                    599: 
                    600: static struct clk sys_clkout2 = {
                    601:     .name      = "clkout2",
                    602:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    603:     .parent    = &sys_clk,
                    604: };
                    605: 
                    606: static struct clk core_clk = {
                    607:     .name      = "core_clk",
                    608:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    609:     .parent    = &dpll_x2_ck,  /* Switchable between dpll_ck and clk32k */
                    610: };
                    611: 
                    612: static struct clk l3_clk = {
                    613:     .name      = "l3_clk",
                    614:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    615:     .parent    = &core_clk,
                    616: };
                    617: 
                    618: static struct clk core_l4_iclk = {
                    619:     .name      = "core_l4_iclk",
                    620:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    621:     .parent    = &l3_clk,
                    622: };
                    623: 
                    624: static struct clk wu_l4_iclk = {
                    625:     .name      = "wu_l4_iclk",
                    626:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    627:     .parent    = &l3_clk,
                    628: };
                    629: 
                    630: static struct clk core_l3_iclk = {
                    631:     .name      = "core_l3_iclk",
                    632:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    633:     .parent    = &core_clk,
                    634: };
                    635: 
                    636: static struct clk core_l4_usb_clk = {
                    637:     .name      = "core_l4_usb_clk",
                    638:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    639:     .parent    = &l3_clk,
                    640: };
                    641: 
                    642: static struct clk wu_gpt1_clk = {
                    643:     .name      = "wu_gpt1_clk",
                    644:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    645:     .parent    = &sys_clk,
                    646: };
                    647: 
                    648: static struct clk wu_32k_clk = {
                    649:     .name      = "wu_32k_clk",
                    650:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    651:     .parent    = &sys_clk,
                    652: };
                    653: 
                    654: static struct clk uart1_fclk = {
                    655:     .name      = "uart1_fclk",
                    656:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    657:     .parent    = &func_48m_clk,
                    658: };
                    659: 
                    660: static struct clk uart1_iclk = {
                    661:     .name      = "uart1_iclk",
                    662:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    663:     .parent    = &core_l4_iclk,
                    664: };
                    665: 
                    666: static struct clk uart2_fclk = {
                    667:     .name      = "uart2_fclk",
                    668:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    669:     .parent    = &func_48m_clk,
                    670: };
                    671: 
                    672: static struct clk uart2_iclk = {
                    673:     .name      = "uart2_iclk",
                    674:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    675:     .parent    = &core_l4_iclk,
                    676: };
                    677: 
                    678: static struct clk uart3_fclk = {
                    679:     .name      = "uart3_fclk",
                    680:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    681:     .parent    = &func_48m_clk,
                    682: };
                    683: 
                    684: static struct clk uart3_iclk = {
                    685:     .name      = "uart3_iclk",
                    686:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    687:     .parent    = &core_l4_iclk,
                    688: };
                    689: 
                    690: static struct clk mpu_fclk = {
                    691:     .name      = "mpu_fclk",
                    692:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    693:     .parent    = &core_clk,
                    694: };
                    695: 
                    696: static struct clk mpu_iclk = {
                    697:     .name      = "mpu_iclk",
                    698:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    699:     .parent    = &core_clk,
                    700: };
                    701: 
                    702: static struct clk int_m_fclk = {
                    703:     .name      = "int_m_fclk",
                    704:     .alias     = "mpu_intc_fclk",
                    705:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    706:     .parent    = &core_clk,
                    707: };
                    708: 
                    709: static struct clk int_m_iclk = {
                    710:     .name      = "int_m_iclk",
                    711:     .alias     = "mpu_intc_iclk",
                    712:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    713:     .parent    = &core_clk,
                    714: };
                    715: 
                    716: static struct clk core_gpt2_clk = {
                    717:     .name      = "core_gpt2_clk",
                    718:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    719:     .parent    = &sys_clk,
                    720: };
                    721: 
                    722: static struct clk core_gpt3_clk = {
                    723:     .name      = "core_gpt3_clk",
                    724:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    725:     .parent    = &sys_clk,
                    726: };
                    727: 
                    728: static struct clk core_gpt4_clk = {
                    729:     .name      = "core_gpt4_clk",
                    730:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    731:     .parent    = &sys_clk,
                    732: };
                    733: 
                    734: static struct clk core_gpt5_clk = {
                    735:     .name      = "core_gpt5_clk",
                    736:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    737:     .parent    = &sys_clk,
                    738: };
                    739: 
                    740: static struct clk core_gpt6_clk = {
                    741:     .name      = "core_gpt6_clk",
                    742:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    743:     .parent    = &sys_clk,
                    744: };
                    745: 
                    746: static struct clk core_gpt7_clk = {
                    747:     .name      = "core_gpt7_clk",
                    748:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    749:     .parent    = &sys_clk,
                    750: };
                    751: 
                    752: static struct clk core_gpt8_clk = {
                    753:     .name      = "core_gpt8_clk",
                    754:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    755:     .parent    = &sys_clk,
                    756: };
                    757: 
                    758: static struct clk core_gpt9_clk = {
                    759:     .name      = "core_gpt9_clk",
                    760:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    761:     .parent    = &sys_clk,
                    762: };
                    763: 
                    764: static struct clk core_gpt10_clk = {
                    765:     .name      = "core_gpt10_clk",
                    766:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    767:     .parent    = &sys_clk,
                    768: };
                    769: 
                    770: static struct clk core_gpt11_clk = {
                    771:     .name      = "core_gpt11_clk",
                    772:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    773:     .parent    = &sys_clk,
                    774: };
                    775: 
                    776: static struct clk core_gpt12_clk = {
                    777:     .name      = "core_gpt12_clk",
                    778:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    779:     .parent    = &sys_clk,
                    780: };
                    781: 
                    782: static struct clk mcbsp1_clk = {
                    783:     .name      = "mcbsp1_cg",
                    784:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    785:     .divisor   = 2,
                    786:     .parent    = &func_96m_clk,
                    787: };
                    788: 
                    789: static struct clk mcbsp2_clk = {
                    790:     .name      = "mcbsp2_cg",
                    791:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    792:     .divisor   = 2,
                    793:     .parent    = &func_96m_clk,
                    794: };
                    795: 
                    796: static struct clk emul_clk = {
                    797:     .name      = "emul_ck",
                    798:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    799:     .parent    = &func_54m_clk,
                    800: };
                    801: 
                    802: static struct clk sdma_fclk = {
                    803:     .name      = "sdma_fclk",
                    804:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    805:     .parent    = &l3_clk,
                    806: };
                    807: 
                    808: static struct clk sdma_iclk = {
                    809:     .name      = "sdma_iclk",
                    810:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    811:     .parent    = &core_l3_iclk, /* core_l4_iclk for the configuration port */
                    812: };
                    813: 
                    814: static struct clk i2c1_fclk = {
                    815:     .name      = "i2c1.fclk",
                    816:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    817:     .parent    = &func_12m_clk,
                    818:     .divisor   = 1,
                    819: };
                    820: 
                    821: static struct clk i2c1_iclk = {
                    822:     .name      = "i2c1.iclk",
                    823:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    824:     .parent    = &core_l4_iclk,
                    825: };
                    826: 
                    827: static struct clk i2c2_fclk = {
                    828:     .name      = "i2c2.fclk",
                    829:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    830:     .parent    = &func_12m_clk,
                    831:     .divisor   = 1,
                    832: };
                    833: 
                    834: static struct clk i2c2_iclk = {
                    835:     .name      = "i2c2.iclk",
                    836:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    837:     .parent    = &core_l4_iclk,
                    838: };
                    839: 
                    840: static struct clk gpio_dbclk[4] = {
                    841:     {
                    842:         .name  = "gpio1_dbclk",
                    843:         .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    844:         .parent        = &wu_32k_clk,
                    845:     }, {
                    846:         .name  = "gpio2_dbclk",
                    847:         .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    848:         .parent        = &wu_32k_clk,
                    849:     }, {
                    850:         .name  = "gpio3_dbclk",
                    851:         .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    852:         .parent        = &wu_32k_clk,
                    853:     }, {
                    854:         .name  = "gpio4_dbclk",
                    855:         .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    856:         .parent        = &wu_32k_clk,
                    857:     },
                    858: };
                    859: 
                    860: static struct clk gpio_iclk = {
                    861:     .name      = "gpio_iclk",
                    862:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    863:     .parent    = &wu_l4_iclk,
                    864: };
                    865: 
                    866: static struct clk mmc_fck = {
                    867:     .name      = "mmc_fclk",
                    868:     .flags     = CLOCK_IN_OMAP242X,
                    869:     .parent    = &func_96m_clk,
                    870: };
                    871: 
                    872: static struct clk mmc_ick = {
                    873:     .name      = "mmc_iclk",
                    874:     .flags     = CLOCK_IN_OMAP242X,
                    875:     .parent    = &core_l4_iclk,
                    876: };
                    877: 
                    878: static struct clk spi_fclk[3] = {
                    879:     {
                    880:         .name  = "spi1_fclk",
                    881:         .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    882:         .parent        = &func_48m_clk,
                    883:     }, {
                    884:         .name  = "spi2_fclk",
                    885:         .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    886:         .parent        = &func_48m_clk,
                    887:     }, {
                    888:         .name  = "spi3_fclk",
                    889:         .flags = CLOCK_IN_OMAP243X,
                    890:         .parent        = &func_48m_clk,
                    891:     },
                    892: };
                    893: 
                    894: static struct clk dss_clk[2] = {
                    895:     {
                    896:         .name  = "dss_clk1",
                    897:         .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    898:         .parent        = &core_clk,
                    899:     }, {
                    900:         .name  = "dss_clk2",
                    901:         .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    902:         .parent        = &sys_clk,
                    903:     },
                    904: };
                    905: 
                    906: static struct clk dss_54m_clk = {
                    907:     .name      = "dss_54m_clk",
                    908:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    909:     .parent    = &func_54m_clk,
                    910: };
                    911: 
                    912: static struct clk dss_l3_iclk = {
                    913:     .name      = "dss_l3_iclk",
                    914:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    915:     .parent    = &core_l3_iclk,
                    916: };
                    917: 
                    918: static struct clk dss_l4_iclk = {
                    919:     .name      = "dss_l4_iclk",
                    920:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    921:     .parent    = &core_l4_iclk,
                    922: };
                    923: 
                    924: static struct clk spi_iclk[3] = {
                    925:     {
                    926:         .name  = "spi1_iclk",
                    927:         .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    928:         .parent        = &core_l4_iclk,
                    929:     }, {
                    930:         .name  = "spi2_iclk",
                    931:         .flags = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    932:         .parent        = &core_l4_iclk,
                    933:     }, {
                    934:         .name  = "spi3_iclk",
                    935:         .flags = CLOCK_IN_OMAP243X,
                    936:         .parent        = &core_l4_iclk,
                    937:     },
                    938: };
                    939: 
                    940: static struct clk omapctrl_clk = {
                    941:     .name      = "omapctrl_iclk",
                    942:     .flags     = CLOCK_IN_OMAP242X | CLOCK_IN_OMAP243X,
                    943:     /* XXX Should be in WKUP domain */
                    944:     .parent    = &core_l4_iclk,
                    945: };
                    946: 
                    947: static struct clk *onchip_clks[] = {
                    948:     /* OMAP 1 */
                    949: 
                    950:     /* non-ULPD clocks */
                    951:     &xtal_osc12m,
                    952:     &xtal_osc32k,
                    953:     &ck_ref,
                    954:     &dpll1,
                    955:     &dpll2,
                    956:     &dpll3,
                    957:     &dpll4,
                    958:     &apll,
                    959:     &ck_48m,
                    960:     /* CK_GEN1 clocks */
                    961:     &clkm1,
                    962:     &ck_dpll1out,
                    963:     &sossi_ck,
                    964:     &arm_ck,
                    965:     &armper_ck,
                    966:     &arm_gpio_ck,
                    967:     &armxor_ck,
                    968:     &armtim_ck,
                    969:     &armwdt_ck,
                    970:     &arminth_ck15xx,  &arminth_ck16xx,
                    971:     /* CK_GEN2 clocks */
                    972:     &clkm2,
                    973:     &dsp_ck,
                    974:     &dspmmu_ck,
                    975:     &dspper_ck,
                    976:     &dspxor_ck,
                    977:     &dsptim_ck,
                    978:     /* CK_GEN3 clocks */
                    979:     &clkm3,
                    980:     &tc_ck,
                    981:     &tipb_ck,
                    982:     &l3_ocpi_ck,
                    983:     &tc1_ck,
                    984:     &tc2_ck,
                    985:     &dma_ck,
                    986:     &dma_lcdfree_ck,
                    987:     &api_ck,
                    988:     &lb_ck,
                    989:     &lbfree_ck,
                    990:     &hsab_ck,
                    991:     &rhea1_ck,
                    992:     &rhea2_ck,
                    993:     &lcd_ck_16xx,
                    994:     &lcd_ck_1510,
                    995:     /* ULPD clocks */
                    996:     &uart1_1510,
                    997:     &uart1_16xx,
                    998:     &uart2_ck,
                    999:     &uart3_1510,
                   1000:     &uart3_16xx,
                   1001:     &usb_clk0,
                   1002:     &usb_hhc_ck1510, &usb_hhc_ck16xx,
                   1003:     &mclk_1510,  &mclk_16xx, &mclk_310,
                   1004:     &bclk_1510,  &bclk_16xx, &bclk_310,
                   1005:     &mmc1_ck,
                   1006:     &mmc2_ck,
                   1007:     &cam_mclk,
                   1008:     &cam_exclk,
                   1009:     &cam_lclk,
                   1010:     &clk32k,
                   1011:     &usb_w2fc_mclk,
                   1012:     /* Virtual clocks */
                   1013:     &i2c_fck,
                   1014:     &i2c_ick,
                   1015: 
                   1016:     /* OMAP 2 */
                   1017: 
                   1018:     &ref_clk,
                   1019:     &apll_96m,
                   1020:     &apll_54m,
                   1021:     &sys_clk,
                   1022:     &sleep_clk,
                   1023:     &dpll_ck,
                   1024:     &dpll_x2_ck,
                   1025:     &wdt1_sys_clk,
                   1026:     &func_96m_clk,
                   1027:     &func_48m_clk,
                   1028:     &func_12m_clk,
                   1029:     &func_54m_clk,
                   1030:     &sys_clkout,
                   1031:     &sys_clkout2,
                   1032:     &core_clk,
                   1033:     &l3_clk,
                   1034:     &core_l4_iclk,
                   1035:     &wu_l4_iclk,
                   1036:     &core_l3_iclk,
                   1037:     &core_l4_usb_clk,
                   1038:     &wu_gpt1_clk,
                   1039:     &wu_32k_clk,
                   1040:     &uart1_fclk,
                   1041:     &uart1_iclk,
                   1042:     &uart2_fclk,
                   1043:     &uart2_iclk,
                   1044:     &uart3_fclk,
                   1045:     &uart3_iclk,
                   1046:     &mpu_fclk,
                   1047:     &mpu_iclk,
                   1048:     &int_m_fclk,
                   1049:     &int_m_iclk,
                   1050:     &core_gpt2_clk,
                   1051:     &core_gpt3_clk,
                   1052:     &core_gpt4_clk,
                   1053:     &core_gpt5_clk,
                   1054:     &core_gpt6_clk,
                   1055:     &core_gpt7_clk,
                   1056:     &core_gpt8_clk,
                   1057:     &core_gpt9_clk,
                   1058:     &core_gpt10_clk,
                   1059:     &core_gpt11_clk,
                   1060:     &core_gpt12_clk,
                   1061:     &mcbsp1_clk,
                   1062:     &mcbsp2_clk,
                   1063:     &emul_clk,
                   1064:     &sdma_fclk,
                   1065:     &sdma_iclk,
                   1066:     &i2c1_fclk,
                   1067:     &i2c1_iclk,
                   1068:     &i2c2_fclk,
                   1069:     &i2c2_iclk,
                   1070:     &gpio_dbclk[0],
                   1071:     &gpio_dbclk[1],
                   1072:     &gpio_dbclk[2],
                   1073:     &gpio_dbclk[3],
                   1074:     &gpio_iclk,
                   1075:     &mmc_fck,
                   1076:     &mmc_ick,
                   1077:     &spi_fclk[0],
                   1078:     &spi_iclk[0],
                   1079:     &spi_fclk[1],
                   1080:     &spi_iclk[1],
                   1081:     &spi_fclk[2],
                   1082:     &spi_iclk[2],
                   1083:     &dss_clk[0],
                   1084:     &dss_clk[1],
                   1085:     &dss_54m_clk,
                   1086:     &dss_l3_iclk,
                   1087:     &dss_l4_iclk,
                   1088:     &omapctrl_clk,
                   1089: 
                   1090:     0
                   1091: };
                   1092: 
                   1093: void omap_clk_adduser(struct clk *clk, qemu_irq user)
                   1094: {
                   1095:     qemu_irq *i;
                   1096: 
                   1097:     for (i = clk->users; *i; i ++);
                   1098:     *i = user;
                   1099: }
                   1100: 
                   1101: /* If a clock is allowed to idle, it is disabled automatically when
                   1102:  * all of clock domains using it are disabled.  */
                   1103: static int omap_clk_is_idle(struct clk *clk)
                   1104: {
                   1105:     struct clk *chld;
                   1106: 
                   1107:     if (!clk->enabled && (!clk->usecount || !(clk->flags && ALWAYS_ENABLED)))
                   1108:         return 1;
                   1109:     if (clk->usecount)
                   1110:         return 0;
                   1111: 
                   1112:     for (chld = clk->child1; chld; chld = chld->sibling)
                   1113:         if (!omap_clk_is_idle(chld))
                   1114:             return 0;
                   1115:     return 1;
                   1116: }
                   1117: 
                   1118: struct clk *omap_findclk(struct omap_mpu_state_s *mpu, const char *name)
                   1119: {
                   1120:     struct clk *i;
                   1121: 
                   1122:     for (i = mpu->clks; i->name; i ++)
                   1123:         if (!strcmp(i->name, name) || (i->alias && !strcmp(i->alias, name)))
                   1124:             return i;
                   1125:     cpu_abort(mpu->env, "%s: %s not found\n", __FUNCTION__, name);
                   1126: }
                   1127: 
                   1128: void omap_clk_get(struct clk *clk)
                   1129: {
                   1130:     clk->usecount ++;
                   1131: }
                   1132: 
                   1133: void omap_clk_put(struct clk *clk)
                   1134: {
                   1135:     if (!(clk->usecount --))
                   1136:         cpu_abort(cpu_single_env, "%s: %s is not in use\n",
                   1137:                         __FUNCTION__, clk->name);
                   1138: }
                   1139: 
                   1140: static void omap_clk_update(struct clk *clk)
                   1141: {
                   1142:     int parent, running;
                   1143:     qemu_irq *user;
                   1144:     struct clk *i;
                   1145: 
                   1146:     if (clk->parent)
                   1147:         parent = clk->parent->running;
                   1148:     else
                   1149:         parent = 1;
                   1150: 
                   1151:     running = parent && (clk->enabled ||
                   1152:                     ((clk->flags & ALWAYS_ENABLED) && clk->usecount));
                   1153:     if (clk->running != running) {
                   1154:         clk->running = running;
                   1155:         for (user = clk->users; *user; user ++)
                   1156:             qemu_set_irq(*user, running);
                   1157:         for (i = clk->child1; i; i = i->sibling)
                   1158:             omap_clk_update(i);
                   1159:     }
                   1160: }
                   1161: 
                   1162: static void omap_clk_rate_update_full(struct clk *clk, unsigned long int rate,
                   1163:                 unsigned long int div, unsigned long int mult)
                   1164: {
                   1165:     struct clk *i;
                   1166:     qemu_irq *user;
                   1167: 
                   1168:     clk->rate = muldiv64(rate, mult, div);
                   1169:     if (clk->running)
                   1170:         for (user = clk->users; *user; user ++)
                   1171:             qemu_irq_raise(*user);
                   1172:     for (i = clk->child1; i; i = i->sibling)
                   1173:         omap_clk_rate_update_full(i, rate,
                   1174:                         div * i->divisor, mult * i->multiplier);
                   1175: }
                   1176: 
                   1177: static void omap_clk_rate_update(struct clk *clk)
                   1178: {
                   1179:     struct clk *i;
                   1180:     unsigned long int div, mult = div = 1;
                   1181: 
                   1182:     for (i = clk; i->parent; i = i->parent) {
                   1183:         div *= i->divisor;
                   1184:         mult *= i->multiplier;
                   1185:     }
                   1186: 
                   1187:     omap_clk_rate_update_full(clk, i->rate, div, mult);
                   1188: }
                   1189: 
                   1190: void omap_clk_reparent(struct clk *clk, struct clk *parent)
                   1191: {
                   1192:     struct clk **p;
                   1193: 
                   1194:     if (clk->parent) {
                   1195:         for (p = &clk->parent->child1; *p != clk; p = &(*p)->sibling);
                   1196:         *p = clk->sibling;
                   1197:     }
                   1198: 
                   1199:     clk->parent = parent;
                   1200:     if (parent) {
                   1201:         clk->sibling = parent->child1;
                   1202:         parent->child1 = clk;
                   1203:         omap_clk_update(clk);
                   1204:         omap_clk_rate_update(clk);
                   1205:     } else
                   1206:         clk->sibling = 0;
                   1207: }
                   1208: 
                   1209: void omap_clk_onoff(struct clk *clk, int on)
                   1210: {
                   1211:     clk->enabled = on;
                   1212:     omap_clk_update(clk);
                   1213: }
                   1214: 
                   1215: void omap_clk_canidle(struct clk *clk, int can)
                   1216: {
                   1217:     if (can)
                   1218:         omap_clk_put(clk);
                   1219:     else
                   1220:         omap_clk_get(clk);
                   1221: }
                   1222: 
                   1223: void omap_clk_setrate(struct clk *clk, int divide, int multiply)
                   1224: {
                   1225:     clk->divisor = divide;
                   1226:     clk->multiplier = multiply;
                   1227:     omap_clk_rate_update(clk);
                   1228: }
                   1229: 
                   1230: int64_t omap_clk_getrate(omap_clk clk)
                   1231: {
                   1232:     return clk->rate;
                   1233: }
                   1234: 
                   1235: void omap_clk_init(struct omap_mpu_state_s *mpu)
                   1236: {
                   1237:     struct clk **i, *j, *k;
                   1238:     int count;
                   1239:     int flag;
                   1240: 
                   1241:     if (cpu_is_omap310(mpu))
                   1242:         flag = CLOCK_IN_OMAP310;
                   1243:     else if (cpu_is_omap1510(mpu))
                   1244:         flag = CLOCK_IN_OMAP1510;
                   1245:     else if (cpu_is_omap2410(mpu) || cpu_is_omap2420(mpu))
                   1246:         flag = CLOCK_IN_OMAP242X;
                   1247:     else if (cpu_is_omap2430(mpu))
                   1248:         flag = CLOCK_IN_OMAP243X;
                   1249:     else if (cpu_is_omap3430(mpu))
                   1250:         flag = CLOCK_IN_OMAP243X;
                   1251:     else
                   1252:         return;
                   1253: 
                   1254:     for (i = onchip_clks, count = 0; *i; i ++)
                   1255:         if ((*i)->flags & flag)
                   1256:             count ++;
                   1257:     mpu->clks = (struct clk *) qemu_mallocz(sizeof(struct clk) * (count + 1));
                   1258:     for (i = onchip_clks, j = mpu->clks; *i; i ++)
                   1259:         if ((*i)->flags & flag) {
                   1260:             memcpy(j, *i, sizeof(struct clk));
                   1261:             for (k = mpu->clks; k < j; k ++)
                   1262:                 if (j->parent && !strcmp(j->parent->name, k->name)) {
                   1263:                     j->parent = k;
                   1264:                     j->sibling = k->child1;
                   1265:                     k->child1 = j;
                   1266:                 } else if (k->parent && !strcmp(k->parent->name, j->name)) {
                   1267:                     k->parent = j;
                   1268:                     k->sibling = j->child1;
                   1269:                     j->child1 = k;
                   1270:                 }
                   1271:             j->divisor = j->divisor ?: 1;
                   1272:             j->multiplier = j->multiplier ?: 1;
                   1273:             j ++;
                   1274:         }
                   1275:     for (j = mpu->clks; count --; j ++) {
                   1276:         omap_clk_update(j);
                   1277:         omap_clk_rate_update(j);
                   1278:     }
                   1279: }

unix.superglobalmegacorp.com