version 1.1.1.1, 2018/04/24 16:48:50
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version 1.1.1.2, 2018/04/24 16:53:39
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Line 13
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Line 13
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
* GNU General Public License for more details. |
* GNU General Public License for more details. |
* |
* |
* You should have received a copy of the GNU General Public License |
* You should have received a copy of the GNU General Public License along |
* along with this program; if not, write to the Free Software |
* with this program; if not, write to the Free Software Foundation, Inc., |
* Foundation, Inc., 59 Temple Place, Suite 330, Boston, |
* 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA. |
* MA 02111-1307 USA |
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*/ |
*/ |
#include "hw.h" |
#include "hw.h" |
#include "console.h" |
#include "console.h" |
#include "omap.h" |
#include "omap.h" |
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struct omap_lcd_panel_s { |
struct omap_lcd_panel_s { |
target_phys_addr_t base; |
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qemu_irq irq; |
qemu_irq irq; |
DisplayState *state; |
DisplayState *state; |
ram_addr_t imif_base; |
ram_addr_t imif_base; |
Line 124 static void omap_update_display(void *op
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Line 122 static void omap_update_display(void *op
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uint8_t *s, *d; |
uint8_t *s, *d; |
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if (!omap_lcd || omap_lcd->plm == 1 || |
if (!omap_lcd || omap_lcd->plm == 1 || |
!omap_lcd->enable || !omap_lcd->state->depth) |
!omap_lcd->enable || !ds_get_bits_per_pixel(omap_lcd->state)) |
return; |
return; |
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frame_offset = 0; |
frame_offset = 0; |
Line 144 static void omap_update_display(void *op
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Line 142 static void omap_update_display(void *op
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/* Colour depth */ |
/* Colour depth */ |
switch ((omap_lcd->palette[0] >> 12) & 7) { |
switch ((omap_lcd->palette[0] >> 12) & 7) { |
case 1: |
case 1: |
draw_line = draw_line_table2[omap_lcd->state->depth]; |
draw_line = draw_line_table2[ds_get_bits_per_pixel(omap_lcd->state)]; |
bpp = 2; |
bpp = 2; |
break; |
break; |
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case 2: |
case 2: |
draw_line = draw_line_table4[omap_lcd->state->depth]; |
draw_line = draw_line_table4[ds_get_bits_per_pixel(omap_lcd->state)]; |
bpp = 4; |
bpp = 4; |
break; |
break; |
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case 3: |
case 3: |
draw_line = draw_line_table8[omap_lcd->state->depth]; |
draw_line = draw_line_table8[ds_get_bits_per_pixel(omap_lcd->state)]; |
bpp = 8; |
bpp = 8; |
break; |
break; |
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case 4 ... 7: |
case 4 ... 7: |
if (!omap_lcd->tft) |
if (!omap_lcd->tft) |
draw_line = draw_line_table12[omap_lcd->state->depth]; |
draw_line = draw_line_table12[ds_get_bits_per_pixel(omap_lcd->state)]; |
else |
else |
draw_line = draw_line_table16[omap_lcd->state->depth]; |
draw_line = draw_line_table16[ds_get_bits_per_pixel(omap_lcd->state)]; |
bpp = 16; |
bpp = 16; |
break; |
break; |
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Line 173 static void omap_update_display(void *op
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Line 171 static void omap_update_display(void *op
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/* Resolution */ |
/* Resolution */ |
width = omap_lcd->width; |
width = omap_lcd->width; |
if (width != omap_lcd->state->width || |
if (width != ds_get_width(omap_lcd->state) || |
omap_lcd->height != omap_lcd->state->height) { |
omap_lcd->height != ds_get_height(omap_lcd->state)) { |
dpy_resize(omap_lcd->state, |
qemu_console_resize(omap_lcd->state, |
omap_lcd->width, omap_lcd->height); |
omap_lcd->width, omap_lcd->height); |
omap_lcd->invalidate = 1; |
omap_lcd->invalidate = 1; |
} |
} |
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Line 201 static void omap_update_display(void *op
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Line 199 static void omap_update_display(void *op
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if (omap_lcd->dma->dual) |
if (omap_lcd->dma->dual) |
omap_lcd->dma->current_frame ^= 1; |
omap_lcd->dma->current_frame ^= 1; |
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if (!omap_lcd->state->depth) |
if (!ds_get_bits_per_pixel(omap_lcd->state)) |
return; |
return; |
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line = 0; |
line = 0; |
Line 216 static void omap_update_display(void *op
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Line 214 static void omap_update_display(void *op
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step = width * bpp >> 3; |
step = width * bpp >> 3; |
scanline = frame_base + step * line; |
scanline = frame_base + step * line; |
s = (uint8_t *) (phys_ram_base + scanline); |
s = (uint8_t *) (phys_ram_base + scanline); |
d = omap_lcd->state->data; |
d = ds_get_data(omap_lcd->state); |
linesize = omap_lcd->state->linesize; |
linesize = ds_get_linesize(omap_lcd->state); |
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dirty[0] = dirty[1] = |
dirty[0] = dirty[1] = |
cpu_physical_memory_get_dirty(scanline, VGA_DIRTY_FLAG); |
cpu_physical_memory_get_dirty(scanline, VGA_DIRTY_FLAG); |
Line 292 static int ppm_save(const char *filename
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Line 290 static int ppm_save(const char *filename
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static void omap_screen_dump(void *opaque, const char *filename) { |
static void omap_screen_dump(void *opaque, const char *filename) { |
struct omap_lcd_panel_s *omap_lcd = opaque; |
struct omap_lcd_panel_s *omap_lcd = opaque; |
omap_update_display(opaque); |
omap_update_display(opaque); |
if (omap_lcd && omap_lcd->state->data) |
if (omap_lcd && ds_get_data(omap_lcd->state)) |
ppm_save(filename, omap_lcd->state->data, |
ppm_save(filename, ds_get_data(omap_lcd->state), |
omap_lcd->width, omap_lcd->height, |
omap_lcd->width, omap_lcd->height, |
omap_lcd->state->linesize); |
ds_get_linesize(omap_lcd->state)); |
} |
} |
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static void omap_invalidate_display(void *opaque) { |
static void omap_invalidate_display(void *opaque) { |
Line 365 static void omap_lcd_update(struct omap_
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Line 363 static void omap_lcd_update(struct omap_
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static uint32_t omap_lcdc_read(void *opaque, target_phys_addr_t addr) |
static uint32_t omap_lcdc_read(void *opaque, target_phys_addr_t addr) |
{ |
{ |
struct omap_lcd_panel_s *s = (struct omap_lcd_panel_s *) opaque; |
struct omap_lcd_panel_s *s = (struct omap_lcd_panel_s *) opaque; |
int offset = addr - s->base; |
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switch (offset) { |
switch (addr) { |
case 0x00: /* LCD_CONTROL */ |
case 0x00: /* LCD_CONTROL */ |
return (s->tft << 23) | (s->plm << 20) | |
return (s->tft << 23) | (s->plm << 20) | |
(s->tft << 7) | (s->interrupts << 3) | |
(s->tft << 7) | (s->interrupts << 3) | |
Line 399 static void omap_lcdc_write(void *opaque
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Line 396 static void omap_lcdc_write(void *opaque
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uint32_t value) |
uint32_t value) |
{ |
{ |
struct omap_lcd_panel_s *s = (struct omap_lcd_panel_s *) opaque; |
struct omap_lcd_panel_s *s = (struct omap_lcd_panel_s *) opaque; |
int offset = addr - s->base; |
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switch (offset) { |
switch (addr) { |
case 0x00: /* LCD_CONTROL */ |
case 0x00: /* LCD_CONTROL */ |
s->plm = (value >> 20) & 3; |
s->plm = (value >> 20) & 3; |
s->tft = (value >> 7) & 1; |
s->tft = (value >> 7) & 1; |
Line 475 void omap_lcdc_reset(struct omap_lcd_pan
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Line 471 void omap_lcdc_reset(struct omap_lcd_pan
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} |
} |
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struct omap_lcd_panel_s *omap_lcdc_init(target_phys_addr_t base, qemu_irq irq, |
struct omap_lcd_panel_s *omap_lcdc_init(target_phys_addr_t base, qemu_irq irq, |
struct omap_dma_lcd_channel_s *dma, DisplayState *ds, |
struct omap_dma_lcd_channel_s *dma, |
ram_addr_t imif_base, ram_addr_t emiff_base, omap_clk clk) |
ram_addr_t imif_base, ram_addr_t emiff_base, omap_clk clk) |
{ |
{ |
int iomemtype; |
int iomemtype; |
Line 484 struct omap_lcd_panel_s *omap_lcdc_init(
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Line 480 struct omap_lcd_panel_s *omap_lcdc_init(
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s->irq = irq; |
s->irq = irq; |
s->dma = dma; |
s->dma = dma; |
s->base = base; |
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s->state = ds; |
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s->imif_base = imif_base; |
s->imif_base = imif_base; |
s->emiff_base = emiff_base; |
s->emiff_base = emiff_base; |
omap_lcdc_reset(s); |
omap_lcdc_reset(s); |
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iomemtype = cpu_register_io_memory(0, omap_lcdc_readfn, |
iomemtype = cpu_register_io_memory(0, omap_lcdc_readfn, |
omap_lcdc_writefn, s); |
omap_lcdc_writefn, s); |
cpu_register_physical_memory(s->base, 0x100, iomemtype); |
cpu_register_physical_memory(base, 0x100, iomemtype); |
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graphic_console_init(ds, omap_update_display, |
s->state = graphic_console_init(omap_update_display, |
omap_invalidate_display, omap_screen_dump, s); |
omap_invalidate_display, |
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omap_screen_dump, NULL, s); |
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return s; |
return s; |
} |
} |