Annotation of qemu/hw/omap_lcdc.c, revision 1.1.1.7
1.1 root 1: /*
2: * OMAP LCD controller.
3: *
4: * Copyright (C) 2006-2007 Andrzej Zaborowski <balrog@zabor.org>
5: *
6: * This program is free software; you can redistribute it and/or
7: * modify it under the terms of the GNU General Public License as
8: * published by the Free Software Foundation; either version 2 of
9: * the License, or (at your option) any later version.
10: *
11: * This program is distributed in the hope that it will be useful,
12: * but WITHOUT ANY WARRANTY; without even the implied warranty of
13: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14: * GNU General Public License for more details.
15: *
1.1.1.2 root 16: * You should have received a copy of the GNU General Public License along
1.1.1.3 root 17: * with this program; if not, see <http://www.gnu.org/licenses/>.
1.1 root 18: */
19: #include "hw.h"
20: #include "console.h"
21: #include "omap.h"
1.1.1.3 root 22: #include "framebuffer.h"
1.1 root 23:
24: struct omap_lcd_panel_s {
1.1.1.7 ! root 25: MemoryRegion *sysmem;
! 26: MemoryRegion iomem;
1.1 root 27: qemu_irq irq;
28: DisplayState *state;
29:
30: int plm;
31: int tft;
32: int mono;
33: int enable;
34: int width;
35: int height;
36: int interrupts;
37: uint32_t timing[3];
38: uint32_t subpanel;
39: uint32_t ctrl;
40:
41: struct omap_dma_lcd_channel_s *dma;
42: uint16_t palette[256];
43: int palette_done;
44: int frame_done;
45: int invalidate;
46: int sync_error;
47: };
48:
49: static void omap_lcd_interrupts(struct omap_lcd_panel_s *s)
50: {
51: if (s->frame_done && (s->interrupts & 1)) {
52: qemu_irq_raise(s->irq);
53: return;
54: }
55:
56: if (s->palette_done && (s->interrupts & 2)) {
57: qemu_irq_raise(s->irq);
58: return;
59: }
60:
61: if (s->sync_error) {
62: qemu_irq_raise(s->irq);
63: return;
64: }
65:
66: qemu_irq_lower(s->irq);
67: }
68:
69: #include "pixel_ops.h"
70:
1.1.1.3 root 71: #define draw_line_func drawfn
1.1 root 72:
73: #define DEPTH 8
74: #include "omap_lcd_template.h"
75: #define DEPTH 15
76: #include "omap_lcd_template.h"
77: #define DEPTH 16
78: #include "omap_lcd_template.h"
79: #define DEPTH 32
80: #include "omap_lcd_template.h"
81:
1.1.1.3 root 82: static draw_line_func draw_line_table2[33] = {
1.1.1.4 root 83: [0 ... 32] = NULL,
1.1 root 84: [8] = draw_line2_8,
85: [15] = draw_line2_15,
86: [16] = draw_line2_16,
87: [32] = draw_line2_32,
1.1.1.3 root 88: }, draw_line_table4[33] = {
1.1.1.4 root 89: [0 ... 32] = NULL,
1.1 root 90: [8] = draw_line4_8,
91: [15] = draw_line4_15,
92: [16] = draw_line4_16,
93: [32] = draw_line4_32,
1.1.1.3 root 94: }, draw_line_table8[33] = {
1.1.1.4 root 95: [0 ... 32] = NULL,
1.1 root 96: [8] = draw_line8_8,
97: [15] = draw_line8_15,
98: [16] = draw_line8_16,
99: [32] = draw_line8_32,
1.1.1.3 root 100: }, draw_line_table12[33] = {
1.1.1.4 root 101: [0 ... 32] = NULL,
1.1 root 102: [8] = draw_line12_8,
103: [15] = draw_line12_15,
104: [16] = draw_line12_16,
105: [32] = draw_line12_32,
1.1.1.3 root 106: }, draw_line_table16[33] = {
1.1.1.4 root 107: [0 ... 32] = NULL,
1.1 root 108: [8] = draw_line16_8,
109: [15] = draw_line16_15,
110: [16] = draw_line16_16,
111: [32] = draw_line16_32,
112: };
113:
114: static void omap_update_display(void *opaque)
115: {
116: struct omap_lcd_panel_s *omap_lcd = (struct omap_lcd_panel_s *) opaque;
1.1.1.3 root 117: draw_line_func draw_line;
118: int size, height, first, last;
119: int width, linesize, step, bpp, frame_offset;
120: target_phys_addr_t frame_base;
1.1 root 121:
122: if (!omap_lcd || omap_lcd->plm == 1 ||
1.1.1.2 root 123: !omap_lcd->enable || !ds_get_bits_per_pixel(omap_lcd->state))
1.1 root 124: return;
125:
126: frame_offset = 0;
127: if (omap_lcd->plm != 2) {
1.1.1.3 root 128: cpu_physical_memory_read(omap_lcd->dma->phys_framebuffer[
129: omap_lcd->dma->current_frame],
130: (void *)omap_lcd->palette, 0x200);
1.1 root 131: switch (omap_lcd->palette[0] >> 12 & 7) {
132: case 3 ... 7:
133: frame_offset += 0x200;
134: break;
135: default:
136: frame_offset += 0x20;
137: }
138: }
139:
140: /* Colour depth */
141: switch ((omap_lcd->palette[0] >> 12) & 7) {
142: case 1:
1.1.1.2 root 143: draw_line = draw_line_table2[ds_get_bits_per_pixel(omap_lcd->state)];
1.1 root 144: bpp = 2;
145: break;
146:
147: case 2:
1.1.1.2 root 148: draw_line = draw_line_table4[ds_get_bits_per_pixel(omap_lcd->state)];
1.1 root 149: bpp = 4;
150: break;
151:
152: case 3:
1.1.1.2 root 153: draw_line = draw_line_table8[ds_get_bits_per_pixel(omap_lcd->state)];
1.1 root 154: bpp = 8;
155: break;
156:
157: case 4 ... 7:
158: if (!omap_lcd->tft)
1.1.1.2 root 159: draw_line = draw_line_table12[ds_get_bits_per_pixel(omap_lcd->state)];
1.1 root 160: else
1.1.1.2 root 161: draw_line = draw_line_table16[ds_get_bits_per_pixel(omap_lcd->state)];
1.1 root 162: bpp = 16;
163: break;
164:
165: default:
166: /* Unsupported at the moment. */
167: return;
168: }
169:
170: /* Resolution */
171: width = omap_lcd->width;
1.1.1.2 root 172: if (width != ds_get_width(omap_lcd->state) ||
173: omap_lcd->height != ds_get_height(omap_lcd->state)) {
174: qemu_console_resize(omap_lcd->state,
175: omap_lcd->width, omap_lcd->height);
1.1 root 176: omap_lcd->invalidate = 1;
177: }
178:
179: if (omap_lcd->dma->current_frame == 0)
180: size = omap_lcd->dma->src_f1_bottom - omap_lcd->dma->src_f1_top;
181: else
182: size = omap_lcd->dma->src_f2_bottom - omap_lcd->dma->src_f2_top;
183:
184: if (frame_offset + ((width * omap_lcd->height * bpp) >> 3) > size + 2) {
185: omap_lcd->sync_error = 1;
186: omap_lcd_interrupts(omap_lcd);
187: omap_lcd->enable = 0;
188: return;
189: }
190:
191: /* Content */
192: frame_base = omap_lcd->dma->phys_framebuffer[
193: omap_lcd->dma->current_frame] + frame_offset;
194: omap_lcd->dma->condition |= 1 << omap_lcd->dma->current_frame;
195: if (omap_lcd->dma->interrupts & 1)
196: qemu_irq_raise(omap_lcd->dma->irq);
197: if (omap_lcd->dma->dual)
198: omap_lcd->dma->current_frame ^= 1;
199:
1.1.1.2 root 200: if (!ds_get_bits_per_pixel(omap_lcd->state))
1.1 root 201: return;
202:
1.1.1.3 root 203: first = 0;
1.1 root 204: height = omap_lcd->height;
205: if (omap_lcd->subpanel & (1 << 31)) {
206: if (omap_lcd->subpanel & (1 << 29))
1.1.1.3 root 207: first = (omap_lcd->subpanel >> 16) & 0x3ff;
1.1 root 208: else
209: height = (omap_lcd->subpanel >> 16) & 0x3ff;
210: /* TODO: fill the rest of the panel with DPD */
211: }
1.1.1.3 root 212:
1.1 root 213: step = width * bpp >> 3;
1.1.1.2 root 214: linesize = ds_get_linesize(omap_lcd->state);
1.1.1.7 ! root 215: framebuffer_update_display(omap_lcd->state, omap_lcd->sysmem,
1.1.1.3 root 216: frame_base, width, height,
217: step, linesize, 0,
218: omap_lcd->invalidate,
219: draw_line, omap_lcd->palette,
220: &first, &last);
221: if (first >= 0) {
222: dpy_update(omap_lcd->state, 0, first, width, last - first + 1);
1.1 root 223: }
1.1.1.3 root 224: omap_lcd->invalidate = 0;
1.1 root 225: }
226:
227: static int ppm_save(const char *filename, uint8_t *data,
228: int w, int h, int linesize)
229: {
230: FILE *f;
231: uint8_t *d, *d1;
232: unsigned int v;
233: int y, x, bpp;
234:
235: f = fopen(filename, "wb");
236: if (!f)
237: return -1;
238: fprintf(f, "P6\n%d %d\n%d\n", w, h, 255);
239: d1 = data;
240: bpp = linesize / w;
241: for (y = 0; y < h; y ++) {
242: d = d1;
243: for (x = 0; x < w; x ++) {
244: v = *(uint32_t *) d;
245: switch (bpp) {
246: case 2:
247: fputc((v >> 8) & 0xf8, f);
248: fputc((v >> 3) & 0xfc, f);
249: fputc((v << 3) & 0xf8, f);
250: break;
251: case 3:
252: case 4:
253: default:
254: fputc((v >> 16) & 0xff, f);
255: fputc((v >> 8) & 0xff, f);
256: fputc((v) & 0xff, f);
257: break;
258: }
259: d += bpp;
260: }
261: d1 += linesize;
262: }
263: fclose(f);
264: return 0;
265: }
266:
1.1.1.7 ! root 267: static void omap_screen_dump(void *opaque, const char *filename, bool cswitch)
! 268: {
1.1 root 269: struct omap_lcd_panel_s *omap_lcd = opaque;
1.1.1.7 ! root 270:
1.1 root 271: omap_update_display(opaque);
1.1.1.2 root 272: if (omap_lcd && ds_get_data(omap_lcd->state))
273: ppm_save(filename, ds_get_data(omap_lcd->state),
1.1 root 274: omap_lcd->width, omap_lcd->height,
1.1.1.2 root 275: ds_get_linesize(omap_lcd->state));
1.1 root 276: }
277:
278: static void omap_invalidate_display(void *opaque) {
279: struct omap_lcd_panel_s *omap_lcd = opaque;
280: omap_lcd->invalidate = 1;
281: }
282:
283: static void omap_lcd_update(struct omap_lcd_panel_s *s) {
284: if (!s->enable) {
285: s->dma->current_frame = -1;
286: s->sync_error = 0;
287: if (s->plm != 1)
288: s->frame_done = 1;
289: omap_lcd_interrupts(s);
290: return;
291: }
292:
293: if (s->dma->current_frame == -1) {
294: s->frame_done = 0;
295: s->palette_done = 0;
296: s->dma->current_frame = 0;
297: }
298:
299: if (!s->dma->mpu->port[s->dma->src].addr_valid(s->dma->mpu,
300: s->dma->src_f1_top) ||
301: !s->dma->mpu->port[
302: s->dma->src].addr_valid(s->dma->mpu,
303: s->dma->src_f1_bottom) ||
304: (s->dma->dual &&
305: (!s->dma->mpu->port[
306: s->dma->src].addr_valid(s->dma->mpu,
307: s->dma->src_f2_top) ||
308: !s->dma->mpu->port[
309: s->dma->src].addr_valid(s->dma->mpu,
310: s->dma->src_f2_bottom)))) {
311: s->dma->condition |= 1 << 2;
312: if (s->dma->interrupts & (1 << 1))
313: qemu_irq_raise(s->dma->irq);
314: s->enable = 0;
315: return;
316: }
317:
1.1.1.3 root 318: s->dma->phys_framebuffer[0] = s->dma->src_f1_top;
319: s->dma->phys_framebuffer[1] = s->dma->src_f2_top;
1.1 root 320:
321: if (s->plm != 2 && !s->palette_done) {
1.1.1.3 root 322: cpu_physical_memory_read(
323: s->dma->phys_framebuffer[s->dma->current_frame],
324: (void *)s->palette, 0x200);
1.1 root 325: s->palette_done = 1;
326: omap_lcd_interrupts(s);
327: }
328: }
329:
1.1.1.7 ! root 330: static uint64_t omap_lcdc_read(void *opaque, target_phys_addr_t addr,
! 331: unsigned size)
1.1 root 332: {
333: struct omap_lcd_panel_s *s = (struct omap_lcd_panel_s *) opaque;
334:
1.1.1.2 root 335: switch (addr) {
1.1 root 336: case 0x00: /* LCD_CONTROL */
337: return (s->tft << 23) | (s->plm << 20) |
338: (s->tft << 7) | (s->interrupts << 3) |
339: (s->mono << 1) | s->enable | s->ctrl | 0xfe000c34;
340:
341: case 0x04: /* LCD_TIMING0 */
342: return (s->timing[0] << 10) | (s->width - 1) | 0x0000000f;
343:
344: case 0x08: /* LCD_TIMING1 */
345: return (s->timing[1] << 10) | (s->height - 1);
346:
347: case 0x0c: /* LCD_TIMING2 */
348: return s->timing[2] | 0xfc000000;
349:
350: case 0x10: /* LCD_STATUS */
351: return (s->palette_done << 6) | (s->sync_error << 2) | s->frame_done;
352:
353: case 0x14: /* LCD_SUBPANEL */
354: return s->subpanel;
355:
356: default:
357: break;
358: }
359: OMAP_BAD_REG(addr);
360: return 0;
361: }
362:
363: static void omap_lcdc_write(void *opaque, target_phys_addr_t addr,
1.1.1.7 ! root 364: uint64_t value, unsigned size)
1.1 root 365: {
366: struct omap_lcd_panel_s *s = (struct omap_lcd_panel_s *) opaque;
367:
1.1.1.2 root 368: switch (addr) {
1.1 root 369: case 0x00: /* LCD_CONTROL */
370: s->plm = (value >> 20) & 3;
371: s->tft = (value >> 7) & 1;
372: s->interrupts = (value >> 3) & 3;
373: s->mono = (value >> 1) & 1;
374: s->ctrl = value & 0x01cff300;
375: if (s->enable != (value & 1)) {
376: s->enable = value & 1;
377: omap_lcd_update(s);
378: }
379: break;
380:
381: case 0x04: /* LCD_TIMING0 */
382: s->timing[0] = value >> 10;
383: s->width = (value & 0x3ff) + 1;
384: break;
385:
386: case 0x08: /* LCD_TIMING1 */
387: s->timing[1] = value >> 10;
388: s->height = (value & 0x3ff) + 1;
389: break;
390:
391: case 0x0c: /* LCD_TIMING2 */
392: s->timing[2] = value;
393: break;
394:
395: case 0x10: /* LCD_STATUS */
396: break;
397:
398: case 0x14: /* LCD_SUBPANEL */
399: s->subpanel = value & 0xa1ffffff;
400: break;
401:
402: default:
403: OMAP_BAD_REG(addr);
404: }
405: }
406:
1.1.1.7 ! root 407: static const MemoryRegionOps omap_lcdc_ops = {
! 408: .read = omap_lcdc_read,
! 409: .write = omap_lcdc_write,
! 410: .endianness = DEVICE_NATIVE_ENDIAN,
1.1 root 411: };
412:
413: void omap_lcdc_reset(struct omap_lcd_panel_s *s)
414: {
415: s->dma->current_frame = -1;
416: s->plm = 0;
417: s->tft = 0;
418: s->mono = 0;
419: s->enable = 0;
420: s->width = 0;
421: s->height = 0;
422: s->interrupts = 0;
423: s->timing[0] = 0;
424: s->timing[1] = 0;
425: s->timing[2] = 0;
426: s->subpanel = 0;
427: s->palette_done = 0;
428: s->frame_done = 0;
429: s->sync_error = 0;
430: s->invalidate = 1;
431: s->subpanel = 0;
432: s->ctrl = 0;
433: }
434:
1.1.1.7 ! root 435: struct omap_lcd_panel_s *omap_lcdc_init(MemoryRegion *sysmem,
! 436: target_phys_addr_t base,
! 437: qemu_irq irq,
! 438: struct omap_dma_lcd_channel_s *dma,
! 439: omap_clk clk)
1.1 root 440: {
441: struct omap_lcd_panel_s *s = (struct omap_lcd_panel_s *)
1.1.1.6 root 442: g_malloc0(sizeof(struct omap_lcd_panel_s));
1.1 root 443:
444: s->irq = irq;
445: s->dma = dma;
1.1.1.7 ! root 446: s->sysmem = sysmem;
1.1 root 447: omap_lcdc_reset(s);
448:
1.1.1.7 ! root 449: memory_region_init_io(&s->iomem, &omap_lcdc_ops, s, "omap.lcdc", 0x100);
! 450: memory_region_add_subregion(sysmem, base, &s->iomem);
1.1 root 451:
1.1.1.2 root 452: s->state = graphic_console_init(omap_update_display,
453: omap_invalidate_display,
454: omap_screen_dump, NULL, s);
1.1 root 455:
456: return s;
457: }
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