Diff for /qemu/hw/omap_sx1.c between versions 1.1.1.4 and 1.1.1.5

version 1.1.1.4, 2018/04/24 18:30:00 version 1.1.1.5, 2018/04/24 18:39:25
Line 32 Line 32
 #include "boards.h"  #include "boards.h"
 #include "arm-misc.h"  #include "arm-misc.h"
 #include "flash.h"  #include "flash.h"
   #include "blockdev.h"
   
 /*****************************************************************************/  /*****************************************************************************/
 /* Siemens SX1 Cellphone V1 */  /* Siemens SX1 Cellphone V1 */
Line 142  static void sx1_init(ram_addr_t ram_size Line 143  static void sx1_init(ram_addr_t ram_size
                                  qemu_ram_alloc(NULL, "omap_sx1.flash0-0",                                   qemu_ram_alloc(NULL, "omap_sx1.flash0-0",
                                                 flash_size) | IO_MEM_ROM);                                                  flash_size) | IO_MEM_ROM);
   
     io = cpu_register_io_memory(static_readfn, static_writefn, &cs0val);      io = cpu_register_io_memory(static_readfn, static_writefn, &cs0val,
                                   DEVICE_NATIVE_ENDIAN);
     cpu_register_physical_memory(OMAP_CS0_BASE + flash_size,      cpu_register_physical_memory(OMAP_CS0_BASE + flash_size,
                     OMAP_CS0_SIZE - flash_size, io);                      OMAP_CS0_SIZE - flash_size, io);
     io = cpu_register_io_memory(static_readfn, static_writefn, &cs2val);      io = cpu_register_io_memory(static_readfn, static_writefn, &cs2val,
                                   DEVICE_NATIVE_ENDIAN);
     cpu_register_physical_memory(OMAP_CS2_BASE, OMAP_CS2_SIZE, io);      cpu_register_physical_memory(OMAP_CS2_BASE, OMAP_CS2_SIZE, io);
     io = cpu_register_io_memory(static_readfn, static_writefn, &cs3val);      io = cpu_register_io_memory(static_readfn, static_writefn, &cs3val,
                                   DEVICE_NATIVE_ENDIAN);
     cpu_register_physical_memory(OMAP_CS3_BASE, OMAP_CS3_SIZE, io);      cpu_register_physical_memory(OMAP_CS3_BASE, OMAP_CS3_SIZE, io);
   
     fl_idx = 0;      fl_idx = 0;
Line 174  static void sx1_init(ram_addr_t ram_size Line 178  static void sx1_init(ram_addr_t ram_size
         cpu_register_physical_memory(OMAP_CS1_BASE, flash1_size,          cpu_register_physical_memory(OMAP_CS1_BASE, flash1_size,
                                      qemu_ram_alloc(NULL, "omap_sx1.flash1-0",                                       qemu_ram_alloc(NULL, "omap_sx1.flash1-0",
                                                     flash1_size) | IO_MEM_ROM);                                                      flash1_size) | IO_MEM_ROM);
         io = cpu_register_io_memory(static_readfn, static_writefn, &cs1val);          io = cpu_register_io_memory(static_readfn, static_writefn, &cs1val,
                                       DEVICE_NATIVE_ENDIAN);
         cpu_register_physical_memory(OMAP_CS1_BASE + flash1_size,          cpu_register_physical_memory(OMAP_CS1_BASE + flash1_size,
                         OMAP_CS1_SIZE - flash1_size, io);                          OMAP_CS1_SIZE - flash1_size, io);
   
Line 188  static void sx1_init(ram_addr_t ram_size Line 193  static void sx1_init(ram_addr_t ram_size
         }          }
         fl_idx++;          fl_idx++;
     } else {      } else {
         io = cpu_register_io_memory(static_readfn, static_writefn, &cs1val);          io = cpu_register_io_memory(static_readfn, static_writefn, &cs1val,
                                       DEVICE_NATIVE_ENDIAN);
         cpu_register_physical_memory(OMAP_CS1_BASE, OMAP_CS1_SIZE, io);          cpu_register_physical_memory(OMAP_CS1_BASE, OMAP_CS1_SIZE, io);
     }      }
   

Removed from v.1.1.1.4  
changed lines
  Added in v.1.1.1.5


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