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1.1 root 1: /*
2: * QEMU PC System Emulator
1.1.1.6 root 3: *
1.1 root 4: * Copyright (c) 2003-2004 Fabrice Bellard
1.1.1.6 root 5: *
1.1 root 6: * Permission is hereby granted, free of charge, to any person obtaining a copy
7: * of this software and associated documentation files (the "Software"), to deal
8: * in the Software without restriction, including without limitation the rights
9: * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10: * copies of the Software, and to permit persons to whom the Software is
11: * furnished to do so, subject to the following conditions:
12: *
13: * The above copyright notice and this permission notice shall be included in
14: * all copies or substantial portions of the Software.
15: *
16: * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17: * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18: * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19: * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20: * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21: * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22: * THE SOFTWARE.
23: */
1.1.1.6 root 24: #include "hw.h"
25: #include "pc.h"
26: #include "fdc.h"
27: #include "pci.h"
1.1.1.12 root 28: #include "vmware_vga.h"
29: #include "usb-uhci.h"
30: #include "usb-ohci.h"
31: #include "prep_pci.h"
32: #include "apb_pci.h"
1.1.1.6 root 33: #include "block.h"
34: #include "sysemu.h"
35: #include "audio/audio.h"
36: #include "net.h"
37: #include "smbus.h"
38: #include "boards.h"
1.1.1.11 root 39: #include "monitor.h"
1.1.1.7 root 40: #include "fw_cfg.h"
41: #include "hpet_emul.h"
1.1.1.11 root 42: #include "watchdog.h"
43: #include "smbios.h"
1.1.1.12 root 44: #include "ide.h"
45: #include "loader.h"
46: #include "elf.h"
1.1 root 47:
48: /* output Bochs bios info messages */
49: //#define DEBUG_BIOS
50:
1.1.1.11 root 51: /* Show multiboot debug output */
52: //#define DEBUG_MULTIBOOT
53:
1.1 root 54: #define BIOS_FILENAME "bios.bin"
55:
1.1.1.7 root 56: #define PC_MAX_BIOS_SIZE (4 * 1024 * 1024)
57:
1.1.1.6 root 58: /* Leave a chunk of memory at the top of RAM for the BIOS ACPI tables. */
59: #define ACPI_DATA_SIZE 0x10000
1.1.1.7 root 60: #define BIOS_CFG_IOPORT 0x510
61: #define FW_CFG_ACPI_TABLES (FW_CFG_ARCH_LOCAL + 0)
1.1.1.11 root 62: #define FW_CFG_SMBIOS_ENTRIES (FW_CFG_ARCH_LOCAL + 1)
1.1.1.12 root 63: #define FW_CFG_IRQ0_OVERRIDE (FW_CFG_ARCH_LOCAL + 2)
1.1.1.6 root 64:
65: #define MAX_IDE_BUS 2
1.1 root 66:
67: static fdctrl_t *floppy_controller;
68: static RTCState *rtc_state;
69: static PITState *pit;
1.1.1.12 root 70: static PCII440FXState *i440fx_state;
1.1 root 71:
1.1.1.12 root 72: typedef struct isa_irq_state {
73: qemu_irq *i8259;
74: qemu_irq *ioapic;
75: } IsaIrqState;
1.1.1.9 root 76:
1.1.1.12 root 77: static void isa_irq_handler(void *opaque, int n, int level)
1.1.1.9 root 78: {
1.1.1.12 root 79: IsaIrqState *isa = (IsaIrqState *)opaque;
1.1.1.9 root 80:
1.1.1.12 root 81: if (n < 16) {
82: qemu_set_irq(isa->i8259[n], level);
83: }
84: if (isa->ioapic)
85: qemu_set_irq(isa->ioapic[n], level);
86: };
1.1.1.9 root 87:
1.1 root 88: static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
89: {
90: }
91:
92: /* MSDOS compatibility mode FPU exception support */
1.1.1.6 root 93: static qemu_irq ferr_irq;
1.1 root 94: /* XXX: add IGNNE support */
95: void cpu_set_ferr(CPUX86State *s)
96: {
1.1.1.6 root 97: qemu_irq_raise(ferr_irq);
1.1 root 98: }
99:
100: static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
101: {
1.1.1.6 root 102: qemu_irq_lower(ferr_irq);
1.1 root 103: }
104:
105: /* TSC handling */
106: uint64_t cpu_get_tsc(CPUX86State *env)
107: {
1.1.1.12 root 108: return cpu_get_ticks();
1.1 root 109: }
110:
1.1.1.5 root 111: /* SMM support */
112: void cpu_smm_update(CPUState *env)
113: {
114: if (i440fx_state && env == first_cpu)
115: i440fx_set_smm(i440fx_state, (env->hflags >> HF_SMM_SHIFT) & 1);
116: }
117:
118:
1.1 root 119: /* IRQ handling */
120: int cpu_get_pic_interrupt(CPUState *env)
121: {
122: int intno;
123:
124: intno = apic_get_interrupt(env);
125: if (intno >= 0) {
126: /* set irq request if a PIC irq is still pending */
127: /* XXX: improve that */
1.1.1.6 root 128: pic_update_irq(isa_pic);
1.1 root 129: return intno;
130: }
131: /* read the irq from the PIC */
1.1.1.6 root 132: if (!apic_accept_pic_intr(env))
133: return -1;
134:
1.1 root 135: intno = pic_read_irq(isa_pic);
136: return intno;
137: }
138:
1.1.1.6 root 139: static void pic_irq_request(void *opaque, int irq, int level)
1.1 root 140: {
1.1.1.7 root 141: CPUState *env = first_cpu;
142:
143: if (env->apic_state) {
144: while (env) {
145: if (apic_accept_pic_intr(env))
146: apic_deliver_pic_intr(env, level);
147: env = env->next_cpu;
148: }
149: } else {
150: if (level)
151: cpu_interrupt(env, CPU_INTERRUPT_HARD);
152: else
153: cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
154: }
1.1 root 155: }
156:
157: /* PC cmos mappings */
158:
159: #define REG_EQUIPMENT_BYTE 0x14
160:
161: static int cmos_get_fd_drive_type(int fd0)
162: {
163: int val;
164:
165: switch (fd0) {
166: case 0:
167: /* 1.44 Mb 3"5 drive */
168: val = 4;
169: break;
170: case 1:
171: /* 2.88 Mb 3"5 drive */
172: val = 5;
173: break;
174: case 2:
175: /* 1.2 Mb 5"5 drive */
176: val = 2;
177: break;
178: default:
179: val = 0;
180: break;
181: }
182: return val;
183: }
184:
1.1.1.6 root 185: static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
1.1 root 186: {
187: RTCState *s = rtc_state;
188: int cylinders, heads, sectors;
189: bdrv_get_geometry_hint(hd, &cylinders, &heads, §ors);
190: rtc_set_memory(s, type_ofs, 47);
191: rtc_set_memory(s, info_ofs, cylinders);
192: rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
193: rtc_set_memory(s, info_ofs + 2, heads);
194: rtc_set_memory(s, info_ofs + 3, 0xff);
195: rtc_set_memory(s, info_ofs + 4, 0xff);
196: rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
197: rtc_set_memory(s, info_ofs + 6, cylinders);
198: rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
199: rtc_set_memory(s, info_ofs + 8, sectors);
200: }
201:
1.1.1.6 root 202: /* convert boot_device letter to something recognizable by the bios */
203: static int boot_device2nibble(char boot_device)
204: {
205: switch(boot_device) {
206: case 'a':
207: case 'b':
208: return 0x01; /* floppy boot */
209: case 'c':
210: return 0x02; /* hard drive boot */
211: case 'd':
212: return 0x03; /* CD-ROM boot */
213: case 'n':
214: return 0x04; /* Network boot */
215: }
216: return 0;
217: }
218:
1.1.1.7 root 219: /* copy/pasted from cmos_init, should be made a general function
220: and used there as well */
221: static int pc_boot_set(void *opaque, const char *boot_device)
222: {
1.1.1.11 root 223: Monitor *mon = cur_mon;
1.1.1.7 root 224: #define PC_MAX_BOOT_DEVICES 3
225: RTCState *s = (RTCState *)opaque;
226: int nbds, bds[3] = { 0, };
227: int i;
228:
229: nbds = strlen(boot_device);
230: if (nbds > PC_MAX_BOOT_DEVICES) {
1.1.1.11 root 231: monitor_printf(mon, "Too many boot devices for PC\n");
1.1.1.7 root 232: return(1);
233: }
234: for (i = 0; i < nbds; i++) {
235: bds[i] = boot_device2nibble(boot_device[i]);
236: if (bds[i] == 0) {
1.1.1.11 root 237: monitor_printf(mon, "Invalid boot device for PC: '%c'\n",
238: boot_device[i]);
1.1.1.7 root 239: return(1);
240: }
241: }
242: rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
243: rtc_set_memory(s, 0x38, (bds[2] << 4));
244: return(0);
245: }
246:
1.1 root 247: /* hd_table must contain 4 block drivers */
1.1.1.7 root 248: static void cmos_init(ram_addr_t ram_size, ram_addr_t above_4g_mem_size,
1.1.1.12 root 249: const char *boot_device, DriveInfo **hd_table)
1.1 root 250: {
251: RTCState *s = rtc_state;
1.1.1.6 root 252: int nbds, bds[3] = { 0, };
1.1 root 253: int val;
254: int fd0, fd1, nb;
255: int i;
256:
257: /* various important CMOS locations needed by PC/Bochs bios */
258:
259: /* memory size */
260: val = 640; /* base memory in K */
261: rtc_set_memory(s, 0x15, val);
262: rtc_set_memory(s, 0x16, val >> 8);
263:
264: val = (ram_size / 1024) - 1024;
265: if (val > 65535)
266: val = 65535;
267: rtc_set_memory(s, 0x17, val);
268: rtc_set_memory(s, 0x18, val >> 8);
269: rtc_set_memory(s, 0x30, val);
270: rtc_set_memory(s, 0x31, val >> 8);
271:
1.1.1.7 root 272: if (above_4g_mem_size) {
273: rtc_set_memory(s, 0x5b, (unsigned int)above_4g_mem_size >> 16);
274: rtc_set_memory(s, 0x5c, (unsigned int)above_4g_mem_size >> 24);
275: rtc_set_memory(s, 0x5d, (uint64_t)above_4g_mem_size >> 32);
276: }
277:
1.1 root 278: if (ram_size > (16 * 1024 * 1024))
279: val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
280: else
281: val = 0;
282: if (val > 65535)
283: val = 65535;
284: rtc_set_memory(s, 0x34, val);
285: rtc_set_memory(s, 0x35, val >> 8);
1.1.1.6 root 286:
1.1.1.7 root 287: /* set the number of CPU */
288: rtc_set_memory(s, 0x5f, smp_cpus - 1);
289:
1.1.1.6 root 290: /* set boot devices, and disable floppy signature check if requested */
291: #define PC_MAX_BOOT_DEVICES 3
292: nbds = strlen(boot_device);
293: if (nbds > PC_MAX_BOOT_DEVICES) {
294: fprintf(stderr, "Too many boot devices for PC\n");
295: exit(1);
1.1 root 296: }
1.1.1.6 root 297: for (i = 0; i < nbds; i++) {
298: bds[i] = boot_device2nibble(boot_device[i]);
299: if (bds[i] == 0) {
300: fprintf(stderr, "Invalid boot device for PC: '%c'\n",
301: boot_device[i]);
302: exit(1);
303: }
304: }
305: rtc_set_memory(s, 0x3d, (bds[1] << 4) | bds[0]);
306: rtc_set_memory(s, 0x38, (bds[2] << 4) | (fd_bootchk ? 0x0 : 0x1));
1.1 root 307:
308: /* floppy type */
309:
310: fd0 = fdctrl_get_drive_type(floppy_controller, 0);
311: fd1 = fdctrl_get_drive_type(floppy_controller, 1);
312:
313: val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
314: rtc_set_memory(s, 0x10, val);
1.1.1.6 root 315:
1.1 root 316: val = 0;
317: nb = 0;
318: if (fd0 < 3)
319: nb++;
320: if (fd1 < 3)
321: nb++;
322: switch (nb) {
323: case 0:
324: break;
325: case 1:
326: val |= 0x01; /* 1 drive, ready for boot */
327: break;
328: case 2:
329: val |= 0x41; /* 2 drives, ready for boot */
330: break;
331: }
332: val |= 0x02; /* FPU is there */
333: val |= 0x04; /* PS/2 mouse installed */
334: rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
335:
336: /* hard drives */
337:
338: rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
339: if (hd_table[0])
1.1.1.12 root 340: cmos_init_hd(0x19, 0x1b, hd_table[0]->bdrv);
1.1.1.6 root 341: if (hd_table[1])
1.1.1.12 root 342: cmos_init_hd(0x1a, 0x24, hd_table[1]->bdrv);
1.1 root 343:
344: val = 0;
345: for (i = 0; i < 4; i++) {
346: if (hd_table[i]) {
347: int cylinders, heads, sectors, translation;
348: /* NOTE: bdrv_get_geometry_hint() returns the physical
349: geometry. It is always such that: 1 <= sects <= 63, 1
350: <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
351: geometry can be different if a translation is done. */
1.1.1.12 root 352: translation = bdrv_get_translation_hint(hd_table[i]->bdrv);
1.1 root 353: if (translation == BIOS_ATA_TRANSLATION_AUTO) {
1.1.1.12 root 354: bdrv_get_geometry_hint(hd_table[i]->bdrv, &cylinders, &heads, §ors);
1.1 root 355: if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
356: /* No translation. */
357: translation = 0;
358: } else {
359: /* LBA translation. */
360: translation = 1;
361: }
362: } else {
363: translation--;
364: }
365: val |= translation << (i * 2);
366: }
367: }
368: rtc_set_memory(s, 0x39, val);
369: }
370:
1.1.1.2 root 371: void ioport_set_a20(int enable)
372: {
373: /* XXX: send to all CPUs ? */
374: cpu_x86_set_a20(first_cpu, enable);
375: }
376:
377: int ioport_get_a20(void)
378: {
379: return ((first_cpu->a20_mask >> 20) & 1);
380: }
381:
1.1 root 382: static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
383: {
1.1.1.2 root 384: ioport_set_a20((val >> 1) & 1);
1.1 root 385: /* XXX: bit 0 is fast reset */
386: }
387:
388: static uint32_t ioport92_read(void *opaque, uint32_t addr)
389: {
1.1.1.2 root 390: return ioport_get_a20() << 1;
1.1 root 391: }
392:
393: /***********************************************************/
394: /* Bochs BIOS debug ports */
395:
1.1.1.6 root 396: static void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
1.1 root 397: {
398: static const char shutdown_str[8] = "Shutdown";
399: static int shutdown_index = 0;
1.1.1.6 root 400:
1.1 root 401: switch(addr) {
402: /* Bochs BIOS messages */
403: case 0x400:
404: case 0x401:
405: fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
406: exit(1);
407: case 0x402:
408: case 0x403:
409: #ifdef DEBUG_BIOS
410: fprintf(stderr, "%c", val);
411: #endif
412: break;
413: case 0x8900:
414: /* same as Bochs power off */
415: if (val == shutdown_str[shutdown_index]) {
416: shutdown_index++;
417: if (shutdown_index == 8) {
418: shutdown_index = 0;
419: qemu_system_shutdown_request();
420: }
421: } else {
422: shutdown_index = 0;
423: }
424: break;
425:
426: /* LGPL'ed VGA BIOS messages */
427: case 0x501:
428: case 0x502:
429: fprintf(stderr, "VGA BIOS panic, line %d\n", val);
430: exit(1);
431: case 0x500:
432: case 0x503:
433: #ifdef DEBUG_BIOS
434: fprintf(stderr, "%c", val);
435: #endif
436: break;
437: }
438: }
439:
1.1.1.11 root 440: static void *bochs_bios_init(void)
1.1 root 441: {
1.1.1.7 root 442: void *fw_cfg;
1.1.1.11 root 443: uint8_t *smbios_table;
444: size_t smbios_len;
445: uint64_t *numa_fw_cfg;
446: int i, j;
1.1.1.7 root 447:
1.1 root 448: register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
449: register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
450: register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
451: register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
452: register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
453:
454: register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
455: register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
456: register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
457: register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
1.1.1.7 root 458:
459: fw_cfg = fw_cfg_init(BIOS_CFG_IOPORT, BIOS_CFG_IOPORT + 1, 0, 0);
1.1.1.11 root 460:
1.1.1.7 root 461: fw_cfg_add_i32(fw_cfg, FW_CFG_ID, 1);
462: fw_cfg_add_i64(fw_cfg, FW_CFG_RAM_SIZE, (uint64_t)ram_size);
1.1.1.11 root 463: fw_cfg_add_bytes(fw_cfg, FW_CFG_ACPI_TABLES, (uint8_t *)acpi_tables,
464: acpi_tables_len);
1.1.1.12 root 465: fw_cfg_add_bytes(fw_cfg, FW_CFG_IRQ0_OVERRIDE, &irq0override, 1);
1.1.1.11 root 466:
467: smbios_table = smbios_get_table(&smbios_len);
468: if (smbios_table)
469: fw_cfg_add_bytes(fw_cfg, FW_CFG_SMBIOS_ENTRIES,
470: smbios_table, smbios_len);
471:
472: /* allocate memory for the NUMA channel: one (64bit) word for the number
473: * of nodes, one word for each VCPU->node and one word for each node to
474: * hold the amount of memory.
475: */
476: numa_fw_cfg = qemu_mallocz((1 + smp_cpus + nb_numa_nodes) * 8);
477: numa_fw_cfg[0] = cpu_to_le64(nb_numa_nodes);
478: for (i = 0; i < smp_cpus; i++) {
479: for (j = 0; j < nb_numa_nodes; j++) {
480: if (node_cpumask[j] & (1 << i)) {
481: numa_fw_cfg[i + 1] = cpu_to_le64(j);
482: break;
483: }
484: }
485: }
486: for (i = 0; i < nb_numa_nodes; i++) {
487: numa_fw_cfg[smp_cpus + 1 + i] = cpu_to_le64(node_mem[i]);
488: }
489: fw_cfg_add_bytes(fw_cfg, FW_CFG_NUMA, (uint8_t *)numa_fw_cfg,
490: (1 + smp_cpus + nb_numa_nodes) * 8);
491:
492: return fw_cfg;
1.1 root 493: }
494:
1.1.1.6 root 495: static long get_file_size(FILE *f)
496: {
497: long where, size;
498:
499: /* XXX: on Unix systems, using fstat() probably makes more sense */
500:
501: where = ftell(f);
502: fseek(f, 0, SEEK_END);
503: size = ftell(f);
504: fseek(f, where, SEEK_SET);
505:
506: return size;
507: }
508:
1.1.1.11 root 509: #define MULTIBOOT_STRUCT_ADDR 0x9000
510:
511: #if MULTIBOOT_STRUCT_ADDR > 0xf0000
512: #error multiboot struct needs to fit in 16 bit real mode
513: #endif
514:
515: static int load_multiboot(void *fw_cfg,
516: FILE *f,
517: const char *kernel_filename,
518: const char *initrd_filename,
519: const char *kernel_cmdline,
520: uint8_t *header)
521: {
1.1.1.12 root 522: int i, is_multiboot = 0;
1.1.1.11 root 523: uint32_t flags = 0;
524: uint32_t mh_entry_addr;
525: uint32_t mh_load_addr;
526: uint32_t mb_kernel_size;
527: uint32_t mmap_addr = MULTIBOOT_STRUCT_ADDR;
528: uint32_t mb_bootinfo = MULTIBOOT_STRUCT_ADDR + 0x500;
529: uint32_t mb_mod_end;
1.1.1.12 root 530: uint8_t bootinfo[0x500];
531: uint32_t cmdline = 0x200;
532: uint8_t *mb_kernel_data;
533: uint8_t *mb_bootinfo_data;
1.1.1.11 root 534:
535: /* Ok, let's see if it is a multiboot image.
536: The header is 12x32bit long, so the latest entry may be 8192 - 48. */
537: for (i = 0; i < (8192 - 48); i += 4) {
538: if (ldl_p(header+i) == 0x1BADB002) {
539: uint32_t checksum = ldl_p(header+i+8);
540: flags = ldl_p(header+i+4);
541: checksum += flags;
542: checksum += (uint32_t)0x1BADB002;
543: if (!checksum) {
544: is_multiboot = 1;
545: break;
546: }
547: }
548: }
549:
550: if (!is_multiboot)
551: return 0; /* no multiboot */
552:
553: #ifdef DEBUG_MULTIBOOT
554: fprintf(stderr, "qemu: I believe we found a multiboot image!\n");
555: #endif
1.1.1.12 root 556: memset(bootinfo, 0, sizeof(bootinfo));
1.1.1.11 root 557:
558: if (flags & 0x00000004) { /* MULTIBOOT_HEADER_HAS_VBE */
559: fprintf(stderr, "qemu: multiboot knows VBE. we don't.\n");
560: }
561: if (!(flags & 0x00010000)) { /* MULTIBOOT_HEADER_HAS_ADDR */
562: uint64_t elf_entry;
1.1.1.12 root 563: uint64_t elf_low, elf_high;
1.1.1.11 root 564: int kernel_size;
565: fclose(f);
1.1.1.12 root 566: kernel_size = load_elf(kernel_filename, 0, &elf_entry, &elf_low, &elf_high,
567: 0, ELF_MACHINE, 0);
1.1.1.11 root 568: if (kernel_size < 0) {
569: fprintf(stderr, "Error while loading elf kernel\n");
570: exit(1);
571: }
1.1.1.12 root 572: mh_load_addr = elf_low;
573: mb_kernel_size = elf_high - elf_low;
574: mh_entry_addr = elf_entry;
575:
576: mb_kernel_data = qemu_malloc(mb_kernel_size);
577: if (rom_copy(mb_kernel_data, mh_load_addr, mb_kernel_size) != mb_kernel_size) {
578: fprintf(stderr, "Error while fetching elf kernel from rom\n");
579: exit(1);
580: }
1.1.1.11 root 581:
582: #ifdef DEBUG_MULTIBOOT
583: fprintf(stderr, "qemu: loading multiboot-elf kernel (%#x bytes) with entry %#zx\n",
584: mb_kernel_size, (size_t)mh_entry_addr);
585: #endif
586: } else {
587: /* Valid if mh_flags sets MULTIBOOT_HEADER_HAS_ADDR. */
588: uint32_t mh_header_addr = ldl_p(header+i+12);
589: mh_load_addr = ldl_p(header+i+16);
590: #ifdef DEBUG_MULTIBOOT
591: uint32_t mh_load_end_addr = ldl_p(header+i+20);
592: uint32_t mh_bss_end_addr = ldl_p(header+i+24);
593: #endif
594: uint32_t mb_kernel_text_offset = i - (mh_header_addr - mh_load_addr);
595:
596: mh_entry_addr = ldl_p(header+i+28);
597: mb_kernel_size = get_file_size(f) - mb_kernel_text_offset;
598:
599: /* Valid if mh_flags sets MULTIBOOT_HEADER_HAS_VBE.
600: uint32_t mh_mode_type = ldl_p(header+i+32);
601: uint32_t mh_width = ldl_p(header+i+36);
602: uint32_t mh_height = ldl_p(header+i+40);
603: uint32_t mh_depth = ldl_p(header+i+44); */
604:
605: #ifdef DEBUG_MULTIBOOT
606: fprintf(stderr, "multiboot: mh_header_addr = %#x\n", mh_header_addr);
607: fprintf(stderr, "multiboot: mh_load_addr = %#x\n", mh_load_addr);
608: fprintf(stderr, "multiboot: mh_load_end_addr = %#x\n", mh_load_end_addr);
609: fprintf(stderr, "multiboot: mh_bss_end_addr = %#x\n", mh_bss_end_addr);
610: fprintf(stderr, "qemu: loading multiboot kernel (%#x bytes) at %#x\n",
611: mb_kernel_size, mh_load_addr);
612: #endif
613:
1.1.1.12 root 614: mb_kernel_data = qemu_malloc(mb_kernel_size);
615: fseek(f, mb_kernel_text_offset, SEEK_SET);
616: fread(mb_kernel_data, 1, mb_kernel_size, f);
1.1.1.11 root 617: fclose(f);
618: }
619:
620: /* blob size is only the kernel for now */
621: mb_mod_end = mh_load_addr + mb_kernel_size;
622:
623: /* load modules */
1.1.1.12 root 624: stl_p(bootinfo + 20, 0x0); /* mods_count */
1.1.1.11 root 625: if (initrd_filename) {
1.1.1.12 root 626: uint32_t mb_mod_info = 0x100;
627: uint32_t mb_mod_cmdline = 0x300;
1.1.1.11 root 628: uint32_t mb_mod_start = mh_load_addr;
629: uint32_t mb_mod_length = mb_kernel_size;
630: char *next_initrd;
631: char *next_space;
632: int mb_mod_count = 0;
633:
634: do {
1.1.1.12 root 635: if (mb_mod_info + 16 > mb_mod_cmdline) {
636: printf("WARNING: Too many modules loaded, aborting.\n");
637: break;
638: }
639:
1.1.1.11 root 640: next_initrd = strchr(initrd_filename, ',');
641: if (next_initrd)
642: *next_initrd = '\0';
643: /* if a space comes after the module filename, treat everything
644: after that as parameters */
1.1.1.12 root 645: pstrcpy((char*)bootinfo + mb_mod_cmdline,
646: sizeof(bootinfo) - mb_mod_cmdline,
647: initrd_filename);
648: stl_p(bootinfo + mb_mod_info + 8, mb_bootinfo + mb_mod_cmdline); /* string */
1.1.1.11 root 649: mb_mod_cmdline += strlen(initrd_filename) + 1;
1.1.1.12 root 650: if (mb_mod_cmdline > sizeof(bootinfo)) {
651: mb_mod_cmdline = sizeof(bootinfo);
652: printf("WARNING: Too many module cmdlines loaded, aborting.\n");
653: break;
654: }
1.1.1.11 root 655: if ((next_space = strchr(initrd_filename, ' ')))
656: *next_space = '\0';
657: #ifdef DEBUG_MULTIBOOT
1.1.1.12 root 658: printf("multiboot loading module: %s\n", initrd_filename);
1.1.1.11 root 659: #endif
1.1.1.12 root 660: mb_mod_start = (mb_mod_start + mb_mod_length + (TARGET_PAGE_SIZE - 1))
661: & (TARGET_PAGE_MASK);
662: mb_mod_length = get_image_size(initrd_filename);
663: if (mb_mod_length < 0) {
664: fprintf(stderr, "failed to get %s image size\n", initrd_filename);
665: exit(1);
666: }
667: mb_mod_end = mb_mod_start + mb_mod_length;
668: mb_mod_count++;
1.1.1.11 root 669:
1.1.1.12 root 670: /* append module data at the end of last module */
671: mb_kernel_data = qemu_realloc(mb_kernel_data,
672: mb_mod_end - mh_load_addr);
673: load_image(initrd_filename,
674: mb_kernel_data + mb_mod_start - mh_load_addr);
675:
676: stl_p(bootinfo + mb_mod_info + 0, mb_mod_start);
677: stl_p(bootinfo + mb_mod_info + 4, mb_mod_start + mb_mod_length);
678: stl_p(bootinfo + mb_mod_info + 12, 0x0); /* reserved */
1.1.1.11 root 679: #ifdef DEBUG_MULTIBOOT
1.1.1.12 root 680: printf("mod_start: %#x\nmod_end: %#x\n", mb_mod_start,
681: mb_mod_start + mb_mod_length);
1.1.1.11 root 682: #endif
683: initrd_filename = next_initrd+1;
684: mb_mod_info += 16;
685: } while (next_initrd);
1.1.1.12 root 686: stl_p(bootinfo + 20, mb_mod_count); /* mods_count */
687: stl_p(bootinfo + 24, mb_bootinfo + 0x100); /* mods_addr */
1.1.1.11 root 688: }
689:
690: /* Commandline support */
1.1.1.12 root 691: stl_p(bootinfo + 16, mb_bootinfo + cmdline);
692: snprintf((char*)bootinfo + cmdline, 0x100, "%s %s",
693: kernel_filename, kernel_cmdline);
1.1.1.11 root 694:
695: /* the kernel is where we want it to be now */
696: #define MULTIBOOT_FLAGS_MEMORY (1 << 0)
697: #define MULTIBOOT_FLAGS_BOOT_DEVICE (1 << 1)
698: #define MULTIBOOT_FLAGS_CMDLINE (1 << 2)
699: #define MULTIBOOT_FLAGS_MODULES (1 << 3)
700: #define MULTIBOOT_FLAGS_MMAP (1 << 6)
1.1.1.12 root 701: stl_p(bootinfo, MULTIBOOT_FLAGS_MEMORY
702: | MULTIBOOT_FLAGS_BOOT_DEVICE
703: | MULTIBOOT_FLAGS_CMDLINE
704: | MULTIBOOT_FLAGS_MODULES
705: | MULTIBOOT_FLAGS_MMAP);
706: stl_p(bootinfo + 4, 640); /* mem_lower */
707: stl_p(bootinfo + 8, ram_size / 1024); /* mem_upper */
708: stl_p(bootinfo + 12, 0x8001ffff); /* XXX: use the -boot switch? */
709: stl_p(bootinfo + 48, mmap_addr); /* mmap_addr */
1.1.1.11 root 710:
711: #ifdef DEBUG_MULTIBOOT
712: fprintf(stderr, "multiboot: mh_entry_addr = %#x\n", mh_entry_addr);
713: #endif
714:
1.1.1.12 root 715: /* save bootinfo off the stack */
716: mb_bootinfo_data = qemu_malloc(sizeof(bootinfo));
717: memcpy(mb_bootinfo_data, bootinfo, sizeof(bootinfo));
718:
1.1.1.11 root 719: /* Pass variables to option rom */
1.1.1.12 root 720: fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ENTRY, mh_entry_addr);
721: fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, mh_load_addr);
722: fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, mb_mod_end - mh_load_addr);
723: fw_cfg_add_bytes(fw_cfg, FW_CFG_KERNEL_DATA, mb_kernel_data,
724: mb_mod_end - mh_load_addr);
1.1.1.11 root 725:
1.1.1.12 root 726: fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, mb_bootinfo);
727: fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, sizeof(bootinfo));
728: fw_cfg_add_bytes(fw_cfg, FW_CFG_INITRD_DATA, mb_bootinfo_data,
729: sizeof(bootinfo));
1.1.1.11 root 730:
731: option_rom[nb_option_roms] = "multiboot.bin";
732: nb_option_roms++;
733:
734: return 1; /* yes, we are multiboot */
735: }
736:
737: static void load_linux(void *fw_cfg,
1.1.1.7 root 738: const char *kernel_filename,
1.1.1.6 root 739: const char *initrd_filename,
1.1.1.10 root 740: const char *kernel_cmdline,
1.1.1.12 root 741: target_phys_addr_t max_ram_size)
1.1.1.6 root 742: {
743: uint16_t protocol;
1.1.1.11 root 744: int setup_size, kernel_size, initrd_size = 0, cmdline_size;
1.1.1.6 root 745: uint32_t initrd_max;
1.1.1.12 root 746: uint8_t header[8192], *setup, *kernel, *initrd_data;
1.1.1.11 root 747: target_phys_addr_t real_addr, prot_addr, cmdline_addr, initrd_addr = 0;
1.1.1.12 root 748: FILE *f;
1.1.1.11 root 749: char *vmode;
1.1.1.6 root 750:
751: /* Align to 16 bytes as a paranoia measure */
752: cmdline_size = (strlen(kernel_cmdline)+16) & ~15;
753:
754: /* load the kernel header */
755: f = fopen(kernel_filename, "rb");
756: if (!f || !(kernel_size = get_file_size(f)) ||
1.1.1.11 root 757: fread(header, 1, MIN(ARRAY_SIZE(header), kernel_size), f) !=
758: MIN(ARRAY_SIZE(header), kernel_size)) {
1.1.1.12 root 759: fprintf(stderr, "qemu: could not load kernel '%s': %s\n",
760: kernel_filename, strerror(errno));
1.1.1.6 root 761: exit(1);
762: }
763:
764: /* kernel protocol version */
765: #if 0
766: fprintf(stderr, "header magic: %#x\n", ldl_p(header+0x202));
767: #endif
768: if (ldl_p(header+0x202) == 0x53726448)
769: protocol = lduw_p(header+0x206);
1.1.1.11 root 770: else {
771: /* This looks like a multiboot kernel. If it is, let's stop
772: treating it like a Linux kernel. */
773: if (load_multiboot(fw_cfg, f, kernel_filename,
774: initrd_filename, kernel_cmdline, header))
1.1.1.12 root 775: return;
1.1.1.6 root 776: protocol = 0;
1.1.1.11 root 777: }
1.1.1.6 root 778:
779: if (protocol < 0x200 || !(header[0x211] & 0x01)) {
780: /* Low kernel */
1.1.1.7 root 781: real_addr = 0x90000;
782: cmdline_addr = 0x9a000 - cmdline_size;
783: prot_addr = 0x10000;
1.1.1.6 root 784: } else if (protocol < 0x202) {
785: /* High but ancient kernel */
1.1.1.7 root 786: real_addr = 0x90000;
787: cmdline_addr = 0x9a000 - cmdline_size;
788: prot_addr = 0x100000;
1.1.1.6 root 789: } else {
790: /* High and recent kernel */
1.1.1.7 root 791: real_addr = 0x10000;
792: cmdline_addr = 0x20000;
793: prot_addr = 0x100000;
1.1.1.6 root 794: }
795:
796: #if 0
797: fprintf(stderr,
1.1.1.7 root 798: "qemu: real_addr = 0x" TARGET_FMT_plx "\n"
799: "qemu: cmdline_addr = 0x" TARGET_FMT_plx "\n"
800: "qemu: prot_addr = 0x" TARGET_FMT_plx "\n",
801: real_addr,
802: cmdline_addr,
803: prot_addr);
1.1.1.6 root 804: #endif
805:
806: /* highest address for loading the initrd */
807: if (protocol >= 0x203)
808: initrd_max = ldl_p(header+0x22c);
809: else
810: initrd_max = 0x37ffffff;
811:
1.1.1.10 root 812: if (initrd_max >= max_ram_size-ACPI_DATA_SIZE)
813: initrd_max = max_ram_size-ACPI_DATA_SIZE-1;
1.1.1.6 root 814:
1.1.1.12 root 815: fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_ADDR, cmdline_addr);
816: fw_cfg_add_i32(fw_cfg, FW_CFG_CMDLINE_SIZE, strlen(kernel_cmdline)+1);
817: fw_cfg_add_bytes(fw_cfg, FW_CFG_CMDLINE_DATA,
818: (uint8_t*)strdup(kernel_cmdline),
819: strlen(kernel_cmdline)+1);
1.1.1.6 root 820:
821: if (protocol >= 0x202) {
1.1.1.7 root 822: stl_p(header+0x228, cmdline_addr);
1.1.1.6 root 823: } else {
824: stw_p(header+0x20, 0xA33F);
825: stw_p(header+0x22, cmdline_addr-real_addr);
826: }
827:
1.1.1.11 root 828: /* handle vga= parameter */
829: vmode = strstr(kernel_cmdline, "vga=");
830: if (vmode) {
831: unsigned int video_mode;
832: /* skip "vga=" */
833: vmode += 4;
834: if (!strncmp(vmode, "normal", 6)) {
835: video_mode = 0xffff;
836: } else if (!strncmp(vmode, "ext", 3)) {
837: video_mode = 0xfffe;
838: } else if (!strncmp(vmode, "ask", 3)) {
839: video_mode = 0xfffd;
840: } else {
841: video_mode = strtol(vmode, NULL, 0);
842: }
843: stw_p(header+0x1fa, video_mode);
844: }
845:
1.1.1.6 root 846: /* loader type */
847: /* High nybble = B reserved for Qemu; low nybble is revision number.
848: If this code is substantially changed, you may want to consider
849: incrementing the revision. */
850: if (protocol >= 0x200)
851: header[0x210] = 0xB0;
852:
853: /* heap */
854: if (protocol >= 0x201) {
855: header[0x211] |= 0x80; /* CAN_USE_HEAP */
856: stw_p(header+0x224, cmdline_addr-real_addr-0x200);
857: }
858:
859: /* load initrd */
860: if (initrd_filename) {
861: if (protocol < 0x200) {
862: fprintf(stderr, "qemu: linux kernel too old to load a ram disk\n");
863: exit(1);
864: }
865:
1.1.1.12 root 866: initrd_size = get_image_size(initrd_filename);
867: initrd_addr = (initrd_max-initrd_size) & ~4095;
1.1.1.6 root 868:
1.1.1.12 root 869: initrd_data = qemu_malloc(initrd_size);
870: load_image(initrd_filename, initrd_data);
1.1.1.6 root 871:
1.1.1.12 root 872: fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_ADDR, initrd_addr);
873: fw_cfg_add_i32(fw_cfg, FW_CFG_INITRD_SIZE, initrd_size);
874: fw_cfg_add_bytes(fw_cfg, FW_CFG_INITRD_DATA, initrd_data, initrd_size);
1.1.1.6 root 875:
1.1.1.7 root 876: stl_p(header+0x218, initrd_addr);
1.1.1.6 root 877: stl_p(header+0x21c, initrd_size);
878: }
879:
1.1.1.12 root 880: /* load kernel and setup */
1.1.1.6 root 881: setup_size = header[0x1f1];
882: if (setup_size == 0)
883: setup_size = 4;
884: setup_size = (setup_size+1)*512;
1.1.1.12 root 885: kernel_size -= setup_size;
1.1.1.11 root 886:
1.1.1.12 root 887: setup = qemu_malloc(setup_size);
888: kernel = qemu_malloc(kernel_size);
889: fseek(f, 0, SEEK_SET);
890: fread(setup, 1, setup_size, f);
891: fread(kernel, 1, kernel_size, f);
1.1.1.6 root 892: fclose(f);
1.1.1.12 root 893: memcpy(setup, header, MIN(sizeof(header), setup_size));
894:
895: fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_ADDR, prot_addr);
896: fw_cfg_add_i32(fw_cfg, FW_CFG_KERNEL_SIZE, kernel_size);
897: fw_cfg_add_bytes(fw_cfg, FW_CFG_KERNEL_DATA, kernel, kernel_size);
1.1.1.6 root 898:
1.1.1.12 root 899: fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_ADDR, real_addr);
900: fw_cfg_add_i32(fw_cfg, FW_CFG_SETUP_SIZE, setup_size);
901: fw_cfg_add_bytes(fw_cfg, FW_CFG_SETUP_DATA, setup, setup_size);
1.1.1.9 root 902:
1.1.1.12 root 903: option_rom[nb_option_roms] = "linuxboot.bin";
904: nb_option_roms++;
1.1.1.6 root 905: }
906:
1.1 root 907: static const int ide_iobase[2] = { 0x1f0, 0x170 };
908: static const int ide_iobase2[2] = { 0x3f6, 0x376 };
909: static const int ide_irq[2] = { 14, 15 };
910:
911: #define NE2000_NB_MAX 6
912:
1.1.1.12 root 913: static const int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360,
914: 0x280, 0x380 };
915: static const int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
1.1 root 916:
1.1.1.12 root 917: static const int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
918: static const int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
1.1 root 919:
1.1.1.2 root 920: #ifdef HAS_AUDIO
1.1.1.6 root 921: static void audio_init (PCIBus *pci_bus, qemu_irq *pic)
1.1.1.2 root 922: {
923: struct soundhw *c;
924:
1.1.1.11 root 925: for (c = soundhw; c->name; ++c) {
926: if (c->enabled) {
927: if (c->isa) {
928: c->init.init_isa(pic);
929: } else {
930: if (pci_bus) {
931: c->init.init_pci(pci_bus);
1.1.1.2 root 932: }
933: }
934: }
935: }
936: }
937: #endif
938:
1.1.1.12 root 939: static void pc_init_ne2k_isa(NICInfo *nd)
1.1.1.3 root 940: {
941: static int nb_ne2k = 0;
942:
943: if (nb_ne2k == NE2000_NB_MAX)
944: return;
1.1.1.12 root 945: isa_ne2000_init(ne2000_io[nb_ne2k],
946: ne2000_irq[nb_ne2k], nd);
1.1.1.3 root 947: nb_ne2k++;
948: }
949:
1.1.1.11 root 950: int cpu_is_bsp(CPUState *env)
951: {
1.1.1.12 root 952: return env->cpuid_apic_id == 0;
1.1.1.11 root 953: }
954:
955: static CPUState *pc_new_cpu(const char *cpu_model)
956: {
957: CPUState *env;
958:
959: env = cpu_init(cpu_model);
960: if (!env) {
961: fprintf(stderr, "Unable to find x86 CPU definition\n");
962: exit(1);
963: }
964: if ((env->cpuid_features & CPUID_APIC) || smp_cpus > 1) {
965: env->cpuid_apic_id = env->cpu_index;
966: /* APIC reset callback resets cpu */
967: apic_init(env);
968: } else {
969: qemu_register_reset((QEMUResetHandler*)cpu_reset, env);
970: }
971: return env;
972: }
973:
1.1 root 974: /* PC hardware initialisation */
1.1.1.11 root 975: static void pc_init1(ram_addr_t ram_size,
1.1.1.7 root 976: const char *boot_device,
1.1.1.11 root 977: const char *kernel_filename,
978: const char *kernel_cmdline,
1.1.1.2 root 979: const char *initrd_filename,
1.1.1.11 root 980: const char *cpu_model,
981: int pci_enabled)
1.1 root 982: {
1.1.1.11 root 983: char *filename;
1.1.1.6 root 984: int ret, linux_boot, i;
1.1.1.11 root 985: ram_addr_t ram_addr, bios_offset, option_rom_offset;
1.1.1.7 root 986: ram_addr_t below_4g_mem_size, above_4g_mem_size = 0;
1.1.1.12 root 987: int bios_size, isa_bios_size;
1.1 root 988: PCIBus *pci_bus;
1.1.1.12 root 989: ISADevice *isa_dev;
1.1.1.4 root 990: int piix3_devfn = -1;
1.1.1.2 root 991: CPUState *env;
1.1.1.6 root 992: qemu_irq *cpu_irq;
1.1.1.12 root 993: qemu_irq *isa_irq;
1.1.1.6 root 994: qemu_irq *i8259;
1.1.1.12 root 995: IsaIrqState *isa_irq_state;
996: DriveInfo *hd[MAX_IDE_BUS * MAX_IDE_DEVS];
997: DriveInfo *fd[MAX_FD];
1.1.1.11 root 998: void *fw_cfg;
1.1 root 999:
1.1.1.7 root 1000: if (ram_size >= 0xe0000000 ) {
1001: above_4g_mem_size = ram_size - 0xe0000000;
1002: below_4g_mem_size = 0xe0000000;
1003: } else {
1004: below_4g_mem_size = ram_size;
1005: }
1006:
1.1 root 1007: linux_boot = (kernel_filename != NULL);
1008:
1.1.1.2 root 1009: /* init CPUs */
1.1.1.6 root 1010: if (cpu_model == NULL) {
1011: #ifdef TARGET_X86_64
1012: cpu_model = "qemu64";
1013: #else
1014: cpu_model = "qemu32";
1015: #endif
1016: }
1.1.1.11 root 1017:
1018: for (i = 0; i < smp_cpus; i++) {
1019: env = pc_new_cpu(cpu_model);
1.1.1.2 root 1020: }
1021:
1.1.1.7 root 1022: vmport_init();
1023:
1.1 root 1024: /* allocate RAM */
1.1.1.7 root 1025: ram_addr = qemu_ram_alloc(0xa0000);
1026: cpu_register_physical_memory(0, 0xa0000, ram_addr);
1027:
1028: /* Allocate, even though we won't register, so we don't break the
1029: * phys_ram_base + PA assumption. This range includes vga (0xa0000 - 0xc0000),
1030: * and some bios areas, which will be registered later
1031: */
1032: ram_addr = qemu_ram_alloc(0x100000 - 0xa0000);
1033: ram_addr = qemu_ram_alloc(below_4g_mem_size - 0x100000);
1034: cpu_register_physical_memory(0x100000,
1035: below_4g_mem_size - 0x100000,
1036: ram_addr);
1037:
1038: /* above 4giga memory allocation */
1039: if (above_4g_mem_size > 0) {
1.1.1.11 root 1040: #if TARGET_PHYS_ADDR_BITS == 32
1041: hw_error("To much RAM for 32-bit physical address");
1042: #else
1.1.1.7 root 1043: ram_addr = qemu_ram_alloc(above_4g_mem_size);
1044: cpu_register_physical_memory(0x100000000ULL,
1045: above_4g_mem_size,
1046: ram_addr);
1.1.1.11 root 1047: #endif
1.1.1.7 root 1048: }
1049:
1.1 root 1050:
1.1.1.6 root 1051: /* BIOS load */
1052: if (bios_name == NULL)
1053: bios_name = BIOS_FILENAME;
1.1.1.11 root 1054: filename = qemu_find_file(QEMU_FILE_TYPE_BIOS, bios_name);
1055: if (filename) {
1056: bios_size = get_image_size(filename);
1057: } else {
1058: bios_size = -1;
1059: }
1.1.1.6 root 1060: if (bios_size <= 0 ||
1061: (bios_size % 65536) != 0) {
1.1 root 1062: goto bios_error;
1063: }
1.1.1.6 root 1064: bios_offset = qemu_ram_alloc(bios_size);
1.1.1.12 root 1065: ret = rom_add_file_fixed(bios_name, (uint32_t)(-bios_size));
1066: if (ret != 0) {
1.1 root 1067: bios_error:
1.1.1.11 root 1068: fprintf(stderr, "qemu: could not load PC BIOS '%s'\n", bios_name);
1.1 root 1069: exit(1);
1070: }
1.1.1.11 root 1071: if (filename) {
1072: qemu_free(filename);
1.1.1.7 root 1073: }
1.1 root 1074: /* map the last 128KB of the BIOS in ISA space */
1075: isa_bios_size = bios_size;
1076: if (isa_bios_size > (128 * 1024))
1077: isa_bios_size = 128 * 1024;
1.1.1.6 root 1078: cpu_register_physical_memory(0x100000 - isa_bios_size,
1079: isa_bios_size,
1.1 root 1080: (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
1.1.1.5 root 1081:
1.1.1.6 root 1082:
1.1.1.11 root 1083:
1.1.1.12 root 1084: rom_enable_driver_roms = 1;
1085: option_rom_offset = qemu_ram_alloc(PC_ROM_SIZE);
1086: cpu_register_physical_memory(PC_ROM_MIN_VGA, PC_ROM_SIZE, option_rom_offset);
1.1.1.5 root 1087:
1.1 root 1088: /* map all the bios at the top of memory */
1.1.1.6 root 1089: cpu_register_physical_memory((uint32_t)(-bios_size),
1.1 root 1090: bios_size, bios_offset | IO_MEM_ROM);
1.1.1.6 root 1091:
1.1.1.11 root 1092: fw_cfg = bochs_bios_init();
1.1.1.13! root 1093: rom_set_fw(fw_cfg);
1.1.1.11 root 1094:
1095: if (linux_boot) {
1.1.1.12 root 1096: load_linux(fw_cfg, kernel_filename, initrd_filename, kernel_cmdline, below_4g_mem_size);
1.1.1.11 root 1097: }
1098:
1099: for (i = 0; i < nb_option_roms; i++) {
1.1.1.12 root 1100: rom_add_option(option_rom[i]);
1.1.1.11 root 1101: }
1.1 root 1102:
1.1.1.7 root 1103: cpu_irq = qemu_allocate_irqs(pic_irq_request, NULL, 1);
1.1.1.6 root 1104: i8259 = i8259_init(cpu_irq[0]);
1.1.1.12 root 1105: isa_irq_state = qemu_mallocz(sizeof(*isa_irq_state));
1106: isa_irq_state->i8259 = i8259;
1107: isa_irq = qemu_allocate_irqs(isa_irq_handler, isa_irq_state, 24);
1.1 root 1108:
1109: if (pci_enabled) {
1.1.1.12 root 1110: pci_bus = i440fx_init(&i440fx_state, &piix3_devfn, isa_irq);
1.1 root 1111: } else {
1112: pci_bus = NULL;
1.1.1.12 root 1113: isa_bus_new(NULL);
1.1 root 1114: }
1.1.1.12 root 1115: isa_bus_irqs(isa_irq);
1116:
1117: ferr_irq = isa_reserve_irq(13);
1.1 root 1118:
1119: /* init basic PC hardware */
1120: register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
1121:
1122: register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
1123:
1124: if (cirrus_vga_enabled) {
1125: if (pci_enabled) {
1.1.1.11 root 1126: pci_cirrus_vga_init(pci_bus);
1.1 root 1127: } else {
1.1.1.11 root 1128: isa_cirrus_vga_init();
1.1 root 1129: }
1.1.1.6 root 1130: } else if (vmsvga_enabled) {
1131: if (pci_enabled)
1.1.1.11 root 1132: pci_vmsvga_init(pci_bus);
1.1.1.6 root 1133: else
1134: fprintf(stderr, "%s: vmware_vga: no PCI bus\n", __FUNCTION__);
1.1.1.7 root 1135: } else if (std_vga_enabled) {
1.1.1.5 root 1136: if (pci_enabled) {
1.1.1.11 root 1137: pci_vga_init(pci_bus, 0, 0);
1.1.1.5 root 1138: } else {
1.1.1.11 root 1139: isa_vga_init();
1.1.1.5 root 1140: }
1.1 root 1141: }
1142:
1.1.1.12 root 1143: rtc_state = rtc_init(2000);
1.1.1.7 root 1144:
1145: qemu_register_boot_set(pc_boot_set, rtc_state);
1.1 root 1146:
1147: register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
1148: register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
1149:
1150: if (pci_enabled) {
1.1.1.12 root 1151: isa_irq_state->ioapic = ioapic_init();
1.1 root 1152: }
1.1.1.12 root 1153: pit = pit_init(0x40, isa_reserve_irq(0));
1.1.1.3 root 1154: pcspk_init(pit);
1.1.1.7 root 1155: if (!no_hpet) {
1.1.1.12 root 1156: hpet_init(isa_irq);
1.1 root 1157: }
1158:
1159: for(i = 0; i < MAX_SERIAL_PORTS; i++) {
1160: if (serial_hds[i]) {
1.1.1.12 root 1161: serial_isa_init(i, serial_hds[i]);
1.1 root 1162: }
1163: }
1164:
1165: for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
1166: if (parallel_hds[i]) {
1.1.1.12 root 1167: parallel_init(i, parallel_hds[i]);
1.1 root 1168: }
1169: }
1170:
1.1.1.3 root 1171: for(i = 0; i < nb_nics; i++) {
1.1.1.7 root 1172: NICInfo *nd = &nd_table[i];
1173:
1174: if (!pci_enabled || (nd->model && strcmp(nd->model, "ne2k_isa") == 0))
1.1.1.12 root 1175: pc_init_ne2k_isa(nd);
1.1.1.7 root 1176: else
1.1.1.12 root 1177: pci_nic_init_nofail(nd, "e1000", NULL);
1.1.1.3 root 1178: }
1.1 root 1179:
1.1.1.6 root 1180: if (drive_get_max_bus(IF_IDE) >= MAX_IDE_BUS) {
1181: fprintf(stderr, "qemu: too many IDE bus\n");
1182: exit(1);
1183: }
1184:
1185: for(i = 0; i < MAX_IDE_BUS * MAX_IDE_DEVS; i++) {
1.1.1.12 root 1186: hd[i] = drive_get(IF_IDE, i / MAX_IDE_DEVS, i % MAX_IDE_DEVS);
1.1.1.6 root 1187: }
1188:
1.1.1.3 root 1189: if (pci_enabled) {
1.1.1.12 root 1190: pci_piix3_ide_init(pci_bus, hd, piix3_devfn + 1);
1.1.1.3 root 1191: } else {
1.1.1.6 root 1192: for(i = 0; i < MAX_IDE_BUS; i++) {
1.1.1.12 root 1193: isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
1.1.1.6 root 1194: hd[MAX_IDE_DEVS * i], hd[MAX_IDE_DEVS * i + 1]);
1.1 root 1195: }
1196: }
1197:
1.1.1.12 root 1198: isa_dev = isa_create_simple("i8042");
1.1 root 1199: DMA_init(0);
1.1.1.2 root 1200: #ifdef HAS_AUDIO
1.1.1.12 root 1201: audio_init(pci_enabled ? pci_bus : NULL, isa_irq);
1.1 root 1202: #endif
1203:
1.1.1.6 root 1204: for(i = 0; i < MAX_FD; i++) {
1.1.1.12 root 1205: fd[i] = drive_get(IF_FLOPPY, 0, i);
1.1.1.6 root 1206: }
1.1.1.12 root 1207: floppy_controller = fdctrl_init_isa(fd);
1.1 root 1208:
1.1.1.7 root 1209: cmos_init(below_4g_mem_size, above_4g_mem_size, boot_device, hd);
1.1 root 1210:
1.1.1.2 root 1211: if (pci_enabled && usb_enabled) {
1.1.1.6 root 1212: usb_uhci_piix3_init(pci_bus, piix3_devfn + 2);
1.1.1.4 root 1213: }
1214:
1215: if (pci_enabled && acpi_enabled) {
1.1.1.5 root 1216: uint8_t *eeprom_buf = qemu_mallocz(8 * 256); /* XXX: make this persistent */
1.1.1.6 root 1217: i2c_bus *smbus;
1218:
1219: /* TODO: Populate SPD eeprom data. */
1.1.1.12 root 1220: smbus = piix4_pm_init(pci_bus, piix3_devfn + 3, 0xb100,
1221: isa_reserve_irq(9));
1.1.1.5 root 1222: for (i = 0; i < 8; i++) {
1.1.1.11 root 1223: DeviceState *eeprom;
1224: eeprom = qdev_create((BusState *)smbus, "smbus-eeprom");
1.1.1.12 root 1225: qdev_prop_set_uint8(eeprom, "address", 0x50 + i);
1.1.1.11 root 1226: qdev_prop_set_ptr(eeprom, "data", eeprom_buf + (i * 256));
1.1.1.12 root 1227: qdev_init_nofail(eeprom);
1.1.1.5 root 1228: }
1.1.1.12 root 1229: piix4_acpi_system_hot_add_init(pci_bus);
1.1.1.5 root 1230: }
1.1.1.6 root 1231:
1.1.1.5 root 1232: if (i440fx_state) {
1233: i440fx_init_memory_mappings(i440fx_state);
1.1.1.2 root 1234: }
1.1.1.6 root 1235:
1.1.1.4 root 1236: if (pci_enabled) {
1.1.1.6 root 1237: int max_bus;
1.1.1.11 root 1238: int bus;
1.1.1.4 root 1239:
1.1.1.6 root 1240: max_bus = drive_get_max_bus(IF_SCSI);
1241: for (bus = 0; bus <= max_bus; bus++) {
1.1.1.11 root 1242: pci_create_simple(pci_bus, -1, "lsi53c895a");
1.1.1.6 root 1243: }
1.1.1.4 root 1244: }
1.1.1.7 root 1245:
1246: /* Add virtio console devices */
1247: if (pci_enabled) {
1248: for(i = 0; i < MAX_VIRTIO_CONSOLES; i++) {
1.1.1.11 root 1249: if (virtcon_hds[i]) {
1250: pci_create_simple(pci_bus, -1, "virtio-console-pci");
1251: }
1.1.1.7 root 1252: }
1253: }
1.1 root 1254: }
1255:
1.1.1.11 root 1256: static void pc_init_pci(ram_addr_t ram_size,
1.1.1.7 root 1257: const char *boot_device,
1.1.1.6 root 1258: const char *kernel_filename,
1.1.1.2 root 1259: const char *kernel_cmdline,
1.1.1.6 root 1260: const char *initrd_filename,
1261: const char *cpu_model)
1.1.1.2 root 1262: {
1.1.1.11 root 1263: pc_init1(ram_size, boot_device,
1.1.1.2 root 1264: kernel_filename, kernel_cmdline,
1.1.1.11 root 1265: initrd_filename, cpu_model, 1);
1.1.1.2 root 1266: }
1267:
1.1.1.11 root 1268: static void pc_init_isa(ram_addr_t ram_size,
1.1.1.7 root 1269: const char *boot_device,
1.1.1.6 root 1270: const char *kernel_filename,
1.1.1.2 root 1271: const char *kernel_cmdline,
1.1.1.6 root 1272: const char *initrd_filename,
1273: const char *cpu_model)
1.1.1.2 root 1274: {
1.1.1.12 root 1275: if (cpu_model == NULL)
1276: cpu_model = "486";
1.1.1.11 root 1277: pc_init1(ram_size, boot_device,
1.1.1.2 root 1278: kernel_filename, kernel_cmdline,
1.1.1.11 root 1279: initrd_filename, cpu_model, 0);
1.1.1.2 root 1280: }
1281:
1.1.1.7 root 1282: /* set CMOS shutdown status register (index 0xF) as S3_resume(0xFE)
1283: BIOS will read it and start S3 resume at POST Entry */
1284: void cmos_set_s3_resume(void)
1285: {
1286: if (rtc_state)
1287: rtc_set_memory(rtc_state, 0xF, 0xFE);
1288: }
1289:
1.1.1.11 root 1290: static QEMUMachine pc_machine = {
1.1.1.13! root 1291: .name = "pc-0.12",
1.1.1.11 root 1292: .alias = "pc",
1.1.1.7 root 1293: .desc = "Standard PC",
1294: .init = pc_init_pci,
1295: .max_cpus = 255,
1.1.1.11 root 1296: .is_default = 1,
1297: };
1298:
1.1.1.13! root 1299: static QEMUMachine pc_machine_v0_11 = {
! 1300: .name = "pc-0.11",
! 1301: .desc = "Standard PC, qemu 0.11",
! 1302: .init = pc_init_pci,
! 1303: .max_cpus = 255,
! 1304: .compat_props = (GlobalProperty[]) {
! 1305: {
! 1306: .driver = "virtio-blk-pci",
! 1307: .property = "vectors",
! 1308: .value = stringify(0),
! 1309: },{
! 1310: .driver = "PCI",
! 1311: .property = "rombar",
! 1312: .value = stringify(0),
! 1313: },
! 1314: { /* end of list */ }
! 1315: }
! 1316: };
! 1317:
1.1.1.11 root 1318: static QEMUMachine pc_machine_v0_10 = {
1319: .name = "pc-0.10",
1320: .desc = "Standard PC, qemu 0.10",
1321: .init = pc_init_pci,
1322: .max_cpus = 255,
1.1.1.12 root 1323: .compat_props = (GlobalProperty[]) {
1.1.1.11 root 1324: {
1325: .driver = "virtio-blk-pci",
1326: .property = "class",
1327: .value = stringify(PCI_CLASS_STORAGE_OTHER),
1328: },{
1329: .driver = "virtio-console-pci",
1330: .property = "class",
1331: .value = stringify(PCI_CLASS_DISPLAY_OTHER),
1332: },{
1333: .driver = "virtio-net-pci",
1334: .property = "vectors",
1335: .value = stringify(0),
1.1.1.12 root 1336: },{
1337: .driver = "virtio-blk-pci",
1338: .property = "vectors",
1339: .value = stringify(0),
1.1.1.13! root 1340: },{
! 1341: .driver = "PCI",
! 1342: .property = "rombar",
! 1343: .value = stringify(0),
1.1.1.11 root 1344: },
1345: { /* end of list */ }
1346: },
1.1.1.2 root 1347: };
1348:
1.1.1.11 root 1349: static QEMUMachine isapc_machine = {
1.1.1.7 root 1350: .name = "isapc",
1351: .desc = "ISA-only PC",
1352: .init = pc_init_isa,
1353: .max_cpus = 1,
1.1 root 1354: };
1.1.1.11 root 1355:
1356: static void pc_machine_init(void)
1357: {
1358: qemu_register_machine(&pc_machine);
1.1.1.13! root 1359: qemu_register_machine(&pc_machine_v0_11);
1.1.1.11 root 1360: qemu_register_machine(&pc_machine_v0_10);
1361: qemu_register_machine(&isapc_machine);
1362: }
1363:
1364: machine_init(pc_machine_init);
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