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1.1 root 1: /*
2: * QEMU PC System Emulator
3: *
4: * Copyright (c) 2003-2004 Fabrice Bellard
5: *
6: * Permission is hereby granted, free of charge, to any person obtaining a copy
7: * of this software and associated documentation files (the "Software"), to deal
8: * in the Software without restriction, including without limitation the rights
9: * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10: * copies of the Software, and to permit persons to whom the Software is
11: * furnished to do so, subject to the following conditions:
12: *
13: * The above copyright notice and this permission notice shall be included in
14: * all copies or substantial portions of the Software.
15: *
16: * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17: * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18: * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19: * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20: * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21: * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22: * THE SOFTWARE.
23: */
24: #include "vl.h"
25:
26: /* output Bochs bios info messages */
27: //#define DEBUG_BIOS
28:
29: #define BIOS_FILENAME "bios.bin"
30: #define VGABIOS_FILENAME "vgabios.bin"
31: #define VGABIOS_CIRRUS_FILENAME "vgabios-cirrus.bin"
32: #define LINUX_BOOT_FILENAME "linux_boot.bin"
33:
34: #define KERNEL_LOAD_ADDR 0x00100000
1.1.1.3 root 35: #define INITRD_LOAD_ADDR 0x00600000
1.1 root 36: #define KERNEL_PARAMS_ADDR 0x00090000
37: #define KERNEL_CMDLINE_ADDR 0x00099000
38:
39: static fdctrl_t *floppy_controller;
40: static RTCState *rtc_state;
41: static PITState *pit;
42: static IOAPICState *ioapic;
43:
44: static void ioport80_write(void *opaque, uint32_t addr, uint32_t data)
45: {
46: }
47:
48: /* MSDOS compatibility mode FPU exception support */
49: /* XXX: add IGNNE support */
50: void cpu_set_ferr(CPUX86State *s)
51: {
52: pic_set_irq(13, 1);
53: }
54:
55: static void ioportF0_write(void *opaque, uint32_t addr, uint32_t data)
56: {
57: pic_set_irq(13, 0);
58: }
59:
60: /* TSC handling */
61: uint64_t cpu_get_tsc(CPUX86State *env)
62: {
1.1.1.4 ! root 63: /* Note: when using kqemu, it is more logical to return the host TSC
! 64: because kqemu does not trap the RDTSC instruction for
! 65: performance reasons */
! 66: #if USE_KQEMU
! 67: if (env->kqemu_enabled) {
! 68: return cpu_get_real_ticks();
! 69: } else
! 70: #endif
! 71: {
! 72: return cpu_get_ticks();
! 73: }
1.1 root 74: }
75:
76: /* IRQ handling */
77: int cpu_get_pic_interrupt(CPUState *env)
78: {
79: int intno;
80:
81: intno = apic_get_interrupt(env);
82: if (intno >= 0) {
83: /* set irq request if a PIC irq is still pending */
84: /* XXX: improve that */
85: pic_update_irq(isa_pic);
86: return intno;
87: }
88: /* read the irq from the PIC */
89: intno = pic_read_irq(isa_pic);
90: return intno;
91: }
92:
93: static void pic_irq_request(void *opaque, int level)
94: {
1.1.1.2 root 95: CPUState *env = opaque;
1.1 root 96: if (level)
1.1.1.2 root 97: cpu_interrupt(env, CPU_INTERRUPT_HARD);
1.1 root 98: else
1.1.1.2 root 99: cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
1.1 root 100: }
101:
102: /* PC cmos mappings */
103:
104: #define REG_EQUIPMENT_BYTE 0x14
105: #define REG_IBM_CENTURY_BYTE 0x32
106: #define REG_IBM_PS2_CENTURY_BYTE 0x37
107:
108:
109: static inline int to_bcd(RTCState *s, int a)
110: {
111: return ((a / 10) << 4) | (a % 10);
112: }
113:
114: static int cmos_get_fd_drive_type(int fd0)
115: {
116: int val;
117:
118: switch (fd0) {
119: case 0:
120: /* 1.44 Mb 3"5 drive */
121: val = 4;
122: break;
123: case 1:
124: /* 2.88 Mb 3"5 drive */
125: val = 5;
126: break;
127: case 2:
128: /* 1.2 Mb 5"5 drive */
129: val = 2;
130: break;
131: default:
132: val = 0;
133: break;
134: }
135: return val;
136: }
137:
138: static void cmos_init_hd(int type_ofs, int info_ofs, BlockDriverState *hd)
139: {
140: RTCState *s = rtc_state;
141: int cylinders, heads, sectors;
142: bdrv_get_geometry_hint(hd, &cylinders, &heads, §ors);
143: rtc_set_memory(s, type_ofs, 47);
144: rtc_set_memory(s, info_ofs, cylinders);
145: rtc_set_memory(s, info_ofs + 1, cylinders >> 8);
146: rtc_set_memory(s, info_ofs + 2, heads);
147: rtc_set_memory(s, info_ofs + 3, 0xff);
148: rtc_set_memory(s, info_ofs + 4, 0xff);
149: rtc_set_memory(s, info_ofs + 5, 0xc0 | ((heads > 8) << 3));
150: rtc_set_memory(s, info_ofs + 6, cylinders);
151: rtc_set_memory(s, info_ofs + 7, cylinders >> 8);
152: rtc_set_memory(s, info_ofs + 8, sectors);
153: }
154:
155: /* hd_table must contain 4 block drivers */
156: static void cmos_init(int ram_size, int boot_device, BlockDriverState **hd_table)
157: {
158: RTCState *s = rtc_state;
159: int val;
160: int fd0, fd1, nb;
161: time_t ti;
162: struct tm *tm;
163: int i;
164:
165: /* set the CMOS date */
166: time(&ti);
167: if (rtc_utc)
168: tm = gmtime(&ti);
169: else
170: tm = localtime(&ti);
171: rtc_set_date(s, tm);
172:
173: val = to_bcd(s, (tm->tm_year / 100) + 19);
174: rtc_set_memory(s, REG_IBM_CENTURY_BYTE, val);
175: rtc_set_memory(s, REG_IBM_PS2_CENTURY_BYTE, val);
176:
177: /* various important CMOS locations needed by PC/Bochs bios */
178:
179: /* memory size */
180: val = 640; /* base memory in K */
181: rtc_set_memory(s, 0x15, val);
182: rtc_set_memory(s, 0x16, val >> 8);
183:
184: val = (ram_size / 1024) - 1024;
185: if (val > 65535)
186: val = 65535;
187: rtc_set_memory(s, 0x17, val);
188: rtc_set_memory(s, 0x18, val >> 8);
189: rtc_set_memory(s, 0x30, val);
190: rtc_set_memory(s, 0x31, val >> 8);
191:
192: if (ram_size > (16 * 1024 * 1024))
193: val = (ram_size / 65536) - ((16 * 1024 * 1024) / 65536);
194: else
195: val = 0;
196: if (val > 65535)
197: val = 65535;
198: rtc_set_memory(s, 0x34, val);
199: rtc_set_memory(s, 0x35, val >> 8);
200:
201: switch(boot_device) {
202: case 'a':
203: case 'b':
204: rtc_set_memory(s, 0x3d, 0x01); /* floppy boot */
1.1.1.4 ! root 205: if (!fd_bootchk)
! 206: rtc_set_memory(s, 0x38, 0x01); /* disable signature check */
1.1 root 207: break;
208: default:
209: case 'c':
210: rtc_set_memory(s, 0x3d, 0x02); /* hard drive boot */
211: break;
212: case 'd':
213: rtc_set_memory(s, 0x3d, 0x03); /* CD-ROM boot */
214: break;
215: }
216:
217: /* floppy type */
218:
219: fd0 = fdctrl_get_drive_type(floppy_controller, 0);
220: fd1 = fdctrl_get_drive_type(floppy_controller, 1);
221:
222: val = (cmos_get_fd_drive_type(fd0) << 4) | cmos_get_fd_drive_type(fd1);
223: rtc_set_memory(s, 0x10, val);
224:
225: val = 0;
226: nb = 0;
227: if (fd0 < 3)
228: nb++;
229: if (fd1 < 3)
230: nb++;
231: switch (nb) {
232: case 0:
233: break;
234: case 1:
235: val |= 0x01; /* 1 drive, ready for boot */
236: break;
237: case 2:
238: val |= 0x41; /* 2 drives, ready for boot */
239: break;
240: }
241: val |= 0x02; /* FPU is there */
242: val |= 0x04; /* PS/2 mouse installed */
243: rtc_set_memory(s, REG_EQUIPMENT_BYTE, val);
244:
245: /* hard drives */
246:
247: rtc_set_memory(s, 0x12, (hd_table[0] ? 0xf0 : 0) | (hd_table[1] ? 0x0f : 0));
248: if (hd_table[0])
249: cmos_init_hd(0x19, 0x1b, hd_table[0]);
250: if (hd_table[1])
251: cmos_init_hd(0x1a, 0x24, hd_table[1]);
252:
253: val = 0;
254: for (i = 0; i < 4; i++) {
255: if (hd_table[i]) {
256: int cylinders, heads, sectors, translation;
257: /* NOTE: bdrv_get_geometry_hint() returns the physical
258: geometry. It is always such that: 1 <= sects <= 63, 1
259: <= heads <= 16, 1 <= cylinders <= 16383. The BIOS
260: geometry can be different if a translation is done. */
261: translation = bdrv_get_translation_hint(hd_table[i]);
262: if (translation == BIOS_ATA_TRANSLATION_AUTO) {
263: bdrv_get_geometry_hint(hd_table[i], &cylinders, &heads, §ors);
264: if (cylinders <= 1024 && heads <= 16 && sectors <= 63) {
265: /* No translation. */
266: translation = 0;
267: } else {
268: /* LBA translation. */
269: translation = 1;
270: }
271: } else {
272: translation--;
273: }
274: val |= translation << (i * 2);
275: }
276: }
277: rtc_set_memory(s, 0x39, val);
278: }
279:
1.1.1.2 root 280: void ioport_set_a20(int enable)
281: {
282: /* XXX: send to all CPUs ? */
283: cpu_x86_set_a20(first_cpu, enable);
284: }
285:
286: int ioport_get_a20(void)
287: {
288: return ((first_cpu->a20_mask >> 20) & 1);
289: }
290:
1.1 root 291: static void ioport92_write(void *opaque, uint32_t addr, uint32_t val)
292: {
1.1.1.2 root 293: ioport_set_a20((val >> 1) & 1);
1.1 root 294: /* XXX: bit 0 is fast reset */
295: }
296:
297: static uint32_t ioport92_read(void *opaque, uint32_t addr)
298: {
1.1.1.2 root 299: return ioport_get_a20() << 1;
1.1 root 300: }
301:
302: /***********************************************************/
303: /* Bochs BIOS debug ports */
304:
305: void bochs_bios_write(void *opaque, uint32_t addr, uint32_t val)
306: {
307: static const char shutdown_str[8] = "Shutdown";
308: static int shutdown_index = 0;
309:
310: switch(addr) {
311: /* Bochs BIOS messages */
312: case 0x400:
313: case 0x401:
314: fprintf(stderr, "BIOS panic at rombios.c, line %d\n", val);
315: exit(1);
316: case 0x402:
317: case 0x403:
318: #ifdef DEBUG_BIOS
319: fprintf(stderr, "%c", val);
320: #endif
321: break;
322: case 0x8900:
323: /* same as Bochs power off */
324: if (val == shutdown_str[shutdown_index]) {
325: shutdown_index++;
326: if (shutdown_index == 8) {
327: shutdown_index = 0;
328: qemu_system_shutdown_request();
329: }
330: } else {
331: shutdown_index = 0;
332: }
333: break;
334:
335: /* LGPL'ed VGA BIOS messages */
336: case 0x501:
337: case 0x502:
338: fprintf(stderr, "VGA BIOS panic, line %d\n", val);
339: exit(1);
340: case 0x500:
341: case 0x503:
342: #ifdef DEBUG_BIOS
343: fprintf(stderr, "%c", val);
344: #endif
345: break;
346: }
347: }
348:
349: void bochs_bios_init(void)
350: {
351: register_ioport_write(0x400, 1, 2, bochs_bios_write, NULL);
352: register_ioport_write(0x401, 1, 2, bochs_bios_write, NULL);
353: register_ioport_write(0x402, 1, 1, bochs_bios_write, NULL);
354: register_ioport_write(0x403, 1, 1, bochs_bios_write, NULL);
355: register_ioport_write(0x8900, 1, 1, bochs_bios_write, NULL);
356:
357: register_ioport_write(0x501, 1, 2, bochs_bios_write, NULL);
358: register_ioport_write(0x502, 1, 2, bochs_bios_write, NULL);
359: register_ioport_write(0x500, 1, 1, bochs_bios_write, NULL);
360: register_ioport_write(0x503, 1, 1, bochs_bios_write, NULL);
361: }
362:
363:
364: int load_kernel(const char *filename, uint8_t *addr,
365: uint8_t *real_addr)
366: {
367: int fd, size;
368: int setup_sects;
369:
370: fd = open(filename, O_RDONLY | O_BINARY);
371: if (fd < 0)
372: return -1;
373:
374: /* load 16 bit code */
375: if (read(fd, real_addr, 512) != 512)
376: goto fail;
377: setup_sects = real_addr[0x1F1];
378: if (!setup_sects)
379: setup_sects = 4;
380: if (read(fd, real_addr + 512, setup_sects * 512) !=
381: setup_sects * 512)
382: goto fail;
383:
384: /* load 32 bit code */
385: size = read(fd, addr, 16 * 1024 * 1024);
386: if (size < 0)
387: goto fail;
388: close(fd);
389: return size;
390: fail:
391: close(fd);
392: return -1;
393: }
394:
1.1.1.2 root 395: static void main_cpu_reset(void *opaque)
396: {
397: CPUState *env = opaque;
398: cpu_reset(env);
399: }
400:
401: /*************************************************/
402:
403: static void putb(uint8_t **pp, int val)
404: {
405: uint8_t *q;
406: q = *pp;
407: *q++ = val;
408: *pp = q;
409: }
410:
411: static void putstr(uint8_t **pp, const char *str)
412: {
413: uint8_t *q;
414: q = *pp;
415: while (*str)
416: *q++ = *str++;
417: *pp = q;
418: }
419:
420: static void putle16(uint8_t **pp, int val)
421: {
422: uint8_t *q;
423: q = *pp;
424: *q++ = val;
425: *q++ = val >> 8;
426: *pp = q;
427: }
428:
429: static void putle32(uint8_t **pp, int val)
430: {
431: uint8_t *q;
432: q = *pp;
433: *q++ = val;
434: *q++ = val >> 8;
435: *q++ = val >> 16;
436: *q++ = val >> 24;
437: *pp = q;
438: }
439:
440: static int mpf_checksum(const uint8_t *data, int len)
441: {
442: int sum, i;
443: sum = 0;
444: for(i = 0; i < len; i++)
445: sum += data[i];
446: return sum & 0xff;
447: }
448:
449: /* Build the Multi Processor table in the BIOS. Same values as Bochs. */
450: static void bios_add_mptable(uint8_t *bios_data)
451: {
452: uint8_t *mp_config_table, *q, *float_pointer_struct;
453: int ioapic_id, offset, i, len;
454:
455: if (smp_cpus <= 1)
456: return;
457:
458: mp_config_table = bios_data + 0xb000;
459: q = mp_config_table;
460: putstr(&q, "PCMP"); /* "PCMP signature */
461: putle16(&q, 0); /* table length (patched later) */
462: putb(&q, 4); /* spec rev */
463: putb(&q, 0); /* checksum (patched later) */
464: putstr(&q, "QEMUCPU "); /* OEM id */
465: putstr(&q, "0.1 "); /* vendor id */
466: putle32(&q, 0); /* OEM table ptr */
467: putle16(&q, 0); /* OEM table size */
468: putle16(&q, 20); /* entry count */
469: putle32(&q, 0xfee00000); /* local APIC addr */
470: putle16(&q, 0); /* ext table length */
471: putb(&q, 0); /* ext table checksum */
472: putb(&q, 0); /* reserved */
473:
474: for(i = 0; i < smp_cpus; i++) {
475: putb(&q, 0); /* entry type = processor */
476: putb(&q, i); /* APIC id */
477: putb(&q, 0x11); /* local APIC version number */
478: if (i == 0)
479: putb(&q, 3); /* cpu flags: enabled, bootstrap cpu */
480: else
481: putb(&q, 1); /* cpu flags: enabled */
482: putb(&q, 0); /* cpu signature */
483: putb(&q, 6);
484: putb(&q, 0);
485: putb(&q, 0);
486: putle16(&q, 0x201); /* feature flags */
487: putle16(&q, 0);
488:
489: putle16(&q, 0); /* reserved */
490: putle16(&q, 0);
491: putle16(&q, 0);
492: putle16(&q, 0);
493: }
494:
495: /* isa bus */
496: putb(&q, 1); /* entry type = bus */
497: putb(&q, 0); /* bus ID */
498: putstr(&q, "ISA ");
499:
500: /* ioapic */
501: ioapic_id = smp_cpus;
502: putb(&q, 2); /* entry type = I/O APIC */
503: putb(&q, ioapic_id); /* apic ID */
504: putb(&q, 0x11); /* I/O APIC version number */
505: putb(&q, 1); /* enable */
506: putle32(&q, 0xfec00000); /* I/O APIC addr */
507:
508: /* irqs */
509: for(i = 0; i < 16; i++) {
510: putb(&q, 3); /* entry type = I/O interrupt */
511: putb(&q, 0); /* interrupt type = vectored interrupt */
512: putb(&q, 0); /* flags: po=0, el=0 */
513: putb(&q, 0);
514: putb(&q, 0); /* source bus ID = ISA */
515: putb(&q, i); /* source bus IRQ */
516: putb(&q, ioapic_id); /* dest I/O APIC ID */
517: putb(&q, i); /* dest I/O APIC interrupt in */
518: }
519: /* patch length */
520: len = q - mp_config_table;
521: mp_config_table[4] = len;
522: mp_config_table[5] = len >> 8;
523:
524: mp_config_table[7] = -mpf_checksum(mp_config_table, q - mp_config_table);
525:
526: /* align to 16 */
527: offset = q - bios_data;
528: offset = (offset + 15) & ~15;
529: float_pointer_struct = bios_data + offset;
530:
531: /* floating pointer structure */
532: q = float_pointer_struct;
533: putstr(&q, "_MP_");
534: /* pointer to MP config table */
535: putle32(&q, mp_config_table - bios_data + 0x000f0000);
536:
537: putb(&q, 1); /* length in 16 byte units */
538: putb(&q, 4); /* MP spec revision */
539: putb(&q, 0); /* checksum (patched later) */
540: putb(&q, 0); /* MP feature byte 1 */
541:
542: putb(&q, 0);
543: putb(&q, 0);
544: putb(&q, 0);
545: putb(&q, 0);
546: float_pointer_struct[10] =
547: -mpf_checksum(float_pointer_struct, q - float_pointer_struct);
548: }
549:
550:
1.1 root 551: static const int ide_iobase[2] = { 0x1f0, 0x170 };
552: static const int ide_iobase2[2] = { 0x3f6, 0x376 };
553: static const int ide_irq[2] = { 14, 15 };
554:
555: #define NE2000_NB_MAX 6
556:
557: static int ne2000_io[NE2000_NB_MAX] = { 0x300, 0x320, 0x340, 0x360, 0x280, 0x380 };
558: static int ne2000_irq[NE2000_NB_MAX] = { 9, 10, 11, 3, 4, 5 };
559:
560: static int serial_io[MAX_SERIAL_PORTS] = { 0x3f8, 0x2f8, 0x3e8, 0x2e8 };
561: static int serial_irq[MAX_SERIAL_PORTS] = { 4, 3, 4, 3 };
562:
563: static int parallel_io[MAX_PARALLEL_PORTS] = { 0x378, 0x278, 0x3bc };
564: static int parallel_irq[MAX_PARALLEL_PORTS] = { 7, 7, 7 };
565:
1.1.1.2 root 566: #ifdef HAS_AUDIO
567: static void audio_init (PCIBus *pci_bus)
568: {
569: struct soundhw *c;
570: int audio_enabled = 0;
571:
572: for (c = soundhw; !audio_enabled && c->name; ++c) {
573: audio_enabled = c->enabled;
574: }
575:
576: if (audio_enabled) {
577: AudioState *s;
578:
579: s = AUD_init ();
580: if (s) {
581: for (c = soundhw; c->name; ++c) {
582: if (c->enabled) {
583: if (c->isa) {
584: c->init.init_isa (s);
585: }
586: else {
587: if (pci_bus) {
588: c->init.init_pci (pci_bus, s);
589: }
590: }
591: }
592: }
593: }
594: }
595: }
596: #endif
597:
1.1.1.3 root 598: static void pc_init_ne2k_isa(NICInfo *nd)
599: {
600: static int nb_ne2k = 0;
601:
602: if (nb_ne2k == NE2000_NB_MAX)
603: return;
604: isa_ne2000_init(ne2000_io[nb_ne2k], ne2000_irq[nb_ne2k], nd);
605: nb_ne2k++;
606: }
607:
1.1 root 608: /* PC hardware initialisation */
609: static void pc_init1(int ram_size, int vga_ram_size, int boot_device,
610: DisplayState *ds, const char **fd_filename, int snapshot,
611: const char *kernel_filename, const char *kernel_cmdline,
1.1.1.2 root 612: const char *initrd_filename,
613: int pci_enabled)
1.1 root 614: {
615: char buf[1024];
1.1.1.3 root 616: int ret, linux_boot, initrd_size, i;
1.1 root 617: unsigned long bios_offset, vga_bios_offset;
618: int bios_size, isa_bios_size;
619: PCIBus *pci_bus;
1.1.1.4 ! root 620: int piix3_devfn = -1;
1.1.1.2 root 621: CPUState *env;
1.1.1.3 root 622: NICInfo *nd;
1.1 root 623:
624: linux_boot = (kernel_filename != NULL);
625:
1.1.1.2 root 626: /* init CPUs */
627: for(i = 0; i < smp_cpus; i++) {
628: env = cpu_init();
629: if (i != 0)
630: env->hflags |= HF_HALTED_MASK;
631: if (smp_cpus > 1) {
632: /* XXX: enable it in all cases */
633: env->cpuid_features |= CPUID_APIC;
634: }
635: register_savevm("cpu", i, 3, cpu_save, cpu_load, env);
636: qemu_register_reset(main_cpu_reset, env);
637: if (pci_enabled) {
638: apic_init(env);
639: }
640: }
641:
1.1 root 642: /* allocate RAM */
643: cpu_register_physical_memory(0, ram_size, 0);
644:
645: /* BIOS load */
646: bios_offset = ram_size + vga_ram_size;
647: vga_bios_offset = bios_offset + 256 * 1024;
648:
649: snprintf(buf, sizeof(buf), "%s/%s", bios_dir, BIOS_FILENAME);
650: bios_size = get_image_size(buf);
651: if (bios_size <= 0 ||
652: (bios_size % 65536) != 0 ||
653: bios_size > (256 * 1024)) {
654: goto bios_error;
655: }
656: ret = load_image(buf, phys_ram_base + bios_offset);
657: if (ret != bios_size) {
658: bios_error:
659: fprintf(stderr, "qemu: could not load PC bios '%s'\n", buf);
660: exit(1);
661: }
1.1.1.2 root 662: if (bios_size == 65536) {
663: bios_add_mptable(phys_ram_base + bios_offset);
664: }
1.1 root 665:
666: /* VGA BIOS load */
667: if (cirrus_vga_enabled) {
668: snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_CIRRUS_FILENAME);
669: } else {
670: snprintf(buf, sizeof(buf), "%s/%s", bios_dir, VGABIOS_FILENAME);
671: }
672: ret = load_image(buf, phys_ram_base + vga_bios_offset);
673:
674: /* setup basic memory access */
675: cpu_register_physical_memory(0xc0000, 0x10000,
676: vga_bios_offset | IO_MEM_ROM);
677:
678: /* map the last 128KB of the BIOS in ISA space */
679: isa_bios_size = bios_size;
680: if (isa_bios_size > (128 * 1024))
681: isa_bios_size = 128 * 1024;
682: cpu_register_physical_memory(0xd0000, (192 * 1024) - isa_bios_size,
683: IO_MEM_UNASSIGNED);
684: cpu_register_physical_memory(0x100000 - isa_bios_size,
685: isa_bios_size,
686: (bios_offset + bios_size - isa_bios_size) | IO_MEM_ROM);
687: /* map all the bios at the top of memory */
688: cpu_register_physical_memory((uint32_t)(-bios_size),
689: bios_size, bios_offset | IO_MEM_ROM);
690:
691: bochs_bios_init();
692:
693: if (linux_boot) {
694: uint8_t bootsect[512];
695: uint8_t old_bootsect[512];
696:
697: if (bs_table[0] == NULL) {
698: fprintf(stderr, "A disk image must be given for 'hda' when booting a Linux kernel\n");
699: exit(1);
700: }
701: snprintf(buf, sizeof(buf), "%s/%s", bios_dir, LINUX_BOOT_FILENAME);
702: ret = load_image(buf, bootsect);
703: if (ret != sizeof(bootsect)) {
704: fprintf(stderr, "qemu: could not load linux boot sector '%s'\n",
705: buf);
706: exit(1);
707: }
708:
709: if (bdrv_read(bs_table[0], 0, old_bootsect, 1) >= 0) {
710: /* copy the MSDOS partition table */
711: memcpy(bootsect + 0x1be, old_bootsect + 0x1be, 0x40);
712: }
713:
714: bdrv_set_boot_sector(bs_table[0], bootsect, sizeof(bootsect));
715:
716: /* now we can load the kernel */
717: ret = load_kernel(kernel_filename,
718: phys_ram_base + KERNEL_LOAD_ADDR,
719: phys_ram_base + KERNEL_PARAMS_ADDR);
720: if (ret < 0) {
721: fprintf(stderr, "qemu: could not load kernel '%s'\n",
722: kernel_filename);
723: exit(1);
724: }
725:
726: /* load initrd */
727: initrd_size = 0;
728: if (initrd_filename) {
729: initrd_size = load_image(initrd_filename, phys_ram_base + INITRD_LOAD_ADDR);
730: if (initrd_size < 0) {
731: fprintf(stderr, "qemu: could not load initial ram disk '%s'\n",
732: initrd_filename);
733: exit(1);
734: }
735: }
736: if (initrd_size > 0) {
737: stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x218, INITRD_LOAD_ADDR);
738: stl_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x21c, initrd_size);
739: }
740: pstrcpy(phys_ram_base + KERNEL_CMDLINE_ADDR, 4096,
741: kernel_cmdline);
742: stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x20, 0xA33F);
743: stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x22,
744: KERNEL_CMDLINE_ADDR - KERNEL_PARAMS_ADDR);
745: /* loader type */
746: stw_raw(phys_ram_base + KERNEL_PARAMS_ADDR + 0x210, 0x01);
747: }
748:
749: if (pci_enabled) {
750: pci_bus = i440fx_init();
1.1.1.4 ! root 751: piix3_devfn = piix3_init(pci_bus);
1.1 root 752: } else {
753: pci_bus = NULL;
754: }
755:
756: /* init basic PC hardware */
757: register_ioport_write(0x80, 1, 1, ioport80_write, NULL);
758:
759: register_ioport_write(0xf0, 1, 1, ioportF0_write, NULL);
760:
761: if (cirrus_vga_enabled) {
762: if (pci_enabled) {
763: pci_cirrus_vga_init(pci_bus,
764: ds, phys_ram_base + ram_size, ram_size,
765: vga_ram_size);
766: } else {
767: isa_cirrus_vga_init(ds, phys_ram_base + ram_size, ram_size,
768: vga_ram_size);
769: }
770: } else {
771: vga_initialize(pci_bus, ds, phys_ram_base + ram_size, ram_size,
772: vga_ram_size, 0, 0);
773: }
774:
775: rtc_state = rtc_init(0x70, 8);
776:
777: register_ioport_read(0x92, 1, 1, ioport92_read, NULL);
778: register_ioport_write(0x92, 1, 1, ioport92_write, NULL);
779:
780: if (pci_enabled) {
781: ioapic = ioapic_init();
782: }
1.1.1.2 root 783: isa_pic = pic_init(pic_irq_request, first_cpu);
1.1 root 784: pit = pit_init(0x40, 0);
1.1.1.3 root 785: pcspk_init(pit);
1.1 root 786: if (pci_enabled) {
787: pic_set_alt_irq_func(isa_pic, ioapic_set_irq, ioapic);
788: }
789:
790: for(i = 0; i < MAX_SERIAL_PORTS; i++) {
791: if (serial_hds[i]) {
1.1.1.2 root 792: serial_init(&pic_set_irq_new, isa_pic,
793: serial_io[i], serial_irq[i], serial_hds[i]);
1.1 root 794: }
795: }
796:
797: for(i = 0; i < MAX_PARALLEL_PORTS; i++) {
798: if (parallel_hds[i]) {
799: parallel_init(parallel_io[i], parallel_irq[i], parallel_hds[i]);
800: }
801: }
802:
1.1.1.3 root 803: for(i = 0; i < nb_nics; i++) {
804: nd = &nd_table[i];
805: if (!nd->model) {
806: if (pci_enabled) {
807: nd->model = "ne2k_pci";
808: } else {
809: nd->model = "ne2k_isa";
810: }
1.1 root 811: }
1.1.1.3 root 812: if (strcmp(nd->model, "ne2k_isa") == 0) {
813: pc_init_ne2k_isa(nd);
814: } else if (pci_enabled) {
815: pci_nic_init(pci_bus, nd);
816: } else {
817: fprintf(stderr, "qemu: Unsupported NIC: %s\n", nd->model);
818: exit(1);
1.1 root 819: }
1.1.1.3 root 820: }
1.1 root 821:
1.1.1.3 root 822: if (pci_enabled) {
1.1.1.4 ! root 823: pci_piix3_ide_init(pci_bus, bs_table, piix3_devfn + 1);
1.1.1.3 root 824: } else {
1.1 root 825: for(i = 0; i < 2; i++) {
826: isa_ide_init(ide_iobase[i], ide_iobase2[i], ide_irq[i],
827: bs_table[2 * i], bs_table[2 * i + 1]);
828: }
829: }
830:
831: kbd_init();
832: DMA_init(0);
1.1.1.2 root 833: #ifdef HAS_AUDIO
834: audio_init(pci_enabled ? pci_bus : NULL);
1.1 root 835: #endif
836:
837: floppy_controller = fdctrl_init(6, 2, 0, 0x3f0, fd_table);
838:
839: cmos_init(ram_size, boot_device, bs_table);
840:
1.1.1.2 root 841: if (pci_enabled && usb_enabled) {
1.1.1.4 ! root 842: usb_uhci_init(pci_bus, piix3_devfn + 2);
! 843: }
! 844:
! 845: if (pci_enabled && acpi_enabled) {
! 846: piix4_pm_init(pci_bus, piix3_devfn + 3);
1.1.1.2 root 847: }
848:
1.1.1.4 ! root 849: #if 0
! 850: /* ??? Need to figure out some way for the user to
! 851: specify SCSI devices. */
! 852: if (pci_enabled) {
! 853: void *scsi;
! 854: BlockDriverState *bdrv;
! 855:
! 856: scsi = lsi_scsi_init(pci_bus, -1);
! 857: bdrv = bdrv_new("scsidisk");
! 858: bdrv_open(bdrv, "scsi_disk.img", 0);
! 859: lsi_scsi_attach(scsi, bdrv, -1);
! 860: bdrv = bdrv_new("scsicd");
! 861: bdrv_open(bdrv, "scsi_cd.iso", 0);
! 862: bdrv_set_type_hint(bdrv, BDRV_TYPE_CDROM);
! 863: lsi_scsi_attach(scsi, bdrv, -1);
! 864: }
! 865: #endif
1.1 root 866: /* must be done after all PCI devices are instanciated */
867: /* XXX: should be done in the Bochs BIOS */
868: if (pci_enabled) {
869: pci_bios_init();
1.1.1.4 ! root 870: if (acpi_enabled)
! 871: acpi_bios_init();
1.1 root 872: }
873: }
874:
1.1.1.2 root 875: static void pc_init_pci(int ram_size, int vga_ram_size, int boot_device,
876: DisplayState *ds, const char **fd_filename,
877: int snapshot,
878: const char *kernel_filename,
879: const char *kernel_cmdline,
880: const char *initrd_filename)
881: {
882: pc_init1(ram_size, vga_ram_size, boot_device,
883: ds, fd_filename, snapshot,
884: kernel_filename, kernel_cmdline,
885: initrd_filename, 1);
886: }
887:
888: static void pc_init_isa(int ram_size, int vga_ram_size, int boot_device,
889: DisplayState *ds, const char **fd_filename,
890: int snapshot,
891: const char *kernel_filename,
892: const char *kernel_cmdline,
893: const char *initrd_filename)
894: {
895: pc_init1(ram_size, vga_ram_size, boot_device,
896: ds, fd_filename, snapshot,
897: kernel_filename, kernel_cmdline,
898: initrd_filename, 0);
899: }
900:
1.1 root 901: QEMUMachine pc_machine = {
902: "pc",
903: "Standard PC",
1.1.1.2 root 904: pc_init_pci,
905: };
906:
907: QEMUMachine isapc_machine = {
908: "isapc",
909: "ISA-only PC",
910: pc_init_isa,
1.1 root 911: };
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