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Diff for /qemu/hw/ppc.h between versions 1.1.1.1 and 1.1.1.4

version 1.1.1.1, 2018/04/24 16:48:21 version 1.1.1.4, 2018/04/24 18:28:06
Line 13  static inline void clk_setup (clk_setup_ Line 13  static inline void clk_setup (clk_setup_
   
 clk_setup_cb cpu_ppc_tb_init (CPUState *env, uint32_t freq);  clk_setup_cb cpu_ppc_tb_init (CPUState *env, uint32_t freq);
 /* Embedded PowerPC DCR management */  /* Embedded PowerPC DCR management */
 typedef target_ulong (*dcr_read_cb)(void *opaque, int dcrn);  typedef uint32_t (*dcr_read_cb)(void *opaque, int dcrn);
 typedef void (*dcr_write_cb)(void *opaque, int dcrn, target_ulong val);  typedef void (*dcr_write_cb)(void *opaque, int dcrn, uint32_t val);
 int ppc_dcr_init (CPUState *env, int (*dcr_read_error)(int dcrn),  int ppc_dcr_init (CPUState *env, int (*dcr_read_error)(int dcrn),
                   int (*dcr_write_error)(int dcrn));                    int (*dcr_write_error)(int dcrn));
 int ppc_dcr_register (CPUState *env, int dcrn, void *opaque,  int ppc_dcr_register (CPUState *env, int dcrn, void *opaque,
Line 26  void ppc40x_chip_reset (CPUState *env); Line 26  void ppc40x_chip_reset (CPUState *env);
 void ppc40x_system_reset (CPUState *env);  void ppc40x_system_reset (CPUState *env);
 void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);  void PREP_debug_write (void *opaque, uint32_t addr, uint32_t val);
   
 extern CPUWriteMemoryFunc *PPC_io_write[];  extern CPUWriteMemoryFunc * const PPC_io_write[];
 extern CPUReadMemoryFunc *PPC_io_read[];  extern CPUReadMemoryFunc * const PPC_io_read[];
 void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);  void PPC_debug_write (void *opaque, uint32_t addr, uint32_t val);
   
   void ppc40x_irq_init (CPUState *env);
   void ppce500_irq_init (CPUState *env);
   void ppc6xx_irq_init (CPUState *env);
   void ppc970_irq_init (CPUState *env);
   
   /* PPC machines for OpenBIOS */
   enum {
       ARCH_PREP = 0,
       ARCH_MAC99,
       ARCH_HEATHROW,
       ARCH_MAC99_U3,
   };
   
   #define FW_CFG_PPC_WIDTH        (FW_CFG_ARCH_LOCAL + 0x00)
   #define FW_CFG_PPC_HEIGHT       (FW_CFG_ARCH_LOCAL + 0x01)
   #define FW_CFG_PPC_DEPTH        (FW_CFG_ARCH_LOCAL + 0x02)
   #define FW_CFG_PPC_TBFREQ       (FW_CFG_ARCH_LOCAL + 0x03)
   
   #define PPC_SERIAL_MM_BAUDBASE 399193
Removed from v.1.1.1.1  
changed lines
  Added in v.1.1.1.4

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