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1.1 root 1: /*
2: * QEMU PowerMac emulation shared definitions and prototypes
3: *
4: * Copyright (c) 2004-2007 Fabrice Bellard
5: * Copyright (c) 2007 Jocelyn Mayer
6: *
7: * Permission is hereby granted, free of charge, to any person obtaining a copy
8: * of this software and associated documentation files (the "Software"), to deal
9: * in the Software without restriction, including without limitation the rights
10: * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
11: * copies of the Software, and to permit persons to whom the Software is
12: * furnished to do so, subject to the following conditions:
13: *
14: * The above copyright notice and this permission notice shall be included in
15: * all copies or substantial portions of the Software.
16: *
17: * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
18: * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
19: * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
20: * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
21: * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
22: * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
23: * THE SOFTWARE.
24: */
25: #if !defined(__PPC_MAC_H__)
26: #define __PPC_MAC_H__
27:
28: /* SMP is not enabled, for now */
29: #define MAX_CPUS 1
30:
1.1.1.3 root 31: #define BIOS_SIZE (1024 * 1024)
1.1 root 32: #define BIOS_FILENAME "ppc_rom.bin"
33: #define NVRAM_SIZE 0x2000
1.1.1.2 root 34: #define PROM_FILENAME "openbios-ppc"
35: #define PROM_ADDR 0xfff00000
1.1 root 36:
37: #define KERNEL_LOAD_ADDR 0x01000000
1.1.1.7 ! root 38: #define KERNEL_GAP 0x00100000
1.1 root 39:
1.1.1.2 root 40: #define ESCC_CLOCK 3686400
1.1 root 41:
42: /* Cuda */
43: void cuda_init (int *cuda_mem_index, qemu_irq irq);
44:
45: /* MacIO */
46: void macio_init (PCIBus *bus, int device_id, int is_oldworld, int pic_mem_index,
47: int dbdma_mem_index, int cuda_mem_index, void *nvram,
1.1.1.2 root 48: int nb_ide, int *ide_mem_index, int escc_mem_index);
1.1 root 49:
50: /* Heathrow PIC */
51: qemu_irq *heathrow_pic_init(int *pmem_index,
52: int nb_cpus, qemu_irq **irqs);
53:
54: /* Grackle PCI */
55: PCIBus *pci_grackle_init(uint32_t base, qemu_irq *pic);
56:
57: /* UniNorth PCI */
58: PCIBus *pci_pmac_init(qemu_irq *pic);
1.1.1.5 root 59: PCIBus *pci_pmac_u3_init(qemu_irq *pic);
1.1 root 60:
61: /* Mac NVRAM */
62: typedef struct MacIONVRAMState MacIONVRAMState;
63:
1.1.1.2 root 64: MacIONVRAMState *macio_nvram_init (int *mem_index, target_phys_addr_t size,
65: unsigned int it_shift);
1.1 root 66: void macio_nvram_map (void *opaque, target_phys_addr_t mem_base);
67: void pmac_format_nvram_partition (MacIONVRAMState *nvr, int len);
68: uint32_t macio_nvram_read (void *opaque, uint32_t addr);
69: void macio_nvram_write (void *opaque, uint32_t addr, uint32_t val);
70:
71: /* adb.c */
72:
73: #define MAX_ADB_DEVICES 16
74:
75: #define ADB_MAX_OUT_LEN 16
76:
77: typedef struct ADBDevice ADBDevice;
78:
79: /* buf = NULL means polling */
80: typedef int ADBDeviceRequest(ADBDevice *d, uint8_t *buf_out,
81: const uint8_t *buf, int len);
82: typedef int ADBDeviceReset(ADBDevice *d);
83:
84: struct ADBDevice {
85: struct ADBBusState *bus;
86: int devaddr;
87: int handler;
88: ADBDeviceRequest *devreq;
89: ADBDeviceReset *devreset;
90: void *opaque;
91: };
92:
93: typedef struct ADBBusState {
94: ADBDevice devices[MAX_ADB_DEVICES];
95: int nb_devices;
96: int poll_index;
97: } ADBBusState;
98:
99: int adb_request(ADBBusState *s, uint8_t *buf_out,
100: const uint8_t *buf, int len);
101: int adb_poll(ADBBusState *s, uint8_t *buf_out);
102:
103: ADBDevice *adb_register_device(ADBBusState *s, int devaddr,
104: ADBDeviceRequest *devreq,
105: ADBDeviceReset *devreset,
106: void *opaque);
107: void adb_kbd_init(ADBBusState *bus);
108: void adb_mouse_init(ADBBusState *bus);
109:
110: extern ADBBusState adb_bus;
111:
112: #endif /* !defined(__PPC_MAC_H__) */
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