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1.1 root 1: #ifndef PRIMECELL_H
2: #define PRIMECELL_H
3:
4: /* Declarations for ARM PrimeCell based periperals. */
5: /* Also includes some devices that are currently only used by the
6: ARM boards. */
7:
8: /* pl031.c */
9: void pl031_init(uint32_t base, qemu_irq irq);
10:
11: /* pl110.c */
1.1.1.2 ! root 12: void *pl110_init(uint32_t base, qemu_irq irq, int);
1.1 root 13:
14: /* pl011.c */
15: enum pl011_type {
16: PL011_ARM,
17: PL011_LUMINARY
18: };
19:
20: void pl011_init(uint32_t base, qemu_irq irq, CharDriverState *chr,
21: enum pl011_type type);
22:
23: /* pl022.c */
24: typedef int (*ssi_xfer_cb)(void *, int);
25: void pl022_init(uint32_t base, qemu_irq irq, ssi_xfer_cb xfer_cb,
26: void *opaque);
27:
28: /* pl050.c */
29: void pl050_init(uint32_t base, qemu_irq irq, int is_mouse);
30:
31: /* pl061.c */
32: void pl061_float_high(void *opaque, uint8_t mask);
33: qemu_irq *pl061_init(uint32_t base, qemu_irq irq, qemu_irq **out);
34:
35: /* pl080.c */
36: void *pl080_init(uint32_t base, qemu_irq irq, int nchannels);
37:
38: /* pl181.c */
39: void pl181_init(uint32_t base, BlockDriverState *bd,
40: qemu_irq irq0, qemu_irq irq1);
41:
42: /* pl190.c */
43: qemu_irq *pl190_init(uint32_t base, qemu_irq irq, qemu_irq fiq);
44:
45: /* realview_gic.c */
46: qemu_irq *realview_gic_init(uint32_t base, qemu_irq parent_irq);
47:
48: /* mpcore.c */
49: extern qemu_irq *mpcore_irq_init(qemu_irq *cpu_irq);
50:
51: /* arm-timer.c */
52: void sp804_init(uint32_t base, qemu_irq irq);
53: void icp_pit_init(uint32_t base, qemu_irq *pic, int irq);
54:
55: /* arm_sysctl.c */
56: void arm_sysctl_init(uint32_t base, uint32_t sys_id);
57:
58: /* versatile_pci.c */
59: PCIBus *pci_vpb_init(qemu_irq *pic, int irq, int realview);
60:
61: #endif
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