Diff for /qemu/hw/realview_gic.c between versions 1.1.1.6 and 1.1.1.7

version 1.1.1.6, 2018/04/24 18:59:50 version 1.1.1.7, 2018/04/24 19:27:27
Line 23  gic_get_current_cpu(void) Line 23  gic_get_current_cpu(void)
   
 typedef struct {  typedef struct {
     gic_state gic;      gic_state gic;
     int iomemtype;      MemoryRegion iomem;
       MemoryRegion container;
 } RealViewGICState;  } RealViewGICState;
   
 static uint32_t realview_gic_cpu_read(void *opaque, target_phys_addr_t offset)  static uint64_t realview_gic_cpu_read(void *opaque, target_phys_addr_t offset,
                                         unsigned size)
 {  {
     gic_state *s = (gic_state *)opaque;      gic_state *s = (gic_state *)opaque;
     return gic_cpu_read(s, gic_get_current_cpu(), offset);      return gic_cpu_read(s, gic_get_current_cpu(), offset);
 }  }
   
 static void realview_gic_cpu_write(void *opaque, target_phys_addr_t offset,  static void realview_gic_cpu_write(void *opaque, target_phys_addr_t offset,
                           uint32_t value)                                     uint64_t value, unsigned size)
 {  {
     gic_state *s = (gic_state *)opaque;      gic_state *s = (gic_state *)opaque;
     gic_cpu_write(s, gic_get_current_cpu(), offset, value);      gic_cpu_write(s, gic_get_current_cpu(), offset, value);
 }  }
   
 static CPUReadMemoryFunc * const realview_gic_cpu_readfn[] = {  static const MemoryRegionOps realview_gic_cpu_ops = {
    realview_gic_cpu_read,      .read = realview_gic_cpu_read,
    realview_gic_cpu_read,      .write = realview_gic_cpu_write,
    realview_gic_cpu_read      .endianness = DEVICE_NATIVE_ENDIAN,
 };  };
   
 static CPUWriteMemoryFunc * const realview_gic_cpu_writefn[] = {  static void realview_gic_map_setup(RealViewGICState *s)
    realview_gic_cpu_write,  
    realview_gic_cpu_write,  
    realview_gic_cpu_write  
 };  
   
 static void realview_gic_map(SysBusDevice *dev, target_phys_addr_t base)  
 {  {
     RealViewGICState *s = FROM_SYSBUSGIC(RealViewGICState, dev);      memory_region_init(&s->container, "realview-gic-container", 0x2000);
     cpu_register_physical_memory(base, 0x1000, s->iomemtype);      memory_region_init_io(&s->iomem, &realview_gic_cpu_ops, &s->gic,
     cpu_register_physical_memory(base + 0x1000, 0x1000, s->gic.iomemtype);                            "realview-gic", 0x1000);
       memory_region_add_subregion(&s->container, 0, &s->iomem);
       memory_region_add_subregion(&s->container, 0x1000, &s->gic.iomem);
 }  }
   
 static int realview_gic_init(SysBusDevice *dev)  static int realview_gic_init(SysBusDevice *dev)
Line 63  static int realview_gic_init(SysBusDevic Line 61  static int realview_gic_init(SysBusDevic
     RealViewGICState *s = FROM_SYSBUSGIC(RealViewGICState, dev);      RealViewGICState *s = FROM_SYSBUSGIC(RealViewGICState, dev);
   
     gic_init(&s->gic);      gic_init(&s->gic);
     s->iomemtype = cpu_register_io_memory(realview_gic_cpu_readfn,      realview_gic_map_setup(s);
                                           realview_gic_cpu_writefn, s,      sysbus_init_mmio_region(dev, &s->container);
                                           DEVICE_NATIVE_ENDIAN);  
     sysbus_init_mmio_cb(dev, 0x2000, realview_gic_map);  
     return 0;      return 0;
 }  }
   

Removed from v.1.1.1.6  
changed lines
  Added in v.1.1.1.7


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