Diff for /qemu/hw/realview_gic.c between versions 1.1.1.7 and 1.1.1.8

version 1.1.1.7, 2018/04/24 19:27:27 version 1.1.1.8, 2018/04/24 19:47:13
Line 9 Line 9
   
 #include "sysbus.h"  #include "sysbus.h"
   
 #define GIC_NIRQ 96  
 #define NCPU 1  
   
 /* Only a single "CPU" interface is present.  */  
 static inline int  
 gic_get_current_cpu(void)  
 {  
   return 0;  
 }  
   
 #include "arm_gic.c"  
   
 typedef struct {  typedef struct {
     gic_state gic;      SysBusDevice busdev;
     MemoryRegion iomem;      DeviceState *gic;
     MemoryRegion container;      MemoryRegion container;
 } RealViewGICState;  } RealViewGICState;
   
 static uint64_t realview_gic_cpu_read(void *opaque, target_phys_addr_t offset,  static void realview_gic_set_irq(void *opaque, int irq, int level)
                                       unsigned size)  
 {  {
     gic_state *s = (gic_state *)opaque;      RealViewGICState *s = (RealViewGICState *)opaque;
     return gic_cpu_read(s, gic_get_current_cpu(), offset);      qemu_set_irq(qdev_get_gpio_in(s->gic, irq), level);
 }  }
   
 static void realview_gic_cpu_write(void *opaque, target_phys_addr_t offset,  static int realview_gic_init(SysBusDevice *dev)
                                    uint64_t value, unsigned size)  
 {  {
     gic_state *s = (gic_state *)opaque;      RealViewGICState *s = FROM_SYSBUS(RealViewGICState, dev);
     gic_cpu_write(s, gic_get_current_cpu(), offset, value);      SysBusDevice *busdev;
 }      /* The GICs on the RealView boards have a fixed nonconfigurable
        * number of interrupt lines, so we don't need to expose this as
        * a qdev property.
        */
       int numirq = 96;
   
       s->gic = qdev_create(NULL, "arm_gic");
       qdev_prop_set_uint32(s->gic, "num-cpu", 1);
       qdev_prop_set_uint32(s->gic, "num-irq", numirq);
       qdev_init_nofail(s->gic);
       busdev = sysbus_from_qdev(s->gic);
   
 static const MemoryRegionOps realview_gic_cpu_ops = {      /* Pass through outbound IRQ lines from the GIC */
     .read = realview_gic_cpu_read,      sysbus_pass_irq(dev, busdev);
     .write = realview_gic_cpu_write,  
     .endianness = DEVICE_NATIVE_ENDIAN,      /* Pass through inbound GPIO lines to the GIC */
 };      qdev_init_gpio_in(&s->busdev.qdev, realview_gic_set_irq, numirq - 32);
   
 static void realview_gic_map_setup(RealViewGICState *s)  
 {  
     memory_region_init(&s->container, "realview-gic-container", 0x2000);      memory_region_init(&s->container, "realview-gic-container", 0x2000);
     memory_region_init_io(&s->iomem, &realview_gic_cpu_ops, &s->gic,      memory_region_add_subregion(&s->container, 0,
                           "realview-gic", 0x1000);                                  sysbus_mmio_get_region(busdev, 1));
     memory_region_add_subregion(&s->container, 0, &s->iomem);      memory_region_add_subregion(&s->container, 0x1000,
     memory_region_add_subregion(&s->container, 0x1000, &s->gic.iomem);                                  sysbus_mmio_get_region(busdev, 0));
       sysbus_init_mmio(dev, &s->container);
       return 0;
 }  }
   
 static int realview_gic_init(SysBusDevice *dev)  static void realview_gic_class_init(ObjectClass *klass, void *data)
 {  {
     RealViewGICState *s = FROM_SYSBUSGIC(RealViewGICState, dev);      SysBusDeviceClass *sdc = SYS_BUS_DEVICE_CLASS(klass);
   
     gic_init(&s->gic);      sdc->init = realview_gic_init;
     realview_gic_map_setup(s);  
     sysbus_init_mmio_region(dev, &s->container);  
     return 0;  
 }  }
   
 static void realview_gic_register_devices(void)  static TypeInfo realview_gic_info = {
       .name          = "realview_gic",
       .parent        = TYPE_SYS_BUS_DEVICE,
       .instance_size = sizeof(RealViewGICState),
       .class_init    = realview_gic_class_init,
   };
   
   static void realview_gic_register_types(void)
 {  {
     sysbus_register_dev("realview_gic", sizeof(RealViewGICState),      type_register_static(&realview_gic_info);
                         realview_gic_init);  
 }  }
   
 device_init(realview_gic_register_devices)  type_init(realview_gic_register_types)

Removed from v.1.1.1.7  
changed lines
  Added in v.1.1.1.8


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