File:  [Qemu by Fabrice Bellard] / qemu / hw / realview_gic.c
Revision 1.1.1.3 (vendor branch): download - view: text, annotated - select for diffs
Tue Apr 24 17:23:46 2018 UTC (2 years, 7 months ago) by root
Branches: qemu, MAIN
CVS tags: qemu0111, qemu0110, HEAD
qemu 0.11.0

    1: /*
    2:  * ARM RealView Emulation Baseboard Interrupt Controller
    3:  *
    4:  * Copyright (c) 2006-2007 CodeSourcery.
    5:  * Written by Paul Brook
    6:  *
    7:  * This code is licenced under the GPL.
    8:  */
    9: 
   10: #include "sysbus.h"
   11: 
   12: #define GIC_NIRQ 96
   13: #define NCPU 1
   14: 
   15: /* Only a single "CPU" interface is present.  */
   16: static inline int
   17: gic_get_current_cpu(void)
   18: {
   19:   return 0;
   20: }
   21: 
   22: #include "arm_gic.c"
   23: 
   24: typedef struct {
   25:     gic_state gic;
   26:     int iomemtype;
   27: } RealViewGICState;
   28: 
   29: static uint32_t realview_gic_cpu_read(void *opaque, target_phys_addr_t offset)
   30: {
   31:     gic_state *s = (gic_state *)opaque;
   32:     return gic_cpu_read(s, gic_get_current_cpu(), offset);
   33: }
   34: 
   35: static void realview_gic_cpu_write(void *opaque, target_phys_addr_t offset,
   36:                           uint32_t value)
   37: {
   38:     gic_state *s = (gic_state *)opaque;
   39:     gic_cpu_write(s, gic_get_current_cpu(), offset, value);
   40: }
   41: 
   42: static CPUReadMemoryFunc *realview_gic_cpu_readfn[] = {
   43:    realview_gic_cpu_read,
   44:    realview_gic_cpu_read,
   45:    realview_gic_cpu_read
   46: };
   47: 
   48: static CPUWriteMemoryFunc *realview_gic_cpu_writefn[] = {
   49:    realview_gic_cpu_write,
   50:    realview_gic_cpu_write,
   51:    realview_gic_cpu_write
   52: };
   53: 
   54: static void realview_gic_map(SysBusDevice *dev, target_phys_addr_t base)
   55: {
   56:     RealViewGICState *s = FROM_SYSBUSGIC(RealViewGICState, dev);
   57:     cpu_register_physical_memory(base, 0x1000, s->iomemtype);
   58:     cpu_register_physical_memory(base + 0x1000, 0x1000, s->gic.iomemtype);
   59: }
   60: 
   61: static void realview_gic_init(SysBusDevice *dev)
   62: {
   63:     RealViewGICState *s = FROM_SYSBUSGIC(RealViewGICState, dev);
   64: 
   65:     gic_init(&s->gic);
   66:     s->iomemtype = cpu_register_io_memory(realview_gic_cpu_readfn,
   67:                                           realview_gic_cpu_writefn, s);
   68:     sysbus_init_mmio_cb(dev, 0x2000, realview_gic_map);
   69: }
   70: 
   71: static void realview_gic_register_devices(void)
   72: {
   73:     sysbus_register_dev("realview_gic", sizeof(RealViewGICState),
   74:                         realview_gic_init);
   75: }
   76: 
   77: device_init(realview_gic_register_devices)

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