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Annotation of qemu/hw/sh_intc.h, revision 1.1.1.1

1.1       root        1: #ifndef __SH_INTC_H__
                      2: #define __SH_INTC_H__
                      3: 
                      4: typedef unsigned char intc_enum;
                      5: 
                      6: struct intc_vect {
                      7:     intc_enum enum_id;
                      8:     unsigned short vect;
                      9: };
                     10: 
                     11: #define INTC_VECT(enum_id, vect) { enum_id, vect }
                     12: 
                     13: struct intc_group {
                     14:     intc_enum enum_id;
                     15:     intc_enum enum_ids[32];
                     16: };
                     17: 
                     18: #define INTC_GROUP(enum_id, ids...) { enum_id, { ids } }
                     19: 
                     20: struct intc_mask_reg {
                     21:     unsigned long set_reg, clr_reg, reg_width;
                     22:     intc_enum enum_ids[32];
                     23:     unsigned long value;
                     24: };
                     25: 
                     26: struct intc_prio_reg {
                     27:     unsigned long set_reg, clr_reg, reg_width, field_width;
                     28:     intc_enum enum_ids[16];
                     29:     unsigned long value;
                     30: };
                     31: 
                     32: #define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a)
                     33: 
                     34: struct intc_source {
                     35:     unsigned short vect;
                     36:     intc_enum next_enum_id;
                     37: 
                     38:     int asserted; /* emulates the interrupt signal line from device to intc */
                     39:     int enable_count;
                     40:     int enable_max;
                     41:     int pending; /* emulates the result of signal and masking */
                     42:     struct intc_desc *parent;
                     43: };
                     44: 
                     45: struct intc_desc {
                     46:     struct intc_source *sources;
                     47:     int nr_sources;
                     48:     struct intc_mask_reg *mask_regs;
                     49:     int nr_mask_regs;
                     50:     struct intc_prio_reg *prio_regs;
                     51:     int nr_prio_regs;
                     52: 
                     53:     int iomemtype;
                     54:     int pending; /* number of interrupt sources that has pending set */
                     55: };
                     56: 
                     57: int sh_intc_get_pending_vector(struct intc_desc *desc, int imask);
                     58: struct intc_source *sh_intc_source(struct intc_desc *desc, intc_enum id);
                     59: void sh_intc_toggle_source(struct intc_source *source,
                     60:                           int enable_adj, int assert_adj);
                     61: 
                     62: void sh_intc_register_sources(struct intc_desc *desc,
                     63:                              struct intc_vect *vectors,
                     64:                              int nr_vectors,
                     65:                              struct intc_group *groups,
                     66:                              int nr_groups);
                     67: 
                     68: int sh_intc_init(struct intc_desc *desc,
                     69:                 int nr_sources,
                     70:                 struct intc_mask_reg *mask_regs,
                     71:                 int nr_mask_regs,
                     72:                 struct intc_prio_reg *prio_regs,
                     73:                 int nr_prio_regs);
                     74: 
                     75: #endif /* __SH_INTC_H__ */

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