Annotation of qemu/hw/spapr_pci.h, revision 1.1.1.2

1.1       root        1: /*
                      2:  * QEMU SPAPR PCI BUS definitions
                      3:  *
                      4:  * Copyright (c) 2011 Alexey Kardashevskiy <aik@au1.ibm.com>
                      5:  *
                      6:  * This library is free software; you can redistribute it and/or
                      7:  * modify it under the terms of the GNU Lesser General Public
                      8:  * License as published by the Free Software Foundation; either
                      9:  * version 2 of the License, or (at your option) any later version.
                     10:  *
                     11:  * This library is distributed in the hope that it will be useful,
                     12:  * but WITHOUT ANY WARRANTY; without even the implied warranty of
                     13:  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
                     14:  * Lesser General Public License for more details.
                     15:  *
                     16:  * You should have received a copy of the GNU Lesser General Public
                     17:  * License along with this library; if not, see <http://www.gnu.org/licenses/>.
                     18:  */
                     19: #if !defined(__HW_SPAPR_H__)
                     20: #error Please include spapr.h before this file!
                     21: #endif
                     22: 
                     23: #if !defined(__HW_SPAPR_PCI_H__)
                     24: #define __HW_SPAPR_PCI_H__
                     25: 
1.1.1.2 ! root       26: #include "hw/pci.h"
1.1       root       27: #include "hw/pci_host.h"
                     28: #include "hw/xics.h"
                     29: 
                     30: typedef struct sPAPRPHBState {
                     31:     SysBusDevice busdev;
                     32:     PCIHostState host_state;
                     33: 
                     34:     uint64_t buid;
1.1.1.2 ! root       35:     char *busname;
        !            36:     char *dtbusname;
1.1       root       37: 
                     38:     MemoryRegion memspace, iospace;
1.1.1.2 ! root       39:     target_phys_addr_t mem_win_addr, mem_win_size, io_win_addr, io_win_size;
1.1       root       40:     MemoryRegion memwindow, iowindow;
                     41: 
                     42:     struct {
                     43:         uint32_t dt_irq;
                     44:         qemu_irq qirq;
1.1.1.2 ! root       45:     } lsi_table[PCI_NUM_PINS];
1.1       root       46: 
                     47:     QLIST_ENTRY(sPAPRPHBState) list;
                     48: } sPAPRPHBState;
                     49: 
                     50: #define SPAPR_PCI_MEM_WIN_BUS_OFFSET 0x80000000ULL
                     51: #define SPAPR_PCI_IO_WIN_SIZE        0x10000
                     52: 
                     53: void spapr_create_phb(sPAPREnvironment *spapr,
                     54:                       const char *busname, uint64_t buid,
                     55:                       uint64_t mem_win_addr, uint64_t mem_win_size,
                     56:                       uint64_t io_win_addr);
                     57: 
                     58: int spapr_populate_pci_devices(sPAPRPHBState *phb,
                     59:                                uint32_t xics_phandle,
                     60:                                void *fdt);
                     61: 
                     62: #endif /* __HW_SPAPR_PCI_H__ */

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