![[BACK]](/cvsweb/icons/back.gif){kind=icon}
Return to twl92230.c CVS log ![[TXT]](/cvsweb/icons/text.gif){kind=icon}
![[DIR]](/cvsweb/icons/dir.gif){kind=icon}
Up to [Qemu by Fabrice Bellard] / qemu / hw|
Return to twl92230.c CVS log | Up to [Qemu by Fabrice Bellard] / qemu / hw |
1.1 root 1: /*
2: * TI TWL92230C energy-management companion device for the OMAP24xx.
3: * Aka. Menelaus (N4200 MENELAUS1_V2.2)
4: *
5: * Copyright (C) 2008 Nokia Corporation
6: * Written by Andrzej Zaborowski <[email protected]>
7: *
8: * This program is free software; you can redistribute it and/or
9: * modify it under the terms of the GNU General Public License as
10: * published by the Free Software Foundation; either version 2 or
11: * (at your option) version 3 of the License.
12: *
13: * This program is distributed in the hope that it will be useful,
14: * but WITHOUT ANY WARRANTY; without even the implied warranty of
15: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16: * GNU General Public License for more details.
17: *
18: * You should have received a copy of the GNU General Public License along
1.1.1.2 root 19: * with this program; if not, see <http://www.gnu.org/licenses/>.
1.1 root 20: */
21:
22: #include "hw.h"
23: #include "qemu-timer.h"
24: #include "i2c.h"
1.1.1.5 ! root 25: #include "sysemu.h"
1.1 root 26: #include "console.h"
27:
28: #define VERBOSE 1
29:
1.1.1.2 root 30: typedef struct {
1.1.1.5 ! root 31: I2CSlave i2c;
1.1 root 32:
33: int firstbyte;
34: uint8_t reg;
35:
36: uint8_t vcore[5];
37: uint8_t dcdc[3];
38: uint8_t ldo[8];
39: uint8_t sleep[2];
40: uint8_t osc;
41: uint8_t detect;
42: uint16_t mask;
43: uint16_t status;
44: uint8_t dir;
45: uint8_t inputs;
46: uint8_t outputs;
47: uint8_t bbsms;
48: uint8_t pull[4];
49: uint8_t mmc_ctrl[3];
50: uint8_t mmc_debounce;
51: struct {
52: uint8_t ctrl;
53: uint16_t comp;
54: QEMUTimer *hz_tm;
55: int64_t next;
56: struct tm tm;
57: struct tm new;
58: struct tm alm;
59: int sec_offset;
60: int alm_sec;
61: int next_comp;
62: } rtc;
1.1.1.3 root 63: uint16_t rtc_next_vmstate;
1.1.1.2 root 64: qemu_irq out[4];
1.1.1.3 root 65: uint8_t pwrbtn_state;
1.1.1.2 root 66: } MenelausState;
1.1 root 67:
1.1.1.2 root 68: static inline void menelaus_update(MenelausState *s)
1.1 root 69: {
1.1.1.2 root 70: qemu_set_irq(s->out[3], s->status & ~s->mask);
1.1 root 71: }
72:
1.1.1.2 root 73: static inline void menelaus_rtc_start(MenelausState *s)
1.1 root 74: {
1.1.1.5 ! root 75: s->rtc.next += qemu_get_clock_ms(rtc_clock);
1.1 root 76: qemu_mod_timer(s->rtc.hz_tm, s->rtc.next);
77: }
78:
1.1.1.2 root 79: static inline void menelaus_rtc_stop(MenelausState *s)
1.1 root 80: {
81: qemu_del_timer(s->rtc.hz_tm);
1.1.1.5 ! root 82: s->rtc.next -= qemu_get_clock_ms(rtc_clock);
1.1 root 83: if (s->rtc.next < 1)
84: s->rtc.next = 1;
85: }
86:
1.1.1.2 root 87: static void menelaus_rtc_update(MenelausState *s)
1.1 root 88: {
89: qemu_get_timedate(&s->rtc.tm, s->rtc.sec_offset);
90: }
91:
1.1.1.2 root 92: static void menelaus_alm_update(MenelausState *s)
1.1 root 93: {
94: if ((s->rtc.ctrl & 3) == 3)
95: s->rtc.alm_sec = qemu_timedate_diff(&s->rtc.alm) - s->rtc.sec_offset;
96: }
97:
98: static void menelaus_rtc_hz(void *opaque)
99: {
1.1.1.2 root 100: MenelausState *s = (MenelausState *) opaque;
1.1 root 101:
102: s->rtc.next_comp --;
103: s->rtc.alm_sec --;
104: s->rtc.next += 1000;
105: qemu_mod_timer(s->rtc.hz_tm, s->rtc.next);
106: if ((s->rtc.ctrl >> 3) & 3) { /* EVERY */
107: menelaus_rtc_update(s);
108: if (((s->rtc.ctrl >> 3) & 3) == 1 && !s->rtc.tm.tm_sec)
109: s->status |= 1 << 8; /* RTCTMR */
110: else if (((s->rtc.ctrl >> 3) & 3) == 2 && !s->rtc.tm.tm_min)
111: s->status |= 1 << 8; /* RTCTMR */
112: else if (!s->rtc.tm.tm_hour)
113: s->status |= 1 << 8; /* RTCTMR */
114: } else
115: s->status |= 1 << 8; /* RTCTMR */
116: if ((s->rtc.ctrl >> 1) & 1) { /* RTC_AL_EN */
117: if (s->rtc.alm_sec == 0)
118: s->status |= 1 << 9; /* RTCALM */
119: /* TODO: wake-up */
120: }
121: if (s->rtc.next_comp <= 0) {
122: s->rtc.next -= muldiv64((int16_t) s->rtc.comp, 1000, 0x8000);
123: s->rtc.next_comp = 3600;
124: }
125: menelaus_update(s);
126: }
127:
1.1.1.5 ! root 128: static void menelaus_reset(I2CSlave *i2c)
1.1 root 129: {
1.1.1.2 root 130: MenelausState *s = (MenelausState *) i2c;
1.1 root 131: s->reg = 0x00;
132:
133: s->vcore[0] = 0x0c; /* XXX: X-loader needs 0x8c? check! */
134: s->vcore[1] = 0x05;
135: s->vcore[2] = 0x02;
136: s->vcore[3] = 0x0c;
137: s->vcore[4] = 0x03;
138: s->dcdc[0] = 0x33; /* Depends on wiring */
139: s->dcdc[1] = 0x03;
140: s->dcdc[2] = 0x00;
141: s->ldo[0] = 0x95;
142: s->ldo[1] = 0x7e;
143: s->ldo[2] = 0x00;
144: s->ldo[3] = 0x00; /* Depends on wiring */
145: s->ldo[4] = 0x03; /* Depends on wiring */
146: s->ldo[5] = 0x00;
147: s->ldo[6] = 0x00;
148: s->ldo[7] = 0x00;
149: s->sleep[0] = 0x00;
150: s->sleep[1] = 0x00;
151: s->osc = 0x01;
152: s->detect = 0x09;
153: s->mask = 0x0fff;
154: s->status = 0;
155: s->dir = 0x07;
156: s->outputs = 0x00;
157: s->bbsms = 0x00;
158: s->pull[0] = 0x00;
159: s->pull[1] = 0x00;
160: s->pull[2] = 0x00;
161: s->pull[3] = 0x00;
162: s->mmc_ctrl[0] = 0x03;
163: s->mmc_ctrl[1] = 0xc0;
164: s->mmc_ctrl[2] = 0x00;
165: s->mmc_debounce = 0x05;
166:
167: if (s->rtc.ctrl & 1)
168: menelaus_rtc_stop(s);
169: s->rtc.ctrl = 0x00;
170: s->rtc.comp = 0x0000;
171: s->rtc.next = 1000;
172: s->rtc.sec_offset = 0;
173: s->rtc.next_comp = 1800;
174: s->rtc.alm_sec = 1800;
175: s->rtc.alm.tm_sec = 0x00;
176: s->rtc.alm.tm_min = 0x00;
177: s->rtc.alm.tm_hour = 0x00;
178: s->rtc.alm.tm_mday = 0x01;
179: s->rtc.alm.tm_mon = 0x00;
180: s->rtc.alm.tm_year = 2004;
181: menelaus_update(s);
182: }
183:
184: static void menelaus_gpio_set(void *opaque, int line, int level)
185: {
1.1.1.2 root 186: MenelausState *s = (MenelausState *) opaque;
1.1 root 187:
1.1.1.5 ! root 188: if (line < 3) {
! 189: /* No interrupt generated */
! 190: s->inputs &= ~(1 << line);
! 191: s->inputs |= level << line;
! 192: return;
! 193: }
1.1 root 194:
195: if (!s->pwrbtn_state && level) {
196: s->status |= 1 << 11; /* PSHBTN */
197: menelaus_update(s);
198: }
199: s->pwrbtn_state = level;
200: }
201:
202: #define MENELAUS_REV 0x01
203: #define MENELAUS_VCORE_CTRL1 0x02
204: #define MENELAUS_VCORE_CTRL2 0x03
205: #define MENELAUS_VCORE_CTRL3 0x04
206: #define MENELAUS_VCORE_CTRL4 0x05
207: #define MENELAUS_VCORE_CTRL5 0x06
208: #define MENELAUS_DCDC_CTRL1 0x07
209: #define MENELAUS_DCDC_CTRL2 0x08
210: #define MENELAUS_DCDC_CTRL3 0x09
211: #define MENELAUS_LDO_CTRL1 0x0a
212: #define MENELAUS_LDO_CTRL2 0x0b
213: #define MENELAUS_LDO_CTRL3 0x0c
214: #define MENELAUS_LDO_CTRL4 0x0d
215: #define MENELAUS_LDO_CTRL5 0x0e
216: #define MENELAUS_LDO_CTRL6 0x0f
217: #define MENELAUS_LDO_CTRL7 0x10
218: #define MENELAUS_LDO_CTRL8 0x11
219: #define MENELAUS_SLEEP_CTRL1 0x12
220: #define MENELAUS_SLEEP_CTRL2 0x13
221: #define MENELAUS_DEVICE_OFF 0x14
222: #define MENELAUS_OSC_CTRL 0x15
223: #define MENELAUS_DETECT_CTRL 0x16
224: #define MENELAUS_INT_MASK1 0x17
225: #define MENELAUS_INT_MASK2 0x18
226: #define MENELAUS_INT_STATUS1 0x19
227: #define MENELAUS_INT_STATUS2 0x1a
228: #define MENELAUS_INT_ACK1 0x1b
229: #define MENELAUS_INT_ACK2 0x1c
230: #define MENELAUS_GPIO_CTRL 0x1d
231: #define MENELAUS_GPIO_IN 0x1e
232: #define MENELAUS_GPIO_OUT 0x1f
233: #define MENELAUS_BBSMS 0x20
234: #define MENELAUS_RTC_CTRL 0x21
235: #define MENELAUS_RTC_UPDATE 0x22
236: #define MENELAUS_RTC_SEC 0x23
237: #define MENELAUS_RTC_MIN 0x24
238: #define MENELAUS_RTC_HR 0x25
239: #define MENELAUS_RTC_DAY 0x26
240: #define MENELAUS_RTC_MON 0x27
241: #define MENELAUS_RTC_YR 0x28
242: #define MENELAUS_RTC_WKDAY 0x29
243: #define MENELAUS_RTC_AL_SEC 0x2a
244: #define MENELAUS_RTC_AL_MIN 0x2b
245: #define MENELAUS_RTC_AL_HR 0x2c
246: #define MENELAUS_RTC_AL_DAY 0x2d
247: #define MENELAUS_RTC_AL_MON 0x2e
248: #define MENELAUS_RTC_AL_YR 0x2f
249: #define MENELAUS_RTC_COMP_MSB 0x30
250: #define MENELAUS_RTC_COMP_LSB 0x31
251: #define MENELAUS_S1_PULL_EN 0x32
252: #define MENELAUS_S1_PULL_DIR 0x33
253: #define MENELAUS_S2_PULL_EN 0x34
254: #define MENELAUS_S2_PULL_DIR 0x35
255: #define MENELAUS_MCT_CTRL1 0x36
256: #define MENELAUS_MCT_CTRL2 0x37
257: #define MENELAUS_MCT_CTRL3 0x38
258: #define MENELAUS_MCT_PIN_ST 0x39
259: #define MENELAUS_DEBOUNCE1 0x3a
260:
261: static uint8_t menelaus_read(void *opaque, uint8_t addr)
262: {
1.1.1.2 root 263: MenelausState *s = (MenelausState *) opaque;
1.1 root 264: int reg = 0;
265:
266: switch (addr) {
267: case MENELAUS_REV:
268: return 0x22;
269:
270: case MENELAUS_VCORE_CTRL5: reg ++;
271: case MENELAUS_VCORE_CTRL4: reg ++;
272: case MENELAUS_VCORE_CTRL3: reg ++;
273: case MENELAUS_VCORE_CTRL2: reg ++;
274: case MENELAUS_VCORE_CTRL1:
275: return s->vcore[reg];
276:
277: case MENELAUS_DCDC_CTRL3: reg ++;
278: case MENELAUS_DCDC_CTRL2: reg ++;
279: case MENELAUS_DCDC_CTRL1:
280: return s->dcdc[reg];
281:
282: case MENELAUS_LDO_CTRL8: reg ++;
283: case MENELAUS_LDO_CTRL7: reg ++;
284: case MENELAUS_LDO_CTRL6: reg ++;
285: case MENELAUS_LDO_CTRL5: reg ++;
286: case MENELAUS_LDO_CTRL4: reg ++;
287: case MENELAUS_LDO_CTRL3: reg ++;
288: case MENELAUS_LDO_CTRL2: reg ++;
289: case MENELAUS_LDO_CTRL1:
290: return s->ldo[reg];
291:
292: case MENELAUS_SLEEP_CTRL2: reg ++;
293: case MENELAUS_SLEEP_CTRL1:
294: return s->sleep[reg];
295:
296: case MENELAUS_DEVICE_OFF:
297: return 0;
298:
299: case MENELAUS_OSC_CTRL:
300: return s->osc | (1 << 7); /* CLK32K_GOOD */
301:
302: case MENELAUS_DETECT_CTRL:
303: return s->detect;
304:
305: case MENELAUS_INT_MASK1:
306: return (s->mask >> 0) & 0xff;
307: case MENELAUS_INT_MASK2:
308: return (s->mask >> 8) & 0xff;
309:
310: case MENELAUS_INT_STATUS1:
311: return (s->status >> 0) & 0xff;
312: case MENELAUS_INT_STATUS2:
313: return (s->status >> 8) & 0xff;
314:
315: case MENELAUS_INT_ACK1:
316: case MENELAUS_INT_ACK2:
317: return 0;
318:
319: case MENELAUS_GPIO_CTRL:
320: return s->dir;
321: case MENELAUS_GPIO_IN:
322: return s->inputs | (~s->dir & s->outputs);
323: case MENELAUS_GPIO_OUT:
324: return s->outputs;
325:
326: case MENELAUS_BBSMS:
327: return s->bbsms;
328:
329: case MENELAUS_RTC_CTRL:
330: return s->rtc.ctrl;
331: case MENELAUS_RTC_UPDATE:
332: return 0x00;
333: case MENELAUS_RTC_SEC:
334: menelaus_rtc_update(s);
335: return to_bcd(s->rtc.tm.tm_sec);
336: case MENELAUS_RTC_MIN:
337: menelaus_rtc_update(s);
338: return to_bcd(s->rtc.tm.tm_min);
339: case MENELAUS_RTC_HR:
340: menelaus_rtc_update(s);
341: if ((s->rtc.ctrl >> 2) & 1) /* MODE12_n24 */
342: return to_bcd((s->rtc.tm.tm_hour % 12) + 1) |
343: (!!(s->rtc.tm.tm_hour >= 12) << 7); /* PM_nAM */
344: else
345: return to_bcd(s->rtc.tm.tm_hour);
346: case MENELAUS_RTC_DAY:
347: menelaus_rtc_update(s);
348: return to_bcd(s->rtc.tm.tm_mday);
349: case MENELAUS_RTC_MON:
350: menelaus_rtc_update(s);
351: return to_bcd(s->rtc.tm.tm_mon + 1);
352: case MENELAUS_RTC_YR:
353: menelaus_rtc_update(s);
354: return to_bcd(s->rtc.tm.tm_year - 2000);
355: case MENELAUS_RTC_WKDAY:
356: menelaus_rtc_update(s);
357: return to_bcd(s->rtc.tm.tm_wday);
358: case MENELAUS_RTC_AL_SEC:
359: return to_bcd(s->rtc.alm.tm_sec);
360: case MENELAUS_RTC_AL_MIN:
361: return to_bcd(s->rtc.alm.tm_min);
362: case MENELAUS_RTC_AL_HR:
363: if ((s->rtc.ctrl >> 2) & 1) /* MODE12_n24 */
364: return to_bcd((s->rtc.alm.tm_hour % 12) + 1) |
365: (!!(s->rtc.alm.tm_hour >= 12) << 7);/* AL_PM_nAM */
366: else
367: return to_bcd(s->rtc.alm.tm_hour);
368: case MENELAUS_RTC_AL_DAY:
369: return to_bcd(s->rtc.alm.tm_mday);
370: case MENELAUS_RTC_AL_MON:
371: return to_bcd(s->rtc.alm.tm_mon + 1);
372: case MENELAUS_RTC_AL_YR:
373: return to_bcd(s->rtc.alm.tm_year - 2000);
374: case MENELAUS_RTC_COMP_MSB:
375: return (s->rtc.comp >> 8) & 0xff;
376: case MENELAUS_RTC_COMP_LSB:
377: return (s->rtc.comp >> 0) & 0xff;
378:
379: case MENELAUS_S1_PULL_EN:
380: return s->pull[0];
381: case MENELAUS_S1_PULL_DIR:
382: return s->pull[1];
383: case MENELAUS_S2_PULL_EN:
384: return s->pull[2];
385: case MENELAUS_S2_PULL_DIR:
386: return s->pull[3];
387:
388: case MENELAUS_MCT_CTRL3: reg ++;
389: case MENELAUS_MCT_CTRL2: reg ++;
390: case MENELAUS_MCT_CTRL1:
391: return s->mmc_ctrl[reg];
392: case MENELAUS_MCT_PIN_ST:
393: /* TODO: return the real Card Detect */
394: return 0;
395: case MENELAUS_DEBOUNCE1:
396: return s->mmc_debounce;
397:
398: default:
399: #ifdef VERBOSE
400: printf("%s: unknown register %02x\n", __FUNCTION__, addr);
401: #endif
402: break;
403: }
404: return 0;
405: }
406:
407: static void menelaus_write(void *opaque, uint8_t addr, uint8_t value)
408: {
1.1.1.2 root 409: MenelausState *s = (MenelausState *) opaque;
1.1 root 410: int line;
411: int reg = 0;
412: struct tm tm;
413:
414: switch (addr) {
415: case MENELAUS_VCORE_CTRL1:
416: s->vcore[0] = (value & 0xe) | MIN(value & 0x1f, 0x12);
417: break;
418: case MENELAUS_VCORE_CTRL2:
419: s->vcore[1] = value;
420: break;
421: case MENELAUS_VCORE_CTRL3:
422: s->vcore[2] = MIN(value & 0x1f, 0x12);
423: break;
424: case MENELAUS_VCORE_CTRL4:
425: s->vcore[3] = MIN(value & 0x1f, 0x12);
426: break;
427: case MENELAUS_VCORE_CTRL5:
428: s->vcore[4] = value & 3;
429: /* XXX
430: * auto set to 3 on M_Active, nRESWARM
431: * auto set to 0 on M_WaitOn, M_Backup
432: */
433: break;
434:
435: case MENELAUS_DCDC_CTRL1:
436: s->dcdc[0] = value & 0x3f;
437: break;
438: case MENELAUS_DCDC_CTRL2:
439: s->dcdc[1] = value & 0x07;
440: /* XXX
441: * auto set to 3 on M_Active, nRESWARM
442: * auto set to 0 on M_WaitOn, M_Backup
443: */
444: break;
445: case MENELAUS_DCDC_CTRL3:
446: s->dcdc[2] = value & 0x07;
447: break;
448:
449: case MENELAUS_LDO_CTRL1:
450: s->ldo[0] = value;
451: break;
452: case MENELAUS_LDO_CTRL2:
453: s->ldo[1] = value & 0x7f;
454: /* XXX
455: * auto set to 0x7e on M_WaitOn, M_Backup
456: */
457: break;
458: case MENELAUS_LDO_CTRL3:
459: s->ldo[2] = value & 3;
460: /* XXX
461: * auto set to 3 on M_Active, nRESWARM
462: * auto set to 0 on M_WaitOn, M_Backup
463: */
464: break;
465: case MENELAUS_LDO_CTRL4:
466: s->ldo[3] = value & 3;
467: /* XXX
468: * auto set to 3 on M_Active, nRESWARM
469: * auto set to 0 on M_WaitOn, M_Backup
470: */
471: break;
472: case MENELAUS_LDO_CTRL5:
473: s->ldo[4] = value & 3;
474: /* XXX
475: * auto set to 3 on M_Active, nRESWARM
476: * auto set to 0 on M_WaitOn, M_Backup
477: */
478: break;
479: case MENELAUS_LDO_CTRL6:
480: s->ldo[5] = value & 3;
481: break;
482: case MENELAUS_LDO_CTRL7:
483: s->ldo[6] = value & 3;
484: break;
485: case MENELAUS_LDO_CTRL8:
486: s->ldo[7] = value & 3;
487: break;
488:
489: case MENELAUS_SLEEP_CTRL2: reg ++;
490: case MENELAUS_SLEEP_CTRL1:
491: s->sleep[reg] = value;
492: break;
493:
494: case MENELAUS_DEVICE_OFF:
495: if (value & 1)
496: menelaus_reset(&s->i2c);
497: break;
498:
499: case MENELAUS_OSC_CTRL:
500: s->osc = value & 7;
501: break;
502:
503: case MENELAUS_DETECT_CTRL:
504: s->detect = value & 0x7f;
505: break;
506:
507: case MENELAUS_INT_MASK1:
508: s->mask &= 0xf00;
509: s->mask |= value << 0;
510: menelaus_update(s);
511: break;
512: case MENELAUS_INT_MASK2:
513: s->mask &= 0x0ff;
514: s->mask |= value << 8;
515: menelaus_update(s);
516: break;
517:
518: case MENELAUS_INT_ACK1:
519: s->status &= ~(((uint16_t) value) << 0);
520: menelaus_update(s);
521: break;
522: case MENELAUS_INT_ACK2:
523: s->status &= ~(((uint16_t) value) << 8);
524: menelaus_update(s);
525: break;
526:
527: case MENELAUS_GPIO_CTRL:
1.1.1.2 root 528: for (line = 0; line < 3; line ++) {
529: if (((s->dir ^ value) >> line) & 1) {
530: qemu_set_irq(s->out[line],
531: ((s->outputs & ~s->dir) >> line) & 1);
532: }
533: }
1.1 root 534: s->dir = value & 0x67;
535: break;
536: case MENELAUS_GPIO_OUT:
1.1.1.2 root 537: for (line = 0; line < 3; line ++) {
538: if ((((s->outputs ^ value) & ~s->dir) >> line) & 1) {
539: qemu_set_irq(s->out[line], (s->outputs >> line) & 1);
540: }
541: }
1.1 root 542: s->outputs = value & 0x07;
543: break;
544:
545: case MENELAUS_BBSMS:
546: s->bbsms = 0x0d;
547: break;
548:
549: case MENELAUS_RTC_CTRL:
550: if ((s->rtc.ctrl ^ value) & 1) { /* RTC_EN */
551: if (value & 1)
552: menelaus_rtc_start(s);
553: else
554: menelaus_rtc_stop(s);
555: }
556: s->rtc.ctrl = value & 0x1f;
557: menelaus_alm_update(s);
558: break;
559: case MENELAUS_RTC_UPDATE:
560: menelaus_rtc_update(s);
561: memcpy(&tm, &s->rtc.tm, sizeof(tm));
562: switch (value & 0xf) {
563: case 0:
564: break;
565: case 1:
566: tm.tm_sec = s->rtc.new.tm_sec;
567: break;
568: case 2:
569: tm.tm_min = s->rtc.new.tm_min;
570: break;
571: case 3:
572: if (s->rtc.new.tm_hour > 23)
573: goto rtc_badness;
574: tm.tm_hour = s->rtc.new.tm_hour;
575: break;
576: case 4:
577: if (s->rtc.new.tm_mday < 1)
578: goto rtc_badness;
579: /* TODO check range */
580: tm.tm_mday = s->rtc.new.tm_mday;
581: break;
582: case 5:
583: if (s->rtc.new.tm_mon < 0 || s->rtc.new.tm_mon > 11)
584: goto rtc_badness;
585: tm.tm_mon = s->rtc.new.tm_mon;
586: break;
587: case 6:
588: tm.tm_year = s->rtc.new.tm_year;
589: break;
590: case 7:
591: /* TODO set .tm_mday instead */
592: tm.tm_wday = s->rtc.new.tm_wday;
593: break;
594: case 8:
595: if (s->rtc.new.tm_hour > 23)
596: goto rtc_badness;
597: if (s->rtc.new.tm_mday < 1)
598: goto rtc_badness;
599: if (s->rtc.new.tm_mon < 0 || s->rtc.new.tm_mon > 11)
600: goto rtc_badness;
601: tm.tm_sec = s->rtc.new.tm_sec;
602: tm.tm_min = s->rtc.new.tm_min;
603: tm.tm_hour = s->rtc.new.tm_hour;
604: tm.tm_mday = s->rtc.new.tm_mday;
605: tm.tm_mon = s->rtc.new.tm_mon;
606: tm.tm_year = s->rtc.new.tm_year;
607: break;
608: rtc_badness:
609: default:
610: fprintf(stderr, "%s: bad RTC_UPDATE value %02x\n",
611: __FUNCTION__, value);
612: s->status |= 1 << 10; /* RTCERR */
613: menelaus_update(s);
614: }
615: s->rtc.sec_offset = qemu_timedate_diff(&tm);
616: break;
617: case MENELAUS_RTC_SEC:
618: s->rtc.tm.tm_sec = from_bcd(value & 0x7f);
619: break;
620: case MENELAUS_RTC_MIN:
621: s->rtc.tm.tm_min = from_bcd(value & 0x7f);
622: break;
623: case MENELAUS_RTC_HR:
624: s->rtc.tm.tm_hour = (s->rtc.ctrl & (1 << 2)) ? /* MODE12_n24 */
625: MIN(from_bcd(value & 0x3f), 12) + ((value >> 7) ? 11 : -1) :
626: from_bcd(value & 0x3f);
627: break;
628: case MENELAUS_RTC_DAY:
629: s->rtc.tm.tm_mday = from_bcd(value);
630: break;
631: case MENELAUS_RTC_MON:
632: s->rtc.tm.tm_mon = MAX(1, from_bcd(value)) - 1;
633: break;
634: case MENELAUS_RTC_YR:
635: s->rtc.tm.tm_year = 2000 + from_bcd(value);
636: break;
637: case MENELAUS_RTC_WKDAY:
638: s->rtc.tm.tm_mday = from_bcd(value);
639: break;
640: case MENELAUS_RTC_AL_SEC:
641: s->rtc.alm.tm_sec = from_bcd(value & 0x7f);
642: menelaus_alm_update(s);
643: break;
644: case MENELAUS_RTC_AL_MIN:
645: s->rtc.alm.tm_min = from_bcd(value & 0x7f);
646: menelaus_alm_update(s);
647: break;
648: case MENELAUS_RTC_AL_HR:
649: s->rtc.alm.tm_hour = (s->rtc.ctrl & (1 << 2)) ? /* MODE12_n24 */
650: MIN(from_bcd(value & 0x3f), 12) + ((value >> 7) ? 11 : -1) :
651: from_bcd(value & 0x3f);
652: menelaus_alm_update(s);
653: break;
654: case MENELAUS_RTC_AL_DAY:
655: s->rtc.alm.tm_mday = from_bcd(value);
656: menelaus_alm_update(s);
657: break;
658: case MENELAUS_RTC_AL_MON:
659: s->rtc.alm.tm_mon = MAX(1, from_bcd(value)) - 1;
660: menelaus_alm_update(s);
661: break;
662: case MENELAUS_RTC_AL_YR:
663: s->rtc.alm.tm_year = 2000 + from_bcd(value);
664: menelaus_alm_update(s);
665: break;
666: case MENELAUS_RTC_COMP_MSB:
667: s->rtc.comp &= 0xff;
668: s->rtc.comp |= value << 8;
669: break;
670: case MENELAUS_RTC_COMP_LSB:
671: s->rtc.comp &= 0xff << 8;
672: s->rtc.comp |= value;
673: break;
674:
675: case MENELAUS_S1_PULL_EN:
676: s->pull[0] = value;
677: break;
678: case MENELAUS_S1_PULL_DIR:
679: s->pull[1] = value & 0x1f;
680: break;
681: case MENELAUS_S2_PULL_EN:
682: s->pull[2] = value;
683: break;
684: case MENELAUS_S2_PULL_DIR:
685: s->pull[3] = value & 0x1f;
686: break;
687:
688: case MENELAUS_MCT_CTRL1:
689: s->mmc_ctrl[0] = value & 0x7f;
690: break;
691: case MENELAUS_MCT_CTRL2:
692: s->mmc_ctrl[1] = value;
693: /* TODO update Card Detect interrupts */
694: break;
695: case MENELAUS_MCT_CTRL3:
696: s->mmc_ctrl[2] = value & 0xf;
697: break;
698: case MENELAUS_DEBOUNCE1:
699: s->mmc_debounce = value & 0x3f;
700: break;
701:
702: default:
703: #ifdef VERBOSE
704: printf("%s: unknown register %02x\n", __FUNCTION__, addr);
705: #endif
706: }
707: }
708:
1.1.1.5 ! root 709: static void menelaus_event(I2CSlave *i2c, enum i2c_event event)
1.1 root 710: {
1.1.1.2 root 711: MenelausState *s = (MenelausState *) i2c;
1.1 root 712:
713: if (event == I2C_START_SEND)
714: s->firstbyte = 1;
715: }
716:
1.1.1.5 ! root 717: static int menelaus_tx(I2CSlave *i2c, uint8_t data)
1.1 root 718: {
1.1.1.2 root 719: MenelausState *s = (MenelausState *) i2c;
1.1 root 720: /* Interpret register address byte */
721: if (s->firstbyte) {
722: s->reg = data;
723: s->firstbyte = 0;
724: } else
725: menelaus_write(s, s->reg ++, data);
726:
727: return 0;
728: }
729:
1.1.1.5 ! root 730: static int menelaus_rx(I2CSlave *i2c)
1.1 root 731: {
1.1.1.2 root 732: MenelausState *s = (MenelausState *) i2c;
1.1 root 733:
734: return menelaus_read(s, s->reg ++);
735: }
736:
1.1.1.3 root 737: /* Save restore 32 bit int as uint16_t
738: This is a Big hack, but it is how the old state did it.
739: Or we broke compatibility in the state, or we can't use struct tm
740: */
741:
742: static int get_int32_as_uint16(QEMUFile *f, void *pv, size_t size)
743: {
744: int *v = pv;
745: *v = qemu_get_be16(f);
746: return 0;
1.1 root 747: }
748:
1.1.1.3 root 749: static void put_int32_as_uint16(QEMUFile *f, void *pv, size_t size)
1.1 root 750: {
1.1.1.3 root 751: int *v = pv;
752: qemu_put_be16(f, *v);
753: }
1.1 root 754:
1.1.1.3 root 755: static const VMStateInfo vmstate_hack_int32_as_uint16 = {
756: .name = "int32_as_uint16",
757: .get = get_int32_as_uint16,
758: .put = put_int32_as_uint16,
759: };
1.1 root 760:
1.1.1.3 root 761: #define VMSTATE_UINT16_HACK(_f, _s) \
762: VMSTATE_SINGLE(_f, _s, 0, vmstate_hack_int32_as_uint16, int32_t)
1.1 root 763:
764:
1.1.1.3 root 765: static const VMStateDescription vmstate_menelaus_tm = {
766: .name = "menelaus_tm",
767: .version_id = 0,
768: .minimum_version_id = 0,
769: .minimum_version_id_old = 0,
770: .fields = (VMStateField []) {
771: VMSTATE_UINT16_HACK(tm_sec, struct tm),
772: VMSTATE_UINT16_HACK(tm_min, struct tm),
773: VMSTATE_UINT16_HACK(tm_hour, struct tm),
774: VMSTATE_UINT16_HACK(tm_mday, struct tm),
775: VMSTATE_UINT16_HACK(tm_min, struct tm),
776: VMSTATE_UINT16_HACK(tm_year, struct tm),
777: VMSTATE_END_OF_LIST()
778: }
779: };
780:
781: static void menelaus_pre_save(void *opaque)
1.1 root 782: {
1.1.1.3 root 783: MenelausState *s = opaque;
784: /* Should be <= 1000 */
1.1.1.5 ! root 785: s->rtc_next_vmstate = s->rtc.next - qemu_get_clock_ms(rtc_clock);
1.1.1.3 root 786: }
1.1 root 787:
1.1.1.3 root 788: static int menelaus_post_load(void *opaque, int version_id)
789: {
790: MenelausState *s = opaque;
1.1 root 791:
792: if (s->rtc.ctrl & 1) /* RTC_EN */
793: menelaus_rtc_stop(s);
1.1.1.3 root 794:
795: s->rtc.next = s->rtc_next_vmstate;
796:
1.1 root 797: menelaus_alm_update(s);
798: menelaus_update(s);
799: if (s->rtc.ctrl & 1) /* RTC_EN */
800: menelaus_rtc_start(s);
801: return 0;
802: }
803:
1.1.1.3 root 804: static const VMStateDescription vmstate_menelaus = {
805: .name = "menelaus",
806: .version_id = 0,
807: .minimum_version_id = 0,
808: .minimum_version_id_old = 0,
809: .pre_save = menelaus_pre_save,
810: .post_load = menelaus_post_load,
811: .fields = (VMStateField []) {
812: VMSTATE_INT32(firstbyte, MenelausState),
813: VMSTATE_UINT8(reg, MenelausState),
814: VMSTATE_UINT8_ARRAY(vcore, MenelausState, 5),
815: VMSTATE_UINT8_ARRAY(dcdc, MenelausState, 3),
816: VMSTATE_UINT8_ARRAY(ldo, MenelausState, 8),
817: VMSTATE_UINT8_ARRAY(sleep, MenelausState, 2),
818: VMSTATE_UINT8(osc, MenelausState),
819: VMSTATE_UINT8(detect, MenelausState),
820: VMSTATE_UINT16(mask, MenelausState),
821: VMSTATE_UINT16(status, MenelausState),
822: VMSTATE_UINT8(dir, MenelausState),
823: VMSTATE_UINT8(inputs, MenelausState),
824: VMSTATE_UINT8(outputs, MenelausState),
825: VMSTATE_UINT8(bbsms, MenelausState),
826: VMSTATE_UINT8_ARRAY(pull, MenelausState, 4),
827: VMSTATE_UINT8_ARRAY(mmc_ctrl, MenelausState, 3),
828: VMSTATE_UINT8(mmc_debounce, MenelausState),
829: VMSTATE_UINT8(rtc.ctrl, MenelausState),
830: VMSTATE_UINT16(rtc.comp, MenelausState),
831: VMSTATE_UINT16(rtc_next_vmstate, MenelausState),
832: VMSTATE_STRUCT(rtc.new, MenelausState, 0, vmstate_menelaus_tm,
833: struct tm),
834: VMSTATE_STRUCT(rtc.alm, MenelausState, 0, vmstate_menelaus_tm,
835: struct tm),
836: VMSTATE_UINT8(pwrbtn_state, MenelausState),
837: VMSTATE_I2C_SLAVE(i2c, MenelausState),
838: VMSTATE_END_OF_LIST()
839: }
840: };
841:
1.1.1.5 ! root 842: static int twl92230_init(I2CSlave *i2c)
1.1 root 843: {
1.1.1.2 root 844: MenelausState *s = FROM_I2C_SLAVE(MenelausState, i2c);
1.1 root 845:
1.1.1.5 ! root 846: s->rtc.hz_tm = qemu_new_timer_ms(rtc_clock, menelaus_rtc_hz, s);
1.1.1.2 root 847: /* Three output pins plus one interrupt pin. */
848: qdev_init_gpio_out(&i2c->qdev, s->out, 4);
1.1.1.5 ! root 849:
! 850: /* Three input pins plus one power-button pin. */
! 851: qdev_init_gpio_in(&i2c->qdev, menelaus_gpio_set, 4);
1.1 root 852:
853: menelaus_reset(&s->i2c);
854:
1.1.1.3 root 855: return 0;
1.1 root 856: }
857:
1.1.1.5 ! root 858: static void twl92230_class_init(ObjectClass *klass, void *data)
! 859: {
! 860: DeviceClass *dc = DEVICE_CLASS(klass);
! 861: I2CSlaveClass *sc = I2C_SLAVE_CLASS(klass);
! 862:
! 863: sc->init = twl92230_init;
! 864: sc->event = menelaus_event;
! 865: sc->recv = menelaus_rx;
! 866: sc->send = menelaus_tx;
! 867: dc->vmsd = &vmstate_menelaus;
! 868: }
! 869:
! 870: static TypeInfo twl92230_info = {
! 871: .name = "twl92230",
! 872: .parent = TYPE_I2C_SLAVE,
! 873: .instance_size = sizeof(MenelausState),
! 874: .class_init = twl92230_class_init,
1.1.1.2 root 875: };
1.1 root 876:
1.1.1.5 ! root 877: static void twl92230_register_types(void)
1.1 root 878: {
1.1.1.5 ! root 879: type_register_static(&twl92230_info);
1.1 root 880: }
1.1.1.2 root 881:
1.1.1.5 ! root 882: type_init(twl92230_register_types)
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.