Diff for /qemu/hw/versatile_pci.c between versions 1.1.1.1 and 1.1.1.2

version 1.1.1.1, 2018/04/24 16:43:26 version 1.1.1.2, 2018/04/24 16:45:44
Line 11 Line 11
   
 static inline uint32_t vpb_pci_config_addr(target_phys_addr_t addr)  static inline uint32_t vpb_pci_config_addr(target_phys_addr_t addr)
 {  {
     return addr & 0xf8ff;      return addr & 0xffffff;
 }  }
   
 static void pci_vpb_config_writeb (void *opaque, target_phys_addr_t addr,  static void pci_vpb_config_writeb (void *opaque, target_phys_addr_t addr,
Line 77  static CPUReadMemoryFunc *pci_vpb_config Line 77  static CPUReadMemoryFunc *pci_vpb_config
     &pci_vpb_config_readl,      &pci_vpb_config_readl,
 };  };
   
 static void pci_vpb_set_irq(PCIDevice *d, void *pic, int irq_num, int level)  static int pci_vpb_irq;
   
   static int pci_vpb_map_irq(PCIDevice *d, int irq_num)
   {
       return irq_num;
   }
   
   static void pci_vpb_set_irq(void *pic, int irq_num, int level)
 {  {
     pic_set_irq_new(pic, 27 + irq_num, level);      pic_set_irq_new(pic, pci_vpb_irq + irq_num, level);
 }  }
   
 PCIBus *pci_vpb_init(void *pic)  PCIBus *pci_vpb_init(void *pic, int irq, int realview)
 {  {
     PCIBus *s;      PCIBus *s;
     PCIDevice *d;      PCIDevice *d;
     int mem_config;      int mem_config;
       uint32_t base;
       const char * name;
   
     s = pci_register_bus(pci_vpb_set_irq, pic, 11 << 3);      pci_vpb_irq = irq;
       if (realview) {
           base = 0x60000000;
           name = "RealView EB PCI Controller";
       } else {
           base = 0x40000000;
           name = "Versatile/PB PCI Controller";
       }
       s = pci_register_bus(pci_vpb_set_irq, pci_vpb_map_irq, pic, 11 << 3, 4);
     /* ??? Register memory space.  */      /* ??? Register memory space.  */
   
     mem_config = cpu_register_io_memory(0, pci_vpb_config_read,      mem_config = cpu_register_io_memory(0, pci_vpb_config_read,
                                         pci_vpb_config_write, s);                                          pci_vpb_config_write, s);
     /* Selfconfig area.  */      /* Selfconfig area.  */
     cpu_register_physical_memory(0x41000000, 0x10000, mem_config);      cpu_register_physical_memory(base + 0x01000000, 0x1000000, mem_config);
     /* Normal config area.  */      /* Normal config area.  */
     cpu_register_physical_memory(0x42000000, 0x10000, mem_config);      cpu_register_physical_memory(base + 0x02000000, 0x1000000, mem_config);
   
       d = pci_register_device(s, name, sizeof(PCIDevice), -1, NULL, NULL);
   
       if (realview) {
           /* IO memory area.  */
           isa_mmio_init(base + 0x03000000, 0x00100000);
       }
   
     d = pci_register_device(s, "Versatile/PB PCI Controller",  
                             sizeof(PCIDevice), -1, NULL, NULL);  
     d->config[0x00] = 0xee; // vendor_id      d->config[0x00] = 0xee; // vendor_id
     d->config[0x01] = 0x10;      d->config[0x01] = 0x10;
       /* Both boards have the same device ID.  Oh well.  */
     d->config[0x02] = 0x00; // device_id      d->config[0x02] = 0x00; // device_id
     d->config[0x03] = 0x03;      d->config[0x03] = 0x03;
     d->config[0x04] = 0x00;      d->config[0x04] = 0x00;

Removed from v.1.1.1.1  
changed lines
  Added in v.1.1.1.2


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