![[BACK]](/cvsweb/icons/back.gif){kind=icon}
Return to vga_int.h CVS log ![[TXT]](/cvsweb/icons/text.gif){kind=icon}
![[DIR]](/cvsweb/icons/dir.gif){kind=icon}
Up to [Qemu by Fabrice Bellard] / qemu / hw|
Return to vga_int.h CVS log | Up to [Qemu by Fabrice Bellard] / qemu / hw |
1.1 root 1: /*
2: * QEMU internal VGA defines.
1.1.1.4 root 3: *
1.1 root 4: * Copyright (c) 2003-2004 Fabrice Bellard
1.1.1.4 root 5: *
1.1 root 6: * Permission is hereby granted, free of charge, to any person obtaining a copy
7: * of this software and associated documentation files (the "Software"), to deal
8: * in the Software without restriction, including without limitation the rights
9: * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
10: * copies of the Software, and to permit persons to whom the Software is
11: * furnished to do so, subject to the following conditions:
12: *
13: * The above copyright notice and this permission notice shall be included in
14: * all copies or substantial portions of the Software.
15: *
16: * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
17: * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
18: * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
19: * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
20: * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
21: * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
22: * THE SOFTWARE.
23: */
24: #define MSR_COLOR_EMULATION 0x01
25: #define MSR_PAGE_SELECT 0x20
26:
27: #define ST01_V_RETRACE 0x08
28: #define ST01_DISP_ENABLE 0x01
29:
30: /* bochs VBE support */
31: #define CONFIG_BOCHS_VBE
32:
1.1.1.2 root 33: #define VBE_DISPI_MAX_XRES 1600
34: #define VBE_DISPI_MAX_YRES 1200
35: #define VBE_DISPI_MAX_BPP 32
1.1 root 36:
37: #define VBE_DISPI_INDEX_ID 0x0
38: #define VBE_DISPI_INDEX_XRES 0x1
39: #define VBE_DISPI_INDEX_YRES 0x2
40: #define VBE_DISPI_INDEX_BPP 0x3
41: #define VBE_DISPI_INDEX_ENABLE 0x4
42: #define VBE_DISPI_INDEX_BANK 0x5
43: #define VBE_DISPI_INDEX_VIRT_WIDTH 0x6
44: #define VBE_DISPI_INDEX_VIRT_HEIGHT 0x7
45: #define VBE_DISPI_INDEX_X_OFFSET 0x8
46: #define VBE_DISPI_INDEX_Y_OFFSET 0x9
47: #define VBE_DISPI_INDEX_NB 0xa
1.1.1.4 root 48:
1.1 root 49: #define VBE_DISPI_ID0 0xB0C0
50: #define VBE_DISPI_ID1 0xB0C1
51: #define VBE_DISPI_ID2 0xB0C2
1.1.1.3 root 52: #define VBE_DISPI_ID3 0xB0C3
53: #define VBE_DISPI_ID4 0xB0C4
1.1.1.4 root 54:
1.1 root 55: #define VBE_DISPI_DISABLED 0x00
56: #define VBE_DISPI_ENABLED 0x01
1.1.1.2 root 57: #define VBE_DISPI_GETCAPS 0x02
58: #define VBE_DISPI_8BIT_DAC 0x20
1.1 root 59: #define VBE_DISPI_LFB_ENABLED 0x40
60: #define VBE_DISPI_NOCLEARMEM 0x80
1.1.1.4 root 61:
1.1 root 62: #define VBE_DISPI_LFB_PHYSICAL_ADDRESS 0xE0000000
63:
64: #ifdef CONFIG_BOCHS_VBE
65:
66: #define VGA_STATE_COMMON_BOCHS_VBE \
67: uint16_t vbe_index; \
68: uint16_t vbe_regs[VBE_DISPI_INDEX_NB]; \
69: uint32_t vbe_start_addr; \
70: uint32_t vbe_line_offset; \
71: uint32_t vbe_bank_mask;
72:
73: #else
74:
75: #define VGA_STATE_COMMON_BOCHS_VBE
76:
77: #endif /* !CONFIG_BOCHS_VBE */
78:
79: #define CH_ATTR_SIZE (160 * 100)
1.1.1.2 root 80: #define VGA_MAX_HEIGHT 2048
1.1 root 81:
1.1.1.5 ! root 82: struct vga_precise_retrace {
! 83: int64_t ticks_per_char;
! 84: int64_t total_chars;
! 85: int htotal;
! 86: int hstart;
! 87: int hend;
! 88: int vstart;
! 89: int vend;
! 90: int freq;
! 91: };
! 92:
! 93: union vga_retrace {
! 94: struct vga_precise_retrace precise;
! 95: };
! 96:
! 97: struct VGAState;
! 98: typedef uint8_t (* vga_retrace_fn)(struct VGAState *s);
! 99: typedef void (* vga_update_retrace_info_fn)(struct VGAState *s);
! 100:
1.1 root 101: #define VGA_STATE_COMMON \
102: uint8_t *vram_ptr; \
1.1.1.5 ! root 103: ram_addr_t vram_offset; \
1.1 root 104: unsigned int vram_size; \
1.1.1.5 ! root 105: uint32_t lfb_addr; \
! 106: uint32_t lfb_end; \
! 107: uint32_t map_addr; \
! 108: uint32_t map_end; \
! 109: uint32_t lfb_vram_mapped; /* whether 0xa0000 is mapped as ram */ \
1.1 root 110: unsigned long bios_offset; \
111: unsigned int bios_size; \
1.1.1.4 root 112: int it_shift; \
1.1.1.3 root 113: PCIDevice *pci_dev; \
1.1 root 114: uint32_t latch; \
115: uint8_t sr_index; \
116: uint8_t sr[256]; \
117: uint8_t gr_index; \
118: uint8_t gr[256]; \
119: uint8_t ar_index; \
120: uint8_t ar[21]; \
121: int ar_flip_flop; \
122: uint8_t cr_index; \
123: uint8_t cr[256]; /* CRT registers */ \
124: uint8_t msr; /* Misc Output Register */ \
125: uint8_t fcr; /* Feature Control Register */ \
126: uint8_t st00; /* status 0 */ \
127: uint8_t st01; /* status 1 */ \
128: uint8_t dac_state; \
129: uint8_t dac_sub_index; \
130: uint8_t dac_read_index; \
131: uint8_t dac_write_index; \
132: uint8_t dac_cache[3]; /* used when writing */ \
1.1.1.3 root 133: int dac_8bit; \
1.1 root 134: uint8_t palette[768]; \
135: int32_t bank_offset; \
1.1.1.5 ! root 136: int vga_io_memory; \
1.1 root 137: int (*get_bpp)(struct VGAState *s); \
138: void (*get_offsets)(struct VGAState *s, \
139: uint32_t *pline_offset, \
1.1.1.3 root 140: uint32_t *pstart_addr, \
141: uint32_t *pline_compare); \
1.1 root 142: void (*get_resolution)(struct VGAState *s, \
143: int *pwidth, \
144: int *pheight); \
145: VGA_STATE_COMMON_BOCHS_VBE \
146: /* display refresh support */ \
147: DisplayState *ds; \
148: uint32_t font_offsets[2]; \
149: int graphic_mode; \
150: uint8_t shift_control; \
151: uint8_t double_scan; \
152: uint32_t line_offset; \
153: uint32_t line_compare; \
154: uint32_t start_addr; \
155: uint32_t plane_updated; \
1.1.1.5 ! root 156: uint32_t last_line_offset; \
1.1 root 157: uint8_t last_cw, last_ch; \
158: uint32_t last_width, last_height; /* in chars or pixels */ \
159: uint32_t last_scr_width, last_scr_height; /* in pixels */ \
1.1.1.5 ! root 160: uint32_t last_depth; /* in bits */ \
1.1 root 161: uint8_t cursor_start, cursor_end; \
162: uint32_t cursor_offset; \
163: unsigned int (*rgb_to_pixel)(unsigned int r, \
164: unsigned int g, unsigned b); \
1.1.1.4 root 165: vga_hw_update_ptr update; \
166: vga_hw_invalidate_ptr invalidate; \
167: vga_hw_screen_dump_ptr screen_dump; \
1.1.1.5 ! root 168: vga_hw_text_update_ptr text_update; \
1.1 root 169: /* hardware mouse cursor support */ \
170: uint32_t invalidated_y_table[VGA_MAX_HEIGHT / 32]; \
171: void (*cursor_invalidate)(struct VGAState *s); \
172: void (*cursor_draw_line)(struct VGAState *s, uint8_t *d, int y); \
173: /* tell for each page if it has been updated since the last time */ \
174: uint32_t last_palette[256]; \
1.1.1.5 ! root 175: uint32_t last_ch_attr[CH_ATTR_SIZE]; /* XXX: make it dynamic */ \
! 176: /* retrace */ \
! 177: vga_retrace_fn retrace; \
! 178: vga_update_retrace_info_fn update_retrace_info; \
! 179: union vga_retrace retrace_info;
1.1 root 180:
181:
182: typedef struct VGAState {
183: VGA_STATE_COMMON
184: } VGAState;
185:
186: static inline int c6_to_8(int v)
187: {
188: int b;
189: v &= 0x3f;
190: b = v & 1;
191: return (v << 2) | (b << 1) | b;
192: }
193:
1.1.1.5 ! root 194: void vga_common_init(VGAState *s, uint8_t *vga_ram_base,
! 195: ram_addr_t vga_ram_offset, int vga_ram_size);
1.1.1.4 root 196: void vga_init(VGAState *s);
1.1.1.5 ! root 197: void vga_reset(void *s);
! 198:
! 199: void vga_dirty_log_start(VGAState *s);
! 200: void vga_dirty_log_stop(VGAState *s);
! 201:
1.1 root 202: uint32_t vga_mem_readb(void *opaque, target_phys_addr_t addr);
203: void vga_mem_writeb(void *opaque, target_phys_addr_t addr, uint32_t val);
204: void vga_invalidate_scanlines(VGAState *s, int y1, int y2);
1.1.1.5 ! root 205: int ppm_save(const char *filename, struct DisplaySurface *ds);
1.1 root 206:
1.1.1.4 root 207: void vga_draw_cursor_line_8(uint8_t *d1, const uint8_t *src1,
208: int poffset, int w,
1.1 root 209: unsigned int color0, unsigned int color1,
210: unsigned int color_xor);
1.1.1.4 root 211: void vga_draw_cursor_line_16(uint8_t *d1, const uint8_t *src1,
212: int poffset, int w,
1.1 root 213: unsigned int color0, unsigned int color1,
214: unsigned int color_xor);
1.1.1.4 root 215: void vga_draw_cursor_line_32(uint8_t *d1, const uint8_t *src1,
216: int poffset, int w,
1.1 root 217: unsigned int color0, unsigned int color1,
218: unsigned int color_xor);
219:
220: extern const uint8_t sr_mask[8];
221: extern const uint8_t gr_mask[16];
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.