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Annotation of qemu/hw/xilinx.h, revision 1.1.1.3

1.1       root        1: 
                      2: /* OPB Interrupt Controller.  */
                      3: qemu_irq *microblaze_pic_init_cpu(CPUState *env);
                      4: 
                      5: static inline DeviceState *
                      6: xilinx_intc_create(target_phys_addr_t base, qemu_irq irq, int kind_of_intr)
                      7: {
                      8:     DeviceState *dev;
                      9: 
                     10:     dev = qdev_create(NULL, "xilinx,intc");
                     11:     qdev_prop_set_uint32(dev, "kind-of-intr", kind_of_intr);
1.1.1.2   root       12:     qdev_init_nofail(dev);
1.1       root       13:     sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
                     14:     sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
                     15:     return dev;
                     16: }
                     17: 
                     18: /* OPB Timer/Counter.  */
                     19: static inline DeviceState *
                     20: xilinx_timer_create(target_phys_addr_t base, qemu_irq irq, int nr, int freq)
                     21: {
                     22:     DeviceState *dev;
                     23: 
                     24:     dev = qdev_create(NULL, "xilinx,timer");
                     25:     qdev_prop_set_uint32(dev, "nr-timers", nr);
                     26:     qdev_prop_set_uint32(dev, "frequency", freq);
1.1.1.2   root       27:     qdev_init_nofail(dev);
1.1       root       28:     sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
                     29:     sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
                     30:     return dev;
                     31: }
                     32: 
                     33: /* XPS Ethernet Lite MAC.  */
                     34: static inline DeviceState *
                     35: xilinx_ethlite_create(NICInfo *nd, target_phys_addr_t base, qemu_irq irq,
                     36:                       int txpingpong, int rxpingpong)
                     37: {
                     38:     DeviceState *dev;
                     39: 
                     40:     qemu_check_nic_model(nd, "xilinx-ethlite");
                     41: 
                     42:     dev = qdev_create(NULL, "xilinx,ethlite");
1.1.1.2   root       43:     qdev_set_nic_properties(dev, nd);
1.1       root       44:     qdev_prop_set_uint32(dev, "txpingpong", txpingpong);
                     45:     qdev_prop_set_uint32(dev, "rxpingpong", rxpingpong);
1.1.1.2   root       46:     qdev_init_nofail(dev);
1.1       root       47:     sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
                     48:     sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
                     49:     return dev;
                     50: }
1.1.1.3 ! root       51: 
        !            52: static inline DeviceState *
        !            53: xilinx_axiethernet_create(void *dmach,
        !            54:                           NICInfo *nd, target_phys_addr_t base, qemu_irq irq,
        !            55:                           int txmem, int rxmem)
        !            56: {
        !            57:     DeviceState *dev;
        !            58:     qemu_check_nic_model(nd, "xilinx-axienet");
        !            59: 
        !            60:     dev = qdev_create(NULL, "xilinx,axienet");
        !            61:     qdev_set_nic_properties(dev, nd);
        !            62:     qdev_prop_set_uint32(dev, "c_rxmem", rxmem);
        !            63:     qdev_prop_set_uint32(dev, "c_txmem", txmem);
        !            64:     qdev_prop_set_ptr(dev, "dmach", dmach);
        !            65:     qdev_init_nofail(dev);
        !            66:     sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
        !            67:     sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq);
        !            68: 
        !            69:     return dev;
        !            70: }
        !            71: 
        !            72: static inline DeviceState *
        !            73: xilinx_axiethernetdma_create(void *dmach,
        !            74:                              target_phys_addr_t base, qemu_irq irq,
        !            75:                              qemu_irq irq2, int freqhz)
        !            76: {
        !            77:     DeviceState *dev = NULL;
        !            78: 
        !            79:     dev = qdev_create(NULL, "xilinx,axidma");
        !            80:     qdev_prop_set_uint32(dev, "freqhz", freqhz);
        !            81:     qdev_prop_set_ptr(dev, "dmach", dmach);
        !            82:     qdev_init_nofail(dev);
        !            83: 
        !            84:     sysbus_mmio_map(sysbus_from_qdev(dev), 0, base);
        !            85:     sysbus_connect_irq(sysbus_from_qdev(dev), 0, irq2);
        !            86:     sysbus_connect_irq(sysbus_from_qdev(dev), 1, irq);
        !            87: 
        !            88:     return dev;
        !            89: }

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