Diff for /qemu/mips-dis.c between versions 1.1.1.2 and 1.1.1.3

version 1.1.1.2, 2018/04/24 16:38:31 version 1.1.1.3, 2018/04/24 16:42:43
Line 528  struct mips_opcode Line 528  struct mips_opcode
    ISA/ASE bitmask to test against; and CPU is the CPU specific ISA to     ISA/ASE bitmask to test against; and CPU is the CPU specific ISA to
    test, or zero if no CPU specific ISA test is desired.  */     test, or zero if no CPU specific ISA test is desired.  */
   
   #if 0
 #define OPCODE_IS_MEMBER(insn, isa, cpu)                                \  #define OPCODE_IS_MEMBER(insn, isa, cpu)                                \
     (((insn)->membership & isa) != 0                                    \      (((insn)->membership & isa) != 0                                    \
      || (cpu == CPU_R4650 && ((insn)->membership & INSN_4650) != 0)     \       || (cpu == CPU_R4650 && ((insn)->membership & INSN_4650) != 0)     \
Line 543  struct mips_opcode Line 544  struct mips_opcode
      || (cpu == CPU_VR5400 && ((insn)->membership & INSN_5400) != 0)    \       || (cpu == CPU_VR5400 && ((insn)->membership & INSN_5400) != 0)    \
      || (cpu == CPU_VR5500 && ((insn)->membership & INSN_5500) != 0)    \       || (cpu == CPU_VR5500 && ((insn)->membership & INSN_5500) != 0)    \
      || 0)      /* Please keep this term for easier source merging.  */       || 0)      /* Please keep this term for easier source merging.  */
   #else
   #define OPCODE_IS_MEMBER(insn, isa, cpu)                               \
       (1 != 0)
   #endif
   
 /* This is a list of macro expanded instructions.  /* This is a list of macro expanded instructions.
   

Removed from v.1.1.1.2  
changed lines
  Added in v.1.1.1.3


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