version 1.1.1.16, 2018/04/24 19:17:26
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version 1.1.1.17, 2018/04/24 19:34:41
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Line 89
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Line 89
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* TODO lift the restriction |
* TODO lift the restriction |
* 'i' 32 bit integer |
* 'i' 32 bit integer |
* 'l' target long (32 or 64 bit) |
* 'l' target long (32 or 64 bit) |
* 'M' just like 'l', except in user mode the value is |
* 'M' Non-negative target long (32 or 64 bit), in user mode the |
* multiplied by 2^20 (think Mebibyte) |
* value is multiplied by 2^20 (think Mebibyte) |
* 'o' octets (aka bytes) |
* 'o' octets (aka bytes) |
* user mode accepts an optional T, t, G, g, M, m, K, k |
* user mode accepts an optional T, t, G, g, M, m, K, k |
* suffix, which multiplies the value by 2^40 for |
* suffix, which multiplies the value by 2^40 for |
Line 128 typedef struct mon_cmd_t {
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Line 128 typedef struct mon_cmd_t {
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int (*cmd_async)(Monitor *mon, const QDict *params, |
int (*cmd_async)(Monitor *mon, const QDict *params, |
MonitorCompletion *cb, void *opaque); |
MonitorCompletion *cb, void *opaque); |
} mhandler; |
} mhandler; |
bool qapi; |
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int flags; |
int flags; |
} mon_cmd_t; |
} mon_cmd_t; |
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Line 156 struct Monitor {
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Line 155 struct Monitor {
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int outbuf_index; |
int outbuf_index; |
ReadLineState *rs; |
ReadLineState *rs; |
MonitorControl *mc; |
MonitorControl *mc; |
CPUState *mon_cpu; |
CPUArchState *mon_cpu; |
BlockDriverCompletionFunc *password_completion_cb; |
BlockDriverCompletionFunc *password_completion_cb; |
void *password_opaque; |
void *password_opaque; |
#ifdef CONFIG_DEBUG_MONITOR |
#ifdef CONFIG_DEBUG_MONITOR |
Line 227 int monitor_cur_is_qmp(void)
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Line 226 int monitor_cur_is_qmp(void)
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return cur_mon && monitor_ctrl_mode(cur_mon); |
return cur_mon && monitor_ctrl_mode(cur_mon); |
} |
} |
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static void monitor_read_command(Monitor *mon, int show_prompt) |
void monitor_read_command(Monitor *mon, int show_prompt) |
{ |
{ |
if (!mon->rs) |
if (!mon->rs) |
return; |
return; |
Line 237 static void monitor_read_command(Monitor
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Line 236 static void monitor_read_command(Monitor
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readline_show_prompt(mon->rs); |
readline_show_prompt(mon->rs); |
} |
} |
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static int monitor_read_password(Monitor *mon, ReadLineFunc *readline_func, |
int monitor_read_password(Monitor *mon, ReadLineFunc *readline_func, |
void *opaque) |
void *opaque) |
{ |
{ |
if (monitor_ctrl_mode(mon)) { |
if (monitor_ctrl_mode(mon)) { |
qerror_report(QERR_MISSING_PARAMETER, "password"); |
qerror_report(QERR_MISSING_PARAMETER, "password"); |
Line 479 void monitor_protocol_event(MonitorEvent
|
Line 478 void monitor_protocol_event(MonitorEvent
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case QEVENT_SPICE_DISCONNECTED: |
case QEVENT_SPICE_DISCONNECTED: |
event_name = "SPICE_DISCONNECTED"; |
event_name = "SPICE_DISCONNECTED"; |
break; |
break; |
|
case QEVENT_BLOCK_JOB_COMPLETED: |
|
event_name = "BLOCK_JOB_COMPLETED"; |
|
break; |
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case QEVENT_BLOCK_JOB_CANCELLED: |
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event_name = "BLOCK_JOB_CANCELLED"; |
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break; |
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case QEVENT_DEVICE_TRAY_MOVED: |
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event_name = "DEVICE_TRAY_MOVED"; |
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break; |
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case QEVENT_SUSPEND: |
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event_name = "SUSPEND"; |
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break; |
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case QEVENT_WAKEUP: |
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event_name = "WAKEUP"; |
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break; |
default: |
default: |
abort(); |
abort(); |
break; |
break; |
Line 513 static int do_qmp_capabilities(Monitor *
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Line 527 static int do_qmp_capabilities(Monitor *
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static void handle_user_command(Monitor *mon, const char *cmdline); |
static void handle_user_command(Monitor *mon, const char *cmdline); |
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static int do_hmp_passthrough(Monitor *mon, const QDict *params, |
char *qmp_human_monitor_command(const char *command_line, bool has_cpu_index, |
QObject **ret_data) |
int64_t cpu_index, Error **errp) |
{ |
{ |
int ret = 0; |
char *output = NULL; |
Monitor *old_mon, hmp; |
Monitor *old_mon, hmp; |
CharDriverState mchar; |
CharDriverState mchar; |
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Line 527 static int do_hmp_passthrough(Monitor *m
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Line 541 static int do_hmp_passthrough(Monitor *m
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old_mon = cur_mon; |
old_mon = cur_mon; |
cur_mon = &hmp; |
cur_mon = &hmp; |
|
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if (qdict_haskey(params, "cpu-index")) { |
if (has_cpu_index) { |
ret = monitor_set_cpu(qdict_get_int(params, "cpu-index")); |
int ret = monitor_set_cpu(cpu_index); |
if (ret < 0) { |
if (ret < 0) { |
cur_mon = old_mon; |
cur_mon = old_mon; |
qerror_report(QERR_INVALID_PARAMETER_VALUE, "cpu-index", "a CPU number"); |
error_set(errp, QERR_INVALID_PARAMETER_VALUE, "cpu-index", |
|
"a CPU number"); |
goto out; |
goto out; |
} |
} |
} |
} |
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handle_user_command(&hmp, qdict_get_str(params, "command-line")); |
handle_user_command(&hmp, command_line); |
cur_mon = old_mon; |
cur_mon = old_mon; |
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if (qemu_chr_mem_osize(hmp.chr) > 0) { |
if (qemu_chr_mem_osize(hmp.chr) > 0) { |
*ret_data = QOBJECT(qemu_chr_mem_to_qs(hmp.chr)); |
QString *str = qemu_chr_mem_to_qs(hmp.chr); |
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output = g_strdup(qstring_get_str(str)); |
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QDECREF(str); |
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} else { |
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output = g_strdup(""); |
} |
} |
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out: |
out: |
qemu_chr_close_mem(hmp.chr); |
qemu_chr_close_mem(hmp.chr); |
return ret; |
return output; |
} |
} |
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static int compare_cmd(const char *name, const char *list) |
static int compare_cmd(const char *name, const char *list) |
Line 722 CommandInfoList *qmp_query_commands(Erro
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Line 741 CommandInfoList *qmp_query_commands(Erro
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/* set the current CPU defined by the user */ |
/* set the current CPU defined by the user */ |
int monitor_set_cpu(int cpu_index) |
int monitor_set_cpu(int cpu_index) |
{ |
{ |
CPUState *env; |
CPUArchState *env; |
|
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for(env = first_cpu; env != NULL; env = env->next_cpu) { |
for(env = first_cpu; env != NULL; env = env->next_cpu) { |
if (env->cpu_index == cpu_index) { |
if (env->cpu_index == cpu_index) { |
Line 733 int monitor_set_cpu(int cpu_index)
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Line 752 int monitor_set_cpu(int cpu_index)
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return -1; |
return -1; |
} |
} |
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static CPUState *mon_get_cpu(void) |
static CPUArchState *mon_get_cpu(void) |
{ |
{ |
if (!cur_mon->mon_cpu) { |
if (!cur_mon->mon_cpu) { |
monitor_set_cpu(0); |
monitor_set_cpu(0); |
Line 749 int monitor_get_cpu_index(void)
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Line 768 int monitor_get_cpu_index(void)
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static void do_info_registers(Monitor *mon) |
static void do_info_registers(Monitor *mon) |
{ |
{ |
CPUState *env; |
CPUArchState *env; |
env = mon_get_cpu(); |
env = mon_get_cpu(); |
#ifdef TARGET_I386 |
#ifdef TARGET_I386 |
cpu_dump_state(env, (FILE *)mon, monitor_fprintf, |
cpu_dump_state(env, (FILE *)mon, monitor_fprintf, |
Line 786 static void do_info_history(Monitor *mon
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Line 805 static void do_info_history(Monitor *mon
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/* XXX: not implemented in other targets */ |
/* XXX: not implemented in other targets */ |
static void do_info_cpu_stats(Monitor *mon) |
static void do_info_cpu_stats(Monitor *mon) |
{ |
{ |
CPUState *env; |
CPUArchState *env; |
|
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env = mon_get_cpu(); |
env = mon_get_cpu(); |
cpu_dump_statistics(env, (FILE *)mon, &monitor_fprintf, 0); |
cpu_dump_statistics(env, (FILE *)mon, &monitor_fprintf, 0); |
Line 805 static void do_trace_print_events(Monito
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Line 824 static void do_trace_print_events(Monito
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trace_print_events((FILE *)mon, &monitor_fprintf); |
trace_print_events((FILE *)mon, &monitor_fprintf); |
} |
} |
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#ifdef CONFIG_VNC |
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static int change_vnc_password(const char *password) |
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{ |
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if (!password || !password[0]) { |
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if (vnc_display_disable_login(NULL)) { |
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qerror_report(QERR_SET_PASSWD_FAILED); |
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return -1; |
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} |
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return 0; |
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} |
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|
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if (vnc_display_password(NULL, password) < 0) { |
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qerror_report(QERR_SET_PASSWD_FAILED); |
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return -1; |
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} |
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return 0; |
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} |
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static void change_vnc_password_cb(Monitor *mon, const char *password, |
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void *opaque) |
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{ |
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change_vnc_password(password); |
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monitor_read_command(mon, 1); |
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} |
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static int do_change_vnc(Monitor *mon, const char *target, const char *arg) |
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{ |
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if (strcmp(target, "passwd") == 0 || |
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strcmp(target, "password") == 0) { |
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if (arg) { |
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char password[9]; |
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strncpy(password, arg, sizeof(password)); |
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password[sizeof(password) - 1] = '\0'; |
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return change_vnc_password(password); |
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} else { |
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return monitor_read_password(mon, change_vnc_password_cb, NULL); |
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} |
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} else { |
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if (vnc_display_open(NULL, target) < 0) { |
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qerror_report(QERR_VNC_SERVER_FAILED, target); |
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return -1; |
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} |
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} |
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|
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return 0; |
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} |
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#else |
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static int do_change_vnc(Monitor *mon, const char *target, const char *arg) |
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{ |
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qerror_report(QERR_FEATURE_DISABLED, "vnc"); |
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return -ENODEV; |
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} |
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#endif |
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/** |
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* do_change(): Change a removable medium, or VNC configuration |
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*/ |
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static int do_change(Monitor *mon, const QDict *qdict, QObject **ret_data) |
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{ |
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const char *device = qdict_get_str(qdict, "device"); |
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const char *target = qdict_get_str(qdict, "target"); |
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const char *arg = qdict_get_try_str(qdict, "arg"); |
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int ret; |
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if (strcmp(device, "vnc") == 0) { |
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ret = do_change_vnc(mon, target, arg); |
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} else { |
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ret = do_change_block(mon, device, target, arg); |
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} |
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return ret; |
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} |
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static int set_password(Monitor *mon, const QDict *qdict, QObject **ret_data) |
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{ |
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const char *protocol = qdict_get_str(qdict, "protocol"); |
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const char *password = qdict_get_str(qdict, "password"); |
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const char *connected = qdict_get_try_str(qdict, "connected"); |
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int disconnect_if_connected = 0; |
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int fail_if_connected = 0; |
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int rc; |
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|
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if (connected) { |
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if (strcmp(connected, "fail") == 0) { |
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fail_if_connected = 1; |
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} else if (strcmp(connected, "disconnect") == 0) { |
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disconnect_if_connected = 1; |
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} else if (strcmp(connected, "keep") == 0) { |
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/* nothing */ |
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} else { |
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qerror_report(QERR_INVALID_PARAMETER, "connected"); |
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return -1; |
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} |
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} |
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if (strcmp(protocol, "spice") == 0) { |
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if (!using_spice) { |
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/* correct one? spice isn't a device ,,, */ |
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qerror_report(QERR_DEVICE_NOT_ACTIVE, "spice"); |
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return -1; |
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} |
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rc = qemu_spice_set_passwd(password, fail_if_connected, |
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disconnect_if_connected); |
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if (rc != 0) { |
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qerror_report(QERR_SET_PASSWD_FAILED); |
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return -1; |
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} |
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return 0; |
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} |
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|
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if (strcmp(protocol, "vnc") == 0) { |
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if (fail_if_connected || disconnect_if_connected) { |
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/* vnc supports "connected=keep" only */ |
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qerror_report(QERR_INVALID_PARAMETER, "connected"); |
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return -1; |
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} |
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/* Note that setting an empty password will not disable login through |
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* this interface. */ |
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return vnc_display_password(NULL, password); |
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} |
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|
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qerror_report(QERR_INVALID_PARAMETER, "protocol"); |
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return -1; |
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} |
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|
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static int expire_password(Monitor *mon, const QDict *qdict, QObject **ret_data) |
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{ |
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const char *protocol = qdict_get_str(qdict, "protocol"); |
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const char *whenstr = qdict_get_str(qdict, "time"); |
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time_t when; |
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int rc; |
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|
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if (strcmp(whenstr, "now") == 0) { |
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when = 0; |
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} else if (strcmp(whenstr, "never") == 0) { |
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when = TIME_MAX; |
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} else if (whenstr[0] == '+') { |
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when = time(NULL) + strtoull(whenstr+1, NULL, 10); |
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} else { |
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when = strtoull(whenstr, NULL, 10); |
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} |
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|
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if (strcmp(protocol, "spice") == 0) { |
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if (!using_spice) { |
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/* correct one? spice isn't a device ,,, */ |
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qerror_report(QERR_DEVICE_NOT_ACTIVE, "spice"); |
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return -1; |
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} |
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rc = qemu_spice_set_pw_expire(when); |
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if (rc != 0) { |
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qerror_report(QERR_SET_PASSWD_FAILED); |
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return -1; |
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} |
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return 0; |
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} |
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|
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if (strcmp(protocol, "vnc") == 0) { |
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return vnc_display_pw_expire(NULL, when); |
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} |
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|
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qerror_report(QERR_INVALID_PARAMETER, "protocol"); |
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return -1; |
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} |
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|
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static int add_graphics_client(Monitor *mon, const QDict *qdict, QObject **ret_data) |
static int add_graphics_client(Monitor *mon, const QDict *qdict, QObject **ret_data) |
{ |
{ |
const char *protocol = qdict_get_str(qdict, "protocol"); |
const char *protocol = qdict_get_str(qdict, "protocol"); |
Line 977 static int add_graphics_client(Monitor *
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Line 831 static int add_graphics_client(Monitor *
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CharDriverState *s; |
CharDriverState *s; |
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if (strcmp(protocol, "spice") == 0) { |
if (strcmp(protocol, "spice") == 0) { |
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int fd = monitor_get_fd(mon, fdname); |
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int skipauth = qdict_get_try_bool(qdict, "skipauth", 0); |
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int tls = qdict_get_try_bool(qdict, "tls", 0); |
if (!using_spice) { |
if (!using_spice) { |
/* correct one? spice isn't a device ,,, */ |
/* correct one? spice isn't a device ,,, */ |
qerror_report(QERR_DEVICE_NOT_ACTIVE, "spice"); |
qerror_report(QERR_DEVICE_NOT_ACTIVE, "spice"); |
return -1; |
return -1; |
} |
} |
qerror_report(QERR_ADD_CLIENT_FAILED); |
if (qemu_spice_display_add_client(fd, skipauth, tls) < 0) { |
return -1; |
close(fd); |
|
} |
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return 0; |
#ifdef CONFIG_VNC |
#ifdef CONFIG_VNC |
} else if (strcmp(protocol, "vnc") == 0) { |
} else if (strcmp(protocol, "vnc") == 0) { |
int fd = monitor_get_fd(mon, fdname); |
int fd = monitor_get_fd(mon, fdname); |
Line 1020 static int client_migrate_info(Monitor *
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Line 879 static int client_migrate_info(Monitor *
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return -1; |
return -1; |
} |
} |
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|
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if (port == -1 && tls_port == -1) { |
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qerror_report(QERR_MISSING_PARAMETER, "port/tls-port"); |
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return -1; |
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} |
|
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ret = qemu_spice_migrate_info(hostname, port, tls_port, subject, |
ret = qemu_spice_migrate_info(hostname, port, tls_port, subject, |
cb, opaque); |
cb, opaque); |
if (ret != 0) { |
if (ret != 0) { |
Line 1073 static void do_singlestep(Monitor *mon,
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Line 937 static void do_singlestep(Monitor *mon,
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} |
} |
} |
} |
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static void encrypted_bdrv_it(void *opaque, BlockDriverState *bs); |
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|
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struct bdrv_iterate_context { |
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Monitor *mon; |
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int err; |
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}; |
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|
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static void iostatus_bdrv_it(void *opaque, BlockDriverState *bs) |
|
{ |
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bdrv_iostatus_reset(bs); |
|
} |
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|
|
/** |
|
* do_cont(): Resume emulation. |
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*/ |
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static int do_cont(Monitor *mon, const QDict *qdict, QObject **ret_data) |
|
{ |
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struct bdrv_iterate_context context = { mon, 0 }; |
|
|
|
if (runstate_check(RUN_STATE_INMIGRATE)) { |
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qerror_report(QERR_MIGRATION_EXPECTED); |
|
return -1; |
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} else if (runstate_check(RUN_STATE_INTERNAL_ERROR) || |
|
runstate_check(RUN_STATE_SHUTDOWN)) { |
|
qerror_report(QERR_RESET_REQUIRED); |
|
return -1; |
|
} |
|
|
|
bdrv_iterate(iostatus_bdrv_it, NULL); |
|
bdrv_iterate(encrypted_bdrv_it, &context); |
|
/* only resume the vm if all keys are set and valid */ |
|
if (!context.err) { |
|
vm_start(); |
|
return 0; |
|
} else { |
|
return -1; |
|
} |
|
} |
|
|
|
static void bdrv_key_cb(void *opaque, int err) |
|
{ |
|
Monitor *mon = opaque; |
|
|
|
/* another key was set successfully, retry to continue */ |
|
if (!err) |
|
do_cont(mon, NULL, NULL); |
|
} |
|
|
|
static void encrypted_bdrv_it(void *opaque, BlockDriverState *bs) |
|
{ |
|
struct bdrv_iterate_context *context = opaque; |
|
|
|
if (!context->err && bdrv_key_required(bs)) { |
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context->err = -EBUSY; |
|
monitor_read_bdrv_key_start(context->mon, bs, bdrv_key_cb, |
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context->mon); |
|
} |
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} |
|
|
|
static void do_gdbserver(Monitor *mon, const QDict *qdict) |
static void do_gdbserver(Monitor *mon, const QDict *qdict) |
{ |
{ |
const char *device = qdict_get_try_str(qdict, "device"); |
const char *device = qdict_get_try_str(qdict, "device"); |
Line 1186 static void monitor_printc(Monitor *mon,
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Line 991 static void monitor_printc(Monitor *mon,
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static void memory_dump(Monitor *mon, int count, int format, int wsize, |
static void memory_dump(Monitor *mon, int count, int format, int wsize, |
target_phys_addr_t addr, int is_physical) |
target_phys_addr_t addr, int is_physical) |
{ |
{ |
CPUState *env; |
CPUArchState *env; |
int l, line_size, i, max_digits, len; |
int l, line_size, i, max_digits, len; |
uint8_t buf[16]; |
uint8_t buf[16]; |
uint64_t v; |
uint64_t v; |
Line 1370 static void do_print(Monitor *mon, const
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Line 1175 static void do_print(Monitor *mon, const
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monitor_printf(mon, "\n"); |
monitor_printf(mon, "\n"); |
} |
} |
|
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static int do_memory_save(Monitor *mon, const QDict *qdict, QObject **ret_data) |
|
{ |
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FILE *f; |
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uint32_t size = qdict_get_int(qdict, "size"); |
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const char *filename = qdict_get_str(qdict, "filename"); |
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target_long addr = qdict_get_int(qdict, "val"); |
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uint32_t l; |
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CPUState *env; |
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uint8_t buf[1024]; |
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int ret = -1; |
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|
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env = mon_get_cpu(); |
|
|
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f = fopen(filename, "wb"); |
|
if (!f) { |
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qerror_report(QERR_OPEN_FILE_FAILED, filename); |
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return -1; |
|
} |
|
while (size != 0) { |
|
l = sizeof(buf); |
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if (l > size) |
|
l = size; |
|
cpu_memory_rw_debug(env, addr, buf, l, 0); |
|
if (fwrite(buf, 1, l, f) != l) { |
|
monitor_printf(mon, "fwrite() error in do_memory_save\n"); |
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goto exit; |
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} |
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addr += l; |
|
size -= l; |
|
} |
|
|
|
ret = 0; |
|
|
|
exit: |
|
fclose(f); |
|
return ret; |
|
} |
|
|
|
static int do_physical_memory_save(Monitor *mon, const QDict *qdict, |
|
QObject **ret_data) |
|
{ |
|
FILE *f; |
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uint32_t l; |
|
uint8_t buf[1024]; |
|
uint32_t size = qdict_get_int(qdict, "size"); |
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const char *filename = qdict_get_str(qdict, "filename"); |
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target_phys_addr_t addr = qdict_get_int(qdict, "val"); |
|
int ret = -1; |
|
|
|
f = fopen(filename, "wb"); |
|
if (!f) { |
|
qerror_report(QERR_OPEN_FILE_FAILED, filename); |
|
return -1; |
|
} |
|
while (size != 0) { |
|
l = sizeof(buf); |
|
if (l > size) |
|
l = size; |
|
cpu_physical_memory_read(addr, buf, l); |
|
if (fwrite(buf, 1, l, f) != l) { |
|
monitor_printf(mon, "fwrite() error in do_physical_memory_save\n"); |
|
goto exit; |
|
} |
|
fflush(f); |
|
addr += l; |
|
size -= l; |
|
} |
|
|
|
ret = 0; |
|
|
|
exit: |
|
fclose(f); |
|
return ret; |
|
} |
|
|
|
static void do_sum(Monitor *mon, const QDict *qdict) |
static void do_sum(Monitor *mon, const QDict *qdict) |
{ |
{ |
uint32_t addr; |
uint32_t addr; |
Line 1796 static void do_boot_set(Monitor *mon, co
|
Line 1526 static void do_boot_set(Monitor *mon, co
|
} |
} |
} |
} |
|
|
/** |
|
* do_system_powerdown(): Issue a machine powerdown |
|
*/ |
|
static int do_system_powerdown(Monitor *mon, const QDict *qdict, |
|
QObject **ret_data) |
|
{ |
|
qemu_system_powerdown_request(); |
|
return 0; |
|
} |
|
|
|
#if defined(TARGET_I386) |
#if defined(TARGET_I386) |
static void print_pte(Monitor *mon, target_phys_addr_t addr, |
static void print_pte(Monitor *mon, target_phys_addr_t addr, |
target_phys_addr_t pte, |
target_phys_addr_t pte, |
Line 1831 static void print_pte(Monitor *mon, targ
|
Line 1551 static void print_pte(Monitor *mon, targ
|
pte & PG_RW_MASK ? 'W' : '-'); |
pte & PG_RW_MASK ? 'W' : '-'); |
} |
} |
|
|
static void tlb_info_32(Monitor *mon, CPUState *env) |
static void tlb_info_32(Monitor *mon, CPUArchState *env) |
{ |
{ |
unsigned int l1, l2; |
unsigned int l1, l2; |
uint32_t pgd, pde, pte; |
uint32_t pgd, pde, pte; |
Line 1859 static void tlb_info_32(Monitor *mon, CP
|
Line 1579 static void tlb_info_32(Monitor *mon, CP
|
} |
} |
} |
} |
|
|
static void tlb_info_pae32(Monitor *mon, CPUState *env) |
static void tlb_info_pae32(Monitor *mon, CPUArchState *env) |
{ |
{ |
unsigned int l1, l2, l3; |
unsigned int l1, l2, l3; |
uint64_t pdpe, pde, pte; |
uint64_t pdpe, pde, pte; |
Line 1899 static void tlb_info_pae32(Monitor *mon,
|
Line 1619 static void tlb_info_pae32(Monitor *mon,
|
} |
} |
|
|
#ifdef TARGET_X86_64 |
#ifdef TARGET_X86_64 |
static void tlb_info_64(Monitor *mon, CPUState *env) |
static void tlb_info_64(Monitor *mon, CPUArchState *env) |
{ |
{ |
uint64_t l1, l2, l3, l4; |
uint64_t l1, l2, l3, l4; |
uint64_t pml4e, pdpe, pde, pte; |
uint64_t pml4e, pdpe, pde, pte; |
Line 1958 static void tlb_info_64(Monitor *mon, CP
|
Line 1678 static void tlb_info_64(Monitor *mon, CP
|
|
|
static void tlb_info(Monitor *mon) |
static void tlb_info(Monitor *mon) |
{ |
{ |
CPUState *env; |
CPUArchState *env; |
|
|
env = mon_get_cpu(); |
env = mon_get_cpu(); |
|
|
Line 2003 static void mem_print(Monitor *mon, targ
|
Line 1723 static void mem_print(Monitor *mon, targ
|
} |
} |
} |
} |
|
|
static void mem_info_32(Monitor *mon, CPUState *env) |
static void mem_info_32(Monitor *mon, CPUArchState *env) |
{ |
{ |
unsigned int l1, l2; |
unsigned int l1, l2; |
int prot, last_prot; |
int prot, last_prot; |
Line 2044 static void mem_info_32(Monitor *mon, CP
|
Line 1764 static void mem_info_32(Monitor *mon, CP
|
mem_print(mon, &start, &last_prot, (target_phys_addr_t)1 << 32, 0); |
mem_print(mon, &start, &last_prot, (target_phys_addr_t)1 << 32, 0); |
} |
} |
|
|
static void mem_info_pae32(Monitor *mon, CPUState *env) |
static void mem_info_pae32(Monitor *mon, CPUArchState *env) |
{ |
{ |
unsigned int l1, l2, l3; |
unsigned int l1, l2, l3; |
int prot, last_prot; |
int prot, last_prot; |
Line 2101 static void mem_info_pae32(Monitor *mon,
|
Line 1821 static void mem_info_pae32(Monitor *mon,
|
|
|
|
|
#ifdef TARGET_X86_64 |
#ifdef TARGET_X86_64 |
static void mem_info_64(Monitor *mon, CPUState *env) |
static void mem_info_64(Monitor *mon, CPUArchState *env) |
{ |
{ |
int prot, last_prot; |
int prot, last_prot; |
uint64_t l1, l2, l3, l4; |
uint64_t l1, l2, l3, l4; |
Line 2181 static void mem_info_64(Monitor *mon, CP
|
Line 1901 static void mem_info_64(Monitor *mon, CP
|
|
|
static void mem_info(Monitor *mon) |
static void mem_info(Monitor *mon) |
{ |
{ |
CPUState *env; |
CPUArchState *env; |
|
|
env = mon_get_cpu(); |
env = mon_get_cpu(); |
|
|
Line 2220 static void print_tlb(Monitor *mon, int
|
Line 1940 static void print_tlb(Monitor *mon, int
|
|
|
static void tlb_info(Monitor *mon) |
static void tlb_info(Monitor *mon) |
{ |
{ |
CPUState *env = mon_get_cpu(); |
CPUArchState *env = mon_get_cpu(); |
int i; |
int i; |
|
|
monitor_printf (mon, "ITLB:\n"); |
monitor_printf (mon, "ITLB:\n"); |
Line 2233 static void tlb_info(Monitor *mon)
|
Line 1953 static void tlb_info(Monitor *mon)
|
|
|
#endif |
#endif |
|
|
#if defined(TARGET_SPARC) || defined(TARGET_PPC) |
#if defined(TARGET_SPARC) || defined(TARGET_PPC) || defined(TARGET_XTENSA) |
static void tlb_info(Monitor *mon) |
static void tlb_info(Monitor *mon) |
{ |
{ |
CPUState *env1 = mon_get_cpu(); |
CPUArchState *env1 = mon_get_cpu(); |
|
|
dump_mmu((FILE*)mon, (fprintf_function)monitor_printf, env1); |
dump_mmu((FILE*)mon, (fprintf_function)monitor_printf, env1); |
} |
} |
Line 2250 static void do_info_mtree(Monitor *mon)
|
Line 1970 static void do_info_mtree(Monitor *mon)
|
static void do_info_numa(Monitor *mon) |
static void do_info_numa(Monitor *mon) |
{ |
{ |
int i; |
int i; |
CPUState *env; |
CPUArchState *env; |
|
|
monitor_printf(mon, "%d nodes\n", nb_numa_nodes); |
monitor_printf(mon, "%d nodes\n", nb_numa_nodes); |
for (i = 0; i < nb_numa_nodes; i++) { |
for (i = 0; i < nb_numa_nodes; i++) { |
Line 2348 static void do_wav_capture(Monitor *mon,
|
Line 2068 static void do_wav_capture(Monitor *mon,
|
} |
} |
#endif |
#endif |
|
|
#if defined(TARGET_I386) |
|
static int do_inject_nmi(Monitor *mon, const QDict *qdict, QObject **ret_data) |
|
{ |
|
CPUState *env; |
|
|
|
for (env = first_cpu; env != NULL; env = env->next_cpu) { |
|
cpu_interrupt(env, CPU_INTERRUPT_NMI); |
|
} |
|
|
|
return 0; |
|
} |
|
#else |
|
static int do_inject_nmi(Monitor *mon, const QDict *qdict, QObject **ret_data) |
|
{ |
|
qerror_report(QERR_UNSUPPORTED); |
|
return -1; |
|
} |
|
#endif |
|
|
|
static qemu_acl *find_acl(Monitor *mon, const char *name) |
static qemu_acl *find_acl(Monitor *mon, const char *name) |
{ |
{ |
qemu_acl *acl = qemu_acl_find(name); |
qemu_acl *acl = qemu_acl_find(name); |
Line 2476 static void do_acl_remove(Monitor *mon,
|
Line 2177 static void do_acl_remove(Monitor *mon,
|
#if defined(TARGET_I386) |
#if defined(TARGET_I386) |
static void do_inject_mce(Monitor *mon, const QDict *qdict) |
static void do_inject_mce(Monitor *mon, const QDict *qdict) |
{ |
{ |
CPUState *cenv; |
CPUArchState *cenv; |
int cpu_index = qdict_get_int(qdict, "cpu_index"); |
int cpu_index = qdict_get_int(qdict, "cpu_index"); |
int bank = qdict_get_int(qdict, "bank"); |
int bank = qdict_get_int(qdict, "bank"); |
uint64_t status = qdict_get_int(qdict, "status"); |
uint64_t status = qdict_get_int(qdict, "status"); |
Line 2635 static mon_cmd_t info_cmds[] = {
|
Line 2336 static mon_cmd_t info_cmds[] = {
|
.mhandler.info = hmp_info_blockstats, |
.mhandler.info = hmp_info_blockstats, |
}, |
}, |
{ |
{ |
|
.name = "block-jobs", |
|
.args_type = "", |
|
.params = "", |
|
.help = "show progress of ongoing block device operations", |
|
.mhandler.info = hmp_info_block_jobs, |
|
}, |
|
{ |
.name = "registers", |
.name = "registers", |
.args_type = "", |
.args_type = "", |
.params = "", |
.params = "", |
Line 2692 static mon_cmd_t info_cmds[] = {
|
Line 2400 static mon_cmd_t info_cmds[] = {
|
.mhandler.info = hmp_info_pci, |
.mhandler.info = hmp_info_pci, |
}, |
}, |
#if defined(TARGET_I386) || defined(TARGET_SH4) || defined(TARGET_SPARC) || \ |
#if defined(TARGET_I386) || defined(TARGET_SH4) || defined(TARGET_SPARC) || \ |
defined(TARGET_PPC) |
defined(TARGET_PPC) || defined(TARGET_XTENSA) |
{ |
{ |
.name = "tlb", |
.name = "tlb", |
.args_type = "", |
.args_type = "", |
Line 2921 typedef struct MonitorDef {
|
Line 2629 typedef struct MonitorDef {
|
#if defined(TARGET_I386) |
#if defined(TARGET_I386) |
static target_long monitor_get_pc (const struct MonitorDef *md, int val) |
static target_long monitor_get_pc (const struct MonitorDef *md, int val) |
{ |
{ |
CPUState *env = mon_get_cpu(); |
CPUArchState *env = mon_get_cpu(); |
return env->eip + env->segs[R_CS].base; |
return env->eip + env->segs[R_CS].base; |
} |
} |
#endif |
#endif |
Line 2929 static target_long monitor_get_pc (const
|
Line 2637 static target_long monitor_get_pc (const
|
#if defined(TARGET_PPC) |
#if defined(TARGET_PPC) |
static target_long monitor_get_ccr (const struct MonitorDef *md, int val) |
static target_long monitor_get_ccr (const struct MonitorDef *md, int val) |
{ |
{ |
CPUState *env = mon_get_cpu(); |
CPUArchState *env = mon_get_cpu(); |
unsigned int u; |
unsigned int u; |
int i; |
int i; |
|
|
Line 2942 static target_long monitor_get_ccr (cons
|
Line 2650 static target_long monitor_get_ccr (cons
|
|
|
static target_long monitor_get_msr (const struct MonitorDef *md, int val) |
static target_long monitor_get_msr (const struct MonitorDef *md, int val) |
{ |
{ |
CPUState *env = mon_get_cpu(); |
CPUArchState *env = mon_get_cpu(); |
return env->msr; |
return env->msr; |
} |
} |
|
|
static target_long monitor_get_xer (const struct MonitorDef *md, int val) |
static target_long monitor_get_xer (const struct MonitorDef *md, int val) |
{ |
{ |
CPUState *env = mon_get_cpu(); |
CPUArchState *env = mon_get_cpu(); |
return env->xer; |
return env->xer; |
} |
} |
|
|
static target_long monitor_get_decr (const struct MonitorDef *md, int val) |
static target_long monitor_get_decr (const struct MonitorDef *md, int val) |
{ |
{ |
CPUState *env = mon_get_cpu(); |
CPUArchState *env = mon_get_cpu(); |
return cpu_ppc_load_decr(env); |
return cpu_ppc_load_decr(env); |
} |
} |
|
|
static target_long monitor_get_tbu (const struct MonitorDef *md, int val) |
static target_long monitor_get_tbu (const struct MonitorDef *md, int val) |
{ |
{ |
CPUState *env = mon_get_cpu(); |
CPUArchState *env = mon_get_cpu(); |
return cpu_ppc_load_tbu(env); |
return cpu_ppc_load_tbu(env); |
} |
} |
|
|
static target_long monitor_get_tbl (const struct MonitorDef *md, int val) |
static target_long monitor_get_tbl (const struct MonitorDef *md, int val) |
{ |
{ |
CPUState *env = mon_get_cpu(); |
CPUArchState *env = mon_get_cpu(); |
return cpu_ppc_load_tbl(env); |
return cpu_ppc_load_tbl(env); |
} |
} |
#endif |
#endif |
Line 2975 static target_long monitor_get_tbl (cons
|
Line 2683 static target_long monitor_get_tbl (cons
|
#ifndef TARGET_SPARC64 |
#ifndef TARGET_SPARC64 |
static target_long monitor_get_psr (const struct MonitorDef *md, int val) |
static target_long monitor_get_psr (const struct MonitorDef *md, int val) |
{ |
{ |
CPUState *env = mon_get_cpu(); |
CPUArchState *env = mon_get_cpu(); |
|
|
return cpu_get_psr(env); |
return cpu_get_psr(env); |
} |
} |
Line 2983 static target_long monitor_get_psr (cons
|
Line 2691 static target_long monitor_get_psr (cons
|
|
|
static target_long monitor_get_reg(const struct MonitorDef *md, int val) |
static target_long monitor_get_reg(const struct MonitorDef *md, int val) |
{ |
{ |
CPUState *env = mon_get_cpu(); |
CPUArchState *env = mon_get_cpu(); |
return env->regwptr[val]; |
return env->regwptr[val]; |
} |
} |
#endif |
#endif |
Line 2992 static const MonitorDef monitor_defs[] =
|
Line 2700 static const MonitorDef monitor_defs[] =
|
#ifdef TARGET_I386 |
#ifdef TARGET_I386 |
|
|
#define SEG(name, seg) \ |
#define SEG(name, seg) \ |
{ name, offsetof(CPUState, segs[seg].selector), NULL, MD_I32 },\ |
{ name, offsetof(CPUX86State, segs[seg].selector), NULL, MD_I32 },\ |
{ name ".base", offsetof(CPUState, segs[seg].base) },\ |
{ name ".base", offsetof(CPUX86State, segs[seg].base) },\ |
{ name ".limit", offsetof(CPUState, segs[seg].limit), NULL, MD_I32 }, |
{ name ".limit", offsetof(CPUX86State, segs[seg].limit), NULL, MD_I32 }, |
|
|
{ "eax", offsetof(CPUState, regs[0]) }, |
{ "eax", offsetof(CPUX86State, regs[0]) }, |
{ "ecx", offsetof(CPUState, regs[1]) }, |
{ "ecx", offsetof(CPUX86State, regs[1]) }, |
{ "edx", offsetof(CPUState, regs[2]) }, |
{ "edx", offsetof(CPUX86State, regs[2]) }, |
{ "ebx", offsetof(CPUState, regs[3]) }, |
{ "ebx", offsetof(CPUX86State, regs[3]) }, |
{ "esp|sp", offsetof(CPUState, regs[4]) }, |
{ "esp|sp", offsetof(CPUX86State, regs[4]) }, |
{ "ebp|fp", offsetof(CPUState, regs[5]) }, |
{ "ebp|fp", offsetof(CPUX86State, regs[5]) }, |
{ "esi", offsetof(CPUState, regs[6]) }, |
{ "esi", offsetof(CPUX86State, regs[6]) }, |
{ "edi", offsetof(CPUState, regs[7]) }, |
{ "edi", offsetof(CPUX86State, regs[7]) }, |
#ifdef TARGET_X86_64 |
#ifdef TARGET_X86_64 |
{ "r8", offsetof(CPUState, regs[8]) }, |
{ "r8", offsetof(CPUX86State, regs[8]) }, |
{ "r9", offsetof(CPUState, regs[9]) }, |
{ "r9", offsetof(CPUX86State, regs[9]) }, |
{ "r10", offsetof(CPUState, regs[10]) }, |
{ "r10", offsetof(CPUX86State, regs[10]) }, |
{ "r11", offsetof(CPUState, regs[11]) }, |
{ "r11", offsetof(CPUX86State, regs[11]) }, |
{ "r12", offsetof(CPUState, regs[12]) }, |
{ "r12", offsetof(CPUX86State, regs[12]) }, |
{ "r13", offsetof(CPUState, regs[13]) }, |
{ "r13", offsetof(CPUX86State, regs[13]) }, |
{ "r14", offsetof(CPUState, regs[14]) }, |
{ "r14", offsetof(CPUX86State, regs[14]) }, |
{ "r15", offsetof(CPUState, regs[15]) }, |
{ "r15", offsetof(CPUX86State, regs[15]) }, |
#endif |
#endif |
{ "eflags", offsetof(CPUState, eflags) }, |
{ "eflags", offsetof(CPUX86State, eflags) }, |
{ "eip", offsetof(CPUState, eip) }, |
{ "eip", offsetof(CPUX86State, eip) }, |
SEG("cs", R_CS) |
SEG("cs", R_CS) |
SEG("ds", R_DS) |
SEG("ds", R_DS) |
SEG("es", R_ES) |
SEG("es", R_ES) |
Line 3025 static const MonitorDef monitor_defs[] =
|
Line 2733 static const MonitorDef monitor_defs[] =
|
{ "pc", 0, monitor_get_pc, }, |
{ "pc", 0, monitor_get_pc, }, |
#elif defined(TARGET_PPC) |
#elif defined(TARGET_PPC) |
/* General purpose registers */ |
/* General purpose registers */ |
{ "r0", offsetof(CPUState, gpr[0]) }, |
{ "r0", offsetof(CPUPPCState, gpr[0]) }, |
{ "r1", offsetof(CPUState, gpr[1]) }, |
{ "r1", offsetof(CPUPPCState, gpr[1]) }, |
{ "r2", offsetof(CPUState, gpr[2]) }, |
{ "r2", offsetof(CPUPPCState, gpr[2]) }, |
{ "r3", offsetof(CPUState, gpr[3]) }, |
{ "r3", offsetof(CPUPPCState, gpr[3]) }, |
{ "r4", offsetof(CPUState, gpr[4]) }, |
{ "r4", offsetof(CPUPPCState, gpr[4]) }, |
{ "r5", offsetof(CPUState, gpr[5]) }, |
{ "r5", offsetof(CPUPPCState, gpr[5]) }, |
{ "r6", offsetof(CPUState, gpr[6]) }, |
{ "r6", offsetof(CPUPPCState, gpr[6]) }, |
{ "r7", offsetof(CPUState, gpr[7]) }, |
{ "r7", offsetof(CPUPPCState, gpr[7]) }, |
{ "r8", offsetof(CPUState, gpr[8]) }, |
{ "r8", offsetof(CPUPPCState, gpr[8]) }, |
{ "r9", offsetof(CPUState, gpr[9]) }, |
{ "r9", offsetof(CPUPPCState, gpr[9]) }, |
{ "r10", offsetof(CPUState, gpr[10]) }, |
{ "r10", offsetof(CPUPPCState, gpr[10]) }, |
{ "r11", offsetof(CPUState, gpr[11]) }, |
{ "r11", offsetof(CPUPPCState, gpr[11]) }, |
{ "r12", offsetof(CPUState, gpr[12]) }, |
{ "r12", offsetof(CPUPPCState, gpr[12]) }, |
{ "r13", offsetof(CPUState, gpr[13]) }, |
{ "r13", offsetof(CPUPPCState, gpr[13]) }, |
{ "r14", offsetof(CPUState, gpr[14]) }, |
{ "r14", offsetof(CPUPPCState, gpr[14]) }, |
{ "r15", offsetof(CPUState, gpr[15]) }, |
{ "r15", offsetof(CPUPPCState, gpr[15]) }, |
{ "r16", offsetof(CPUState, gpr[16]) }, |
{ "r16", offsetof(CPUPPCState, gpr[16]) }, |
{ "r17", offsetof(CPUState, gpr[17]) }, |
{ "r17", offsetof(CPUPPCState, gpr[17]) }, |
{ "r18", offsetof(CPUState, gpr[18]) }, |
{ "r18", offsetof(CPUPPCState, gpr[18]) }, |
{ "r19", offsetof(CPUState, gpr[19]) }, |
{ "r19", offsetof(CPUPPCState, gpr[19]) }, |
{ "r20", offsetof(CPUState, gpr[20]) }, |
{ "r20", offsetof(CPUPPCState, gpr[20]) }, |
{ "r21", offsetof(CPUState, gpr[21]) }, |
{ "r21", offsetof(CPUPPCState, gpr[21]) }, |
{ "r22", offsetof(CPUState, gpr[22]) }, |
{ "r22", offsetof(CPUPPCState, gpr[22]) }, |
{ "r23", offsetof(CPUState, gpr[23]) }, |
{ "r23", offsetof(CPUPPCState, gpr[23]) }, |
{ "r24", offsetof(CPUState, gpr[24]) }, |
{ "r24", offsetof(CPUPPCState, gpr[24]) }, |
{ "r25", offsetof(CPUState, gpr[25]) }, |
{ "r25", offsetof(CPUPPCState, gpr[25]) }, |
{ "r26", offsetof(CPUState, gpr[26]) }, |
{ "r26", offsetof(CPUPPCState, gpr[26]) }, |
{ "r27", offsetof(CPUState, gpr[27]) }, |
{ "r27", offsetof(CPUPPCState, gpr[27]) }, |
{ "r28", offsetof(CPUState, gpr[28]) }, |
{ "r28", offsetof(CPUPPCState, gpr[28]) }, |
{ "r29", offsetof(CPUState, gpr[29]) }, |
{ "r29", offsetof(CPUPPCState, gpr[29]) }, |
{ "r30", offsetof(CPUState, gpr[30]) }, |
{ "r30", offsetof(CPUPPCState, gpr[30]) }, |
{ "r31", offsetof(CPUState, gpr[31]) }, |
{ "r31", offsetof(CPUPPCState, gpr[31]) }, |
/* Floating point registers */ |
/* Floating point registers */ |
{ "f0", offsetof(CPUState, fpr[0]) }, |
{ "f0", offsetof(CPUPPCState, fpr[0]) }, |
{ "f1", offsetof(CPUState, fpr[1]) }, |
{ "f1", offsetof(CPUPPCState, fpr[1]) }, |
{ "f2", offsetof(CPUState, fpr[2]) }, |
{ "f2", offsetof(CPUPPCState, fpr[2]) }, |
{ "f3", offsetof(CPUState, fpr[3]) }, |
{ "f3", offsetof(CPUPPCState, fpr[3]) }, |
{ "f4", offsetof(CPUState, fpr[4]) }, |
{ "f4", offsetof(CPUPPCState, fpr[4]) }, |
{ "f5", offsetof(CPUState, fpr[5]) }, |
{ "f5", offsetof(CPUPPCState, fpr[5]) }, |
{ "f6", offsetof(CPUState, fpr[6]) }, |
{ "f6", offsetof(CPUPPCState, fpr[6]) }, |
{ "f7", offsetof(CPUState, fpr[7]) }, |
{ "f7", offsetof(CPUPPCState, fpr[7]) }, |
{ "f8", offsetof(CPUState, fpr[8]) }, |
{ "f8", offsetof(CPUPPCState, fpr[8]) }, |
{ "f9", offsetof(CPUState, fpr[9]) }, |
{ "f9", offsetof(CPUPPCState, fpr[9]) }, |
{ "f10", offsetof(CPUState, fpr[10]) }, |
{ "f10", offsetof(CPUPPCState, fpr[10]) }, |
{ "f11", offsetof(CPUState, fpr[11]) }, |
{ "f11", offsetof(CPUPPCState, fpr[11]) }, |
{ "f12", offsetof(CPUState, fpr[12]) }, |
{ "f12", offsetof(CPUPPCState, fpr[12]) }, |
{ "f13", offsetof(CPUState, fpr[13]) }, |
{ "f13", offsetof(CPUPPCState, fpr[13]) }, |
{ "f14", offsetof(CPUState, fpr[14]) }, |
{ "f14", offsetof(CPUPPCState, fpr[14]) }, |
{ "f15", offsetof(CPUState, fpr[15]) }, |
{ "f15", offsetof(CPUPPCState, fpr[15]) }, |
{ "f16", offsetof(CPUState, fpr[16]) }, |
{ "f16", offsetof(CPUPPCState, fpr[16]) }, |
{ "f17", offsetof(CPUState, fpr[17]) }, |
{ "f17", offsetof(CPUPPCState, fpr[17]) }, |
{ "f18", offsetof(CPUState, fpr[18]) }, |
{ "f18", offsetof(CPUPPCState, fpr[18]) }, |
{ "f19", offsetof(CPUState, fpr[19]) }, |
{ "f19", offsetof(CPUPPCState, fpr[19]) }, |
{ "f20", offsetof(CPUState, fpr[20]) }, |
{ "f20", offsetof(CPUPPCState, fpr[20]) }, |
{ "f21", offsetof(CPUState, fpr[21]) }, |
{ "f21", offsetof(CPUPPCState, fpr[21]) }, |
{ "f22", offsetof(CPUState, fpr[22]) }, |
{ "f22", offsetof(CPUPPCState, fpr[22]) }, |
{ "f23", offsetof(CPUState, fpr[23]) }, |
{ "f23", offsetof(CPUPPCState, fpr[23]) }, |
{ "f24", offsetof(CPUState, fpr[24]) }, |
{ "f24", offsetof(CPUPPCState, fpr[24]) }, |
{ "f25", offsetof(CPUState, fpr[25]) }, |
{ "f25", offsetof(CPUPPCState, fpr[25]) }, |
{ "f26", offsetof(CPUState, fpr[26]) }, |
{ "f26", offsetof(CPUPPCState, fpr[26]) }, |
{ "f27", offsetof(CPUState, fpr[27]) }, |
{ "f27", offsetof(CPUPPCState, fpr[27]) }, |
{ "f28", offsetof(CPUState, fpr[28]) }, |
{ "f28", offsetof(CPUPPCState, fpr[28]) }, |
{ "f29", offsetof(CPUState, fpr[29]) }, |
{ "f29", offsetof(CPUPPCState, fpr[29]) }, |
{ "f30", offsetof(CPUState, fpr[30]) }, |
{ "f30", offsetof(CPUPPCState, fpr[30]) }, |
{ "f31", offsetof(CPUState, fpr[31]) }, |
{ "f31", offsetof(CPUPPCState, fpr[31]) }, |
{ "fpscr", offsetof(CPUState, fpscr) }, |
{ "fpscr", offsetof(CPUPPCState, fpscr) }, |
/* Next instruction pointer */ |
/* Next instruction pointer */ |
{ "nip|pc", offsetof(CPUState, nip) }, |
{ "nip|pc", offsetof(CPUPPCState, nip) }, |
{ "lr", offsetof(CPUState, lr) }, |
{ "lr", offsetof(CPUPPCState, lr) }, |
{ "ctr", offsetof(CPUState, ctr) }, |
{ "ctr", offsetof(CPUPPCState, ctr) }, |
{ "decr", 0, &monitor_get_decr, }, |
{ "decr", 0, &monitor_get_decr, }, |
{ "ccr", 0, &monitor_get_ccr, }, |
{ "ccr", 0, &monitor_get_ccr, }, |
/* Machine state register */ |
/* Machine state register */ |
Line 3104 static const MonitorDef monitor_defs[] =
|
Line 2812 static const MonitorDef monitor_defs[] =
|
{ "tbl", 0, &monitor_get_tbl, }, |
{ "tbl", 0, &monitor_get_tbl, }, |
#if defined(TARGET_PPC64) |
#if defined(TARGET_PPC64) |
/* Address space register */ |
/* Address space register */ |
{ "asr", offsetof(CPUState, asr) }, |
{ "asr", offsetof(CPUPPCState, asr) }, |
#endif |
#endif |
/* Segment registers */ |
/* Segment registers */ |
{ "sdr1", offsetof(CPUState, spr[SPR_SDR1]) }, |
{ "sdr1", offsetof(CPUPPCState, spr[SPR_SDR1]) }, |
{ "sr0", offsetof(CPUState, sr[0]) }, |
{ "sr0", offsetof(CPUPPCState, sr[0]) }, |
{ "sr1", offsetof(CPUState, sr[1]) }, |
{ "sr1", offsetof(CPUPPCState, sr[1]) }, |
{ "sr2", offsetof(CPUState, sr[2]) }, |
{ "sr2", offsetof(CPUPPCState, sr[2]) }, |
{ "sr3", offsetof(CPUState, sr[3]) }, |
{ "sr3", offsetof(CPUPPCState, sr[3]) }, |
{ "sr4", offsetof(CPUState, sr[4]) }, |
{ "sr4", offsetof(CPUPPCState, sr[4]) }, |
{ "sr5", offsetof(CPUState, sr[5]) }, |
{ "sr5", offsetof(CPUPPCState, sr[5]) }, |
{ "sr6", offsetof(CPUState, sr[6]) }, |
{ "sr6", offsetof(CPUPPCState, sr[6]) }, |
{ "sr7", offsetof(CPUState, sr[7]) }, |
{ "sr7", offsetof(CPUPPCState, sr[7]) }, |
{ "sr8", offsetof(CPUState, sr[8]) }, |
{ "sr8", offsetof(CPUPPCState, sr[8]) }, |
{ "sr9", offsetof(CPUState, sr[9]) }, |
{ "sr9", offsetof(CPUPPCState, sr[9]) }, |
{ "sr10", offsetof(CPUState, sr[10]) }, |
{ "sr10", offsetof(CPUPPCState, sr[10]) }, |
{ "sr11", offsetof(CPUState, sr[11]) }, |
{ "sr11", offsetof(CPUPPCState, sr[11]) }, |
{ "sr12", offsetof(CPUState, sr[12]) }, |
{ "sr12", offsetof(CPUPPCState, sr[12]) }, |
{ "sr13", offsetof(CPUState, sr[13]) }, |
{ "sr13", offsetof(CPUPPCState, sr[13]) }, |
{ "sr14", offsetof(CPUState, sr[14]) }, |
{ "sr14", offsetof(CPUPPCState, sr[14]) }, |
{ "sr15", offsetof(CPUState, sr[15]) }, |
{ "sr15", offsetof(CPUPPCState, sr[15]) }, |
/* Too lazy to put BATs... */ |
/* Too lazy to put BATs... */ |
{ "pvr", offsetof(CPUState, spr[SPR_PVR]) }, |
{ "pvr", offsetof(CPUPPCState, spr[SPR_PVR]) }, |
|
|
{ "srr0", offsetof(CPUState, spr[SPR_SRR0]) }, |
{ "srr0", offsetof(CPUPPCState, spr[SPR_SRR0]) }, |
{ "srr1", offsetof(CPUState, spr[SPR_SRR1]) }, |
{ "srr1", offsetof(CPUPPCState, spr[SPR_SRR1]) }, |
{ "sprg0", offsetof(CPUState, spr[SPR_SPRG0]) }, |
{ "sprg0", offsetof(CPUPPCState, spr[SPR_SPRG0]) }, |
{ "sprg1", offsetof(CPUState, spr[SPR_SPRG1]) }, |
{ "sprg1", offsetof(CPUPPCState, spr[SPR_SPRG1]) }, |
{ "sprg2", offsetof(CPUState, spr[SPR_SPRG2]) }, |
{ "sprg2", offsetof(CPUPPCState, spr[SPR_SPRG2]) }, |
{ "sprg3", offsetof(CPUState, spr[SPR_SPRG3]) }, |
{ "sprg3", offsetof(CPUPPCState, spr[SPR_SPRG3]) }, |
{ "sprg4", offsetof(CPUState, spr[SPR_SPRG4]) }, |
{ "sprg4", offsetof(CPUPPCState, spr[SPR_SPRG4]) }, |
{ "sprg5", offsetof(CPUState, spr[SPR_SPRG5]) }, |
{ "sprg5", offsetof(CPUPPCState, spr[SPR_SPRG5]) }, |
{ "sprg6", offsetof(CPUState, spr[SPR_SPRG6]) }, |
{ "sprg6", offsetof(CPUPPCState, spr[SPR_SPRG6]) }, |
{ "sprg7", offsetof(CPUState, spr[SPR_SPRG7]) }, |
{ "sprg7", offsetof(CPUPPCState, spr[SPR_SPRG7]) }, |
{ "pid", offsetof(CPUState, spr[SPR_BOOKE_PID]) }, |
{ "pid", offsetof(CPUPPCState, spr[SPR_BOOKE_PID]) }, |
{ "csrr0", offsetof(CPUState, spr[SPR_BOOKE_CSRR0]) }, |
{ "csrr0", offsetof(CPUPPCState, spr[SPR_BOOKE_CSRR0]) }, |
{ "csrr1", offsetof(CPUState, spr[SPR_BOOKE_CSRR1]) }, |
{ "csrr1", offsetof(CPUPPCState, spr[SPR_BOOKE_CSRR1]) }, |
{ "esr", offsetof(CPUState, spr[SPR_BOOKE_ESR]) }, |
{ "esr", offsetof(CPUPPCState, spr[SPR_BOOKE_ESR]) }, |
{ "dear", offsetof(CPUState, spr[SPR_BOOKE_DEAR]) }, |
{ "dear", offsetof(CPUPPCState, spr[SPR_BOOKE_DEAR]) }, |
{ "mcsr", offsetof(CPUState, spr[SPR_BOOKE_MCSR]) }, |
{ "mcsr", offsetof(CPUPPCState, spr[SPR_BOOKE_MCSR]) }, |
{ "tsr", offsetof(CPUState, spr[SPR_BOOKE_TSR]) }, |
{ "tsr", offsetof(CPUPPCState, spr[SPR_BOOKE_TSR]) }, |
{ "tcr", offsetof(CPUState, spr[SPR_BOOKE_TCR]) }, |
{ "tcr", offsetof(CPUPPCState, spr[SPR_BOOKE_TCR]) }, |
{ "vrsave", offsetof(CPUState, spr[SPR_VRSAVE]) }, |
{ "vrsave", offsetof(CPUPPCState, spr[SPR_VRSAVE]) }, |
{ "pir", offsetof(CPUState, spr[SPR_BOOKE_PIR]) }, |
{ "pir", offsetof(CPUPPCState, spr[SPR_BOOKE_PIR]) }, |
{ "mcsrr0", offsetof(CPUState, spr[SPR_BOOKE_MCSRR0]) }, |
{ "mcsrr0", offsetof(CPUPPCState, spr[SPR_BOOKE_MCSRR0]) }, |
{ "mcsrr1", offsetof(CPUState, spr[SPR_BOOKE_MCSRR1]) }, |
{ "mcsrr1", offsetof(CPUPPCState, spr[SPR_BOOKE_MCSRR1]) }, |
{ "decar", offsetof(CPUState, spr[SPR_BOOKE_DECAR]) }, |
{ "decar", offsetof(CPUPPCState, spr[SPR_BOOKE_DECAR]) }, |
{ "ivpr", offsetof(CPUState, spr[SPR_BOOKE_IVPR]) }, |
{ "ivpr", offsetof(CPUPPCState, spr[SPR_BOOKE_IVPR]) }, |
{ "epcr", offsetof(CPUState, spr[SPR_BOOKE_EPCR]) }, |
{ "epcr", offsetof(CPUPPCState, spr[SPR_BOOKE_EPCR]) }, |
{ "sprg8", offsetof(CPUState, spr[SPR_BOOKE_SPRG8]) }, |
{ "sprg8", offsetof(CPUPPCState, spr[SPR_BOOKE_SPRG8]) }, |
{ "ivor0", offsetof(CPUState, spr[SPR_BOOKE_IVOR0]) }, |
{ "ivor0", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR0]) }, |
{ "ivor1", offsetof(CPUState, spr[SPR_BOOKE_IVOR1]) }, |
{ "ivor1", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR1]) }, |
{ "ivor2", offsetof(CPUState, spr[SPR_BOOKE_IVOR2]) }, |
{ "ivor2", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR2]) }, |
{ "ivor3", offsetof(CPUState, spr[SPR_BOOKE_IVOR3]) }, |
{ "ivor3", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR3]) }, |
{ "ivor4", offsetof(CPUState, spr[SPR_BOOKE_IVOR4]) }, |
{ "ivor4", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR4]) }, |
{ "ivor5", offsetof(CPUState, spr[SPR_BOOKE_IVOR5]) }, |
{ "ivor5", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR5]) }, |
{ "ivor6", offsetof(CPUState, spr[SPR_BOOKE_IVOR6]) }, |
{ "ivor6", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR6]) }, |
{ "ivor7", offsetof(CPUState, spr[SPR_BOOKE_IVOR7]) }, |
{ "ivor7", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR7]) }, |
{ "ivor8", offsetof(CPUState, spr[SPR_BOOKE_IVOR8]) }, |
{ "ivor8", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR8]) }, |
{ "ivor9", offsetof(CPUState, spr[SPR_BOOKE_IVOR9]) }, |
{ "ivor9", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR9]) }, |
{ "ivor10", offsetof(CPUState, spr[SPR_BOOKE_IVOR10]) }, |
{ "ivor10", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR10]) }, |
{ "ivor11", offsetof(CPUState, spr[SPR_BOOKE_IVOR11]) }, |
{ "ivor11", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR11]) }, |
{ "ivor12", offsetof(CPUState, spr[SPR_BOOKE_IVOR12]) }, |
{ "ivor12", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR12]) }, |
{ "ivor13", offsetof(CPUState, spr[SPR_BOOKE_IVOR13]) }, |
{ "ivor13", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR13]) }, |
{ "ivor14", offsetof(CPUState, spr[SPR_BOOKE_IVOR14]) }, |
{ "ivor14", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR14]) }, |
{ "ivor15", offsetof(CPUState, spr[SPR_BOOKE_IVOR15]) }, |
{ "ivor15", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR15]) }, |
{ "ivor32", offsetof(CPUState, spr[SPR_BOOKE_IVOR32]) }, |
{ "ivor32", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR32]) }, |
{ "ivor33", offsetof(CPUState, spr[SPR_BOOKE_IVOR33]) }, |
{ "ivor33", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR33]) }, |
{ "ivor34", offsetof(CPUState, spr[SPR_BOOKE_IVOR34]) }, |
{ "ivor34", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR34]) }, |
{ "ivor35", offsetof(CPUState, spr[SPR_BOOKE_IVOR35]) }, |
{ "ivor35", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR35]) }, |
{ "ivor36", offsetof(CPUState, spr[SPR_BOOKE_IVOR36]) }, |
{ "ivor36", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR36]) }, |
{ "ivor37", offsetof(CPUState, spr[SPR_BOOKE_IVOR37]) }, |
{ "ivor37", offsetof(CPUPPCState, spr[SPR_BOOKE_IVOR37]) }, |
{ "mas0", offsetof(CPUState, spr[SPR_BOOKE_MAS0]) }, |
{ "mas0", offsetof(CPUPPCState, spr[SPR_BOOKE_MAS0]) }, |
{ "mas1", offsetof(CPUState, spr[SPR_BOOKE_MAS1]) }, |
{ "mas1", offsetof(CPUPPCState, spr[SPR_BOOKE_MAS1]) }, |
{ "mas2", offsetof(CPUState, spr[SPR_BOOKE_MAS2]) }, |
{ "mas2", offsetof(CPUPPCState, spr[SPR_BOOKE_MAS2]) }, |
{ "mas3", offsetof(CPUState, spr[SPR_BOOKE_MAS3]) }, |
{ "mas3", offsetof(CPUPPCState, spr[SPR_BOOKE_MAS3]) }, |
{ "mas4", offsetof(CPUState, spr[SPR_BOOKE_MAS4]) }, |
{ "mas4", offsetof(CPUPPCState, spr[SPR_BOOKE_MAS4]) }, |
{ "mas6", offsetof(CPUState, spr[SPR_BOOKE_MAS6]) }, |
{ "mas6", offsetof(CPUPPCState, spr[SPR_BOOKE_MAS6]) }, |
{ "mas7", offsetof(CPUState, spr[SPR_BOOKE_MAS7]) }, |
{ "mas7", offsetof(CPUPPCState, spr[SPR_BOOKE_MAS7]) }, |
{ "mmucfg", offsetof(CPUState, spr[SPR_MMUCFG]) }, |
{ "mmucfg", offsetof(CPUPPCState, spr[SPR_MMUCFG]) }, |
{ "tlb0cfg", offsetof(CPUState, spr[SPR_BOOKE_TLB0CFG]) }, |
{ "tlb0cfg", offsetof(CPUPPCState, spr[SPR_BOOKE_TLB0CFG]) }, |
{ "tlb1cfg", offsetof(CPUState, spr[SPR_BOOKE_TLB1CFG]) }, |
{ "tlb1cfg", offsetof(CPUPPCState, spr[SPR_BOOKE_TLB1CFG]) }, |
{ "epr", offsetof(CPUState, spr[SPR_BOOKE_EPR]) }, |
{ "epr", offsetof(CPUPPCState, spr[SPR_BOOKE_EPR]) }, |
{ "eplc", offsetof(CPUState, spr[SPR_BOOKE_EPLC]) }, |
{ "eplc", offsetof(CPUPPCState, spr[SPR_BOOKE_EPLC]) }, |
{ "epsc", offsetof(CPUState, spr[SPR_BOOKE_EPSC]) }, |
{ "epsc", offsetof(CPUPPCState, spr[SPR_BOOKE_EPSC]) }, |
{ "svr", offsetof(CPUState, spr[SPR_E500_SVR]) }, |
{ "svr", offsetof(CPUPPCState, spr[SPR_E500_SVR]) }, |
{ "mcar", offsetof(CPUState, spr[SPR_Exxx_MCAR]) }, |
{ "mcar", offsetof(CPUPPCState, spr[SPR_Exxx_MCAR]) }, |
{ "pid1", offsetof(CPUState, spr[SPR_BOOKE_PID1]) }, |
{ "pid1", offsetof(CPUPPCState, spr[SPR_BOOKE_PID1]) }, |
{ "pid2", offsetof(CPUState, spr[SPR_BOOKE_PID2]) }, |
{ "pid2", offsetof(CPUPPCState, spr[SPR_BOOKE_PID2]) }, |
{ "hid0", offsetof(CPUState, spr[SPR_HID0]) }, |
{ "hid0", offsetof(CPUPPCState, spr[SPR_HID0]) }, |
|
|
#elif defined(TARGET_SPARC) |
#elif defined(TARGET_SPARC) |
{ "g0", offsetof(CPUState, gregs[0]) }, |
{ "g0", offsetof(CPUSPARCState, gregs[0]) }, |
{ "g1", offsetof(CPUState, gregs[1]) }, |
{ "g1", offsetof(CPUSPARCState, gregs[1]) }, |
{ "g2", offsetof(CPUState, gregs[2]) }, |
{ "g2", offsetof(CPUSPARCState, gregs[2]) }, |
{ "g3", offsetof(CPUState, gregs[3]) }, |
{ "g3", offsetof(CPUSPARCState, gregs[3]) }, |
{ "g4", offsetof(CPUState, gregs[4]) }, |
{ "g4", offsetof(CPUSPARCState, gregs[4]) }, |
{ "g5", offsetof(CPUState, gregs[5]) }, |
{ "g5", offsetof(CPUSPARCState, gregs[5]) }, |
{ "g6", offsetof(CPUState, gregs[6]) }, |
{ "g6", offsetof(CPUSPARCState, gregs[6]) }, |
{ "g7", offsetof(CPUState, gregs[7]) }, |
{ "g7", offsetof(CPUSPARCState, gregs[7]) }, |
{ "o0", 0, monitor_get_reg }, |
{ "o0", 0, monitor_get_reg }, |
{ "o1", 1, monitor_get_reg }, |
{ "o1", 1, monitor_get_reg }, |
{ "o2", 2, monitor_get_reg }, |
{ "o2", 2, monitor_get_reg }, |
Line 3227 static const MonitorDef monitor_defs[] =
|
Line 2935 static const MonitorDef monitor_defs[] =
|
{ "i5", 21, monitor_get_reg }, |
{ "i5", 21, monitor_get_reg }, |
{ "i6", 22, monitor_get_reg }, |
{ "i6", 22, monitor_get_reg }, |
{ "i7", 23, monitor_get_reg }, |
{ "i7", 23, monitor_get_reg }, |
{ "pc", offsetof(CPUState, pc) }, |
{ "pc", offsetof(CPUSPARCState, pc) }, |
{ "npc", offsetof(CPUState, npc) }, |
{ "npc", offsetof(CPUSPARCState, npc) }, |
{ "y", offsetof(CPUState, y) }, |
{ "y", offsetof(CPUSPARCState, y) }, |
#ifndef TARGET_SPARC64 |
#ifndef TARGET_SPARC64 |
{ "psr", 0, &monitor_get_psr, }, |
{ "psr", 0, &monitor_get_psr, }, |
{ "wim", offsetof(CPUState, wim) }, |
{ "wim", offsetof(CPUSPARCState, wim) }, |
#endif |
#endif |
{ "tbr", offsetof(CPUState, tbr) }, |
{ "tbr", offsetof(CPUSPARCState, tbr) }, |
{ "fsr", offsetof(CPUState, fsr) }, |
{ "fsr", offsetof(CPUSPARCState, fsr) }, |
{ "f0", offsetof(CPUState, fpr[0].l.upper) }, |
{ "f0", offsetof(CPUSPARCState, fpr[0].l.upper) }, |
{ "f1", offsetof(CPUState, fpr[0].l.lower) }, |
{ "f1", offsetof(CPUSPARCState, fpr[0].l.lower) }, |
{ "f2", offsetof(CPUState, fpr[1].l.upper) }, |
{ "f2", offsetof(CPUSPARCState, fpr[1].l.upper) }, |
{ "f3", offsetof(CPUState, fpr[1].l.lower) }, |
{ "f3", offsetof(CPUSPARCState, fpr[1].l.lower) }, |
{ "f4", offsetof(CPUState, fpr[2].l.upper) }, |
{ "f4", offsetof(CPUSPARCState, fpr[2].l.upper) }, |
{ "f5", offsetof(CPUState, fpr[2].l.lower) }, |
{ "f5", offsetof(CPUSPARCState, fpr[2].l.lower) }, |
{ "f6", offsetof(CPUState, fpr[3].l.upper) }, |
{ "f6", offsetof(CPUSPARCState, fpr[3].l.upper) }, |
{ "f7", offsetof(CPUState, fpr[3].l.lower) }, |
{ "f7", offsetof(CPUSPARCState, fpr[3].l.lower) }, |
{ "f8", offsetof(CPUState, fpr[4].l.upper) }, |
{ "f8", offsetof(CPUSPARCState, fpr[4].l.upper) }, |
{ "f9", offsetof(CPUState, fpr[4].l.lower) }, |
{ "f9", offsetof(CPUSPARCState, fpr[4].l.lower) }, |
{ "f10", offsetof(CPUState, fpr[5].l.upper) }, |
{ "f10", offsetof(CPUSPARCState, fpr[5].l.upper) }, |
{ "f11", offsetof(CPUState, fpr[5].l.lower) }, |
{ "f11", offsetof(CPUSPARCState, fpr[5].l.lower) }, |
{ "f12", offsetof(CPUState, fpr[6].l.upper) }, |
{ "f12", offsetof(CPUSPARCState, fpr[6].l.upper) }, |
{ "f13", offsetof(CPUState, fpr[6].l.lower) }, |
{ "f13", offsetof(CPUSPARCState, fpr[6].l.lower) }, |
{ "f14", offsetof(CPUState, fpr[7].l.upper) }, |
{ "f14", offsetof(CPUSPARCState, fpr[7].l.upper) }, |
{ "f15", offsetof(CPUState, fpr[7].l.lower) }, |
{ "f15", offsetof(CPUSPARCState, fpr[7].l.lower) }, |
{ "f16", offsetof(CPUState, fpr[8].l.upper) }, |
{ "f16", offsetof(CPUSPARCState, fpr[8].l.upper) }, |
{ "f17", offsetof(CPUState, fpr[8].l.lower) }, |
{ "f17", offsetof(CPUSPARCState, fpr[8].l.lower) }, |
{ "f18", offsetof(CPUState, fpr[9].l.upper) }, |
{ "f18", offsetof(CPUSPARCState, fpr[9].l.upper) }, |
{ "f19", offsetof(CPUState, fpr[9].l.lower) }, |
{ "f19", offsetof(CPUSPARCState, fpr[9].l.lower) }, |
{ "f20", offsetof(CPUState, fpr[10].l.upper) }, |
{ "f20", offsetof(CPUSPARCState, fpr[10].l.upper) }, |
{ "f21", offsetof(CPUState, fpr[10].l.lower) }, |
{ "f21", offsetof(CPUSPARCState, fpr[10].l.lower) }, |
{ "f22", offsetof(CPUState, fpr[11].l.upper) }, |
{ "f22", offsetof(CPUSPARCState, fpr[11].l.upper) }, |
{ "f23", offsetof(CPUState, fpr[11].l.lower) }, |
{ "f23", offsetof(CPUSPARCState, fpr[11].l.lower) }, |
{ "f24", offsetof(CPUState, fpr[12].l.upper) }, |
{ "f24", offsetof(CPUSPARCState, fpr[12].l.upper) }, |
{ "f25", offsetof(CPUState, fpr[12].l.lower) }, |
{ "f25", offsetof(CPUSPARCState, fpr[12].l.lower) }, |
{ "f26", offsetof(CPUState, fpr[13].l.upper) }, |
{ "f26", offsetof(CPUSPARCState, fpr[13].l.upper) }, |
{ "f27", offsetof(CPUState, fpr[13].l.lower) }, |
{ "f27", offsetof(CPUSPARCState, fpr[13].l.lower) }, |
{ "f28", offsetof(CPUState, fpr[14].l.upper) }, |
{ "f28", offsetof(CPUSPARCState, fpr[14].l.upper) }, |
{ "f29", offsetof(CPUState, fpr[14].l.lower) }, |
{ "f29", offsetof(CPUSPARCState, fpr[14].l.lower) }, |
{ "f30", offsetof(CPUState, fpr[15].l.upper) }, |
{ "f30", offsetof(CPUSPARCState, fpr[15].l.upper) }, |
{ "f31", offsetof(CPUState, fpr[15].l.lower) }, |
{ "f31", offsetof(CPUSPARCState, fpr[15].l.lower) }, |
#ifdef TARGET_SPARC64 |
#ifdef TARGET_SPARC64 |
{ "f32", offsetof(CPUState, fpr[16]) }, |
{ "f32", offsetof(CPUSPARCState, fpr[16]) }, |
{ "f34", offsetof(CPUState, fpr[17]) }, |
{ "f34", offsetof(CPUSPARCState, fpr[17]) }, |
{ "f36", offsetof(CPUState, fpr[18]) }, |
{ "f36", offsetof(CPUSPARCState, fpr[18]) }, |
{ "f38", offsetof(CPUState, fpr[19]) }, |
{ "f38", offsetof(CPUSPARCState, fpr[19]) }, |
{ "f40", offsetof(CPUState, fpr[20]) }, |
{ "f40", offsetof(CPUSPARCState, fpr[20]) }, |
{ "f42", offsetof(CPUState, fpr[21]) }, |
{ "f42", offsetof(CPUSPARCState, fpr[21]) }, |
{ "f44", offsetof(CPUState, fpr[22]) }, |
{ "f44", offsetof(CPUSPARCState, fpr[22]) }, |
{ "f46", offsetof(CPUState, fpr[23]) }, |
{ "f46", offsetof(CPUSPARCState, fpr[23]) }, |
{ "f48", offsetof(CPUState, fpr[24]) }, |
{ "f48", offsetof(CPUSPARCState, fpr[24]) }, |
{ "f50", offsetof(CPUState, fpr[25]) }, |
{ "f50", offsetof(CPUSPARCState, fpr[25]) }, |
{ "f52", offsetof(CPUState, fpr[26]) }, |
{ "f52", offsetof(CPUSPARCState, fpr[26]) }, |
{ "f54", offsetof(CPUState, fpr[27]) }, |
{ "f54", offsetof(CPUSPARCState, fpr[27]) }, |
{ "f56", offsetof(CPUState, fpr[28]) }, |
{ "f56", offsetof(CPUSPARCState, fpr[28]) }, |
{ "f58", offsetof(CPUState, fpr[29]) }, |
{ "f58", offsetof(CPUSPARCState, fpr[29]) }, |
{ "f60", offsetof(CPUState, fpr[30]) }, |
{ "f60", offsetof(CPUSPARCState, fpr[30]) }, |
{ "f62", offsetof(CPUState, fpr[31]) }, |
{ "f62", offsetof(CPUSPARCState, fpr[31]) }, |
{ "asi", offsetof(CPUState, asi) }, |
{ "asi", offsetof(CPUSPARCState, asi) }, |
{ "pstate", offsetof(CPUState, pstate) }, |
{ "pstate", offsetof(CPUSPARCState, pstate) }, |
{ "cansave", offsetof(CPUState, cansave) }, |
{ "cansave", offsetof(CPUSPARCState, cansave) }, |
{ "canrestore", offsetof(CPUState, canrestore) }, |
{ "canrestore", offsetof(CPUSPARCState, canrestore) }, |
{ "otherwin", offsetof(CPUState, otherwin) }, |
{ "otherwin", offsetof(CPUSPARCState, otherwin) }, |
{ "wstate", offsetof(CPUState, wstate) }, |
{ "wstate", offsetof(CPUSPARCState, wstate) }, |
{ "cleanwin", offsetof(CPUState, cleanwin) }, |
{ "cleanwin", offsetof(CPUSPARCState, cleanwin) }, |
{ "fprs", offsetof(CPUState, fprs) }, |
{ "fprs", offsetof(CPUSPARCState, fprs) }, |
#endif |
#endif |
#endif |
#endif |
{ NULL }, |
{ NULL }, |
Line 3315 static int get_monitor_def(target_long *
|
Line 3023 static int get_monitor_def(target_long *
|
if (md->get_value) { |
if (md->get_value) { |
*pval = md->get_value(md, md->offset); |
*pval = md->get_value(md, md->offset); |
} else { |
} else { |
CPUState *env = mon_get_cpu(); |
CPUArchState *env = mon_get_cpu(); |
ptr = (uint8_t *)env + md->offset; |
ptr = (uint8_t *)env + md->offset; |
switch(md->type) { |
switch(md->type) { |
case MD_I32: |
case MD_I32: |
Line 3412 static int64_t expr_unary(Monitor *mon)
|
Line 3120 static int64_t expr_unary(Monitor *mon)
|
n = 0; |
n = 0; |
break; |
break; |
default: |
default: |
|
errno = 0; |
#if TARGET_PHYS_ADDR_BITS > 32 |
#if TARGET_PHYS_ADDR_BITS > 32 |
n = strtoull(pch, &p, 0); |
n = strtoull(pch, &p, 0); |
#else |
#else |
n = strtoul(pch, &p, 0); |
n = strtoul(pch, &p, 0); |
#endif |
#endif |
|
if (errno == ERANGE) { |
|
expr_error(mon, "number too large"); |
|
} |
if (pch == p) { |
if (pch == p) { |
expr_error(mon, "invalid char in expression"); |
expr_error(mon, "invalid char in expression"); |
} |
} |
Line 3910 static const mon_cmd_t *monitor_parse_co
|
Line 3622 static const mon_cmd_t *monitor_parse_co
|
monitor_printf(mon, "integer is for 32-bit values\n"); |
monitor_printf(mon, "integer is for 32-bit values\n"); |
goto fail; |
goto fail; |
} else if (c == 'M') { |
} else if (c == 'M') { |
|
if (val < 0) { |
|
monitor_printf(mon, "enter a positive value\n"); |
|
goto fail; |
|
} |
val <<= 20; |
val <<= 20; |
} |
} |
qdict_put(qdict, key, qint_from_int(val)); |
qdict_put(qdict, key, qint_from_int(val)); |
Line 4449 static int check_client_args_type(const
|
Line 4165 static int check_client_args_type(const
|
case 'O': |
case 'O': |
assert(flags & QMP_ACCEPT_UNKNOWNS); |
assert(flags & QMP_ACCEPT_UNKNOWNS); |
break; |
break; |
|
case 'q': |
|
/* Any QObject can be passed. */ |
|
break; |
case '/': |
case '/': |
case '.': |
case '.': |
/* |
/* |
Line 4913 static void bdrv_password_cb(Monitor *mo
|
Line 4632 static void bdrv_password_cb(Monitor *mo
|
monitor_read_command(mon, 1); |
monitor_read_command(mon, 1); |
} |
} |
|
|
|
ReadLineState *monitor_get_rs(Monitor *mon) |
|
{ |
|
return mon->rs; |
|
} |
|
|
int monitor_read_bdrv_key_start(Monitor *mon, BlockDriverState *bs, |
int monitor_read_bdrv_key_start(Monitor *mon, BlockDriverState *bs, |
BlockDriverCompletionFunc *completion_cb, |
BlockDriverCompletionFunc *completion_cb, |
void *opaque) |
void *opaque) |
Line 4926 int monitor_read_bdrv_key_start(Monitor
|
Line 4650 int monitor_read_bdrv_key_start(Monitor
|
} |
} |
|
|
if (monitor_ctrl_mode(mon)) { |
if (monitor_ctrl_mode(mon)) { |
qerror_report(QERR_DEVICE_ENCRYPTED, bdrv_get_device_name(bs)); |
qerror_report(QERR_DEVICE_ENCRYPTED, bdrv_get_device_name(bs), |
|
bdrv_get_encrypted_filename(bs)); |
return -1; |
return -1; |
} |
} |
|
|
Line 4943 int monitor_read_bdrv_key_start(Monitor
|
Line 4668 int monitor_read_bdrv_key_start(Monitor
|
|
|
return err; |
return err; |
} |
} |
|
|
|
int monitor_read_block_device_key(Monitor *mon, const char *device, |
|
BlockDriverCompletionFunc *completion_cb, |
|
void *opaque) |
|
{ |
|
BlockDriverState *bs; |
|
|
|
bs = bdrv_find(device); |
|
if (!bs) { |
|
monitor_printf(mon, "Device not found %s\n", device); |
|
return -1; |
|
} |
|
|
|
return monitor_read_bdrv_key_start(mon, bs, completion_cb, opaque); |
|
} |