File:  [Qemu by Fabrice Bellard] / qemu / pc-bios / petalogix-ml605.dtb
Revision 1.1.1.1 (vendor branch): download - view: text, annotated - select for diffs
Tue Apr 24 19:03:31 2018 UTC (3 years, 3 months ago) by root
Branches: qemu, MAIN
CVS tags: qemu1101, qemu1001, qemu1000, qemu0151, HEAD
qemu 0.15.1

    1: 
&8`((xlnx,microblaze&edk131memory@50000000,memory8Paliases</axi@0/axi-ethernet@82780000F/axi@0/serial@83e00000chosenN console=ttyS0,115200 W/axi@0/serial@83e00000cpusicpu@0oxlnx,microblaze-8.10.aP_ ,cpuP_ &microblaze,8.10.a8'<Qe "?Uj~	/virtex6;Obl $9Mau
microblaze_0)?Zu!>N[laxi@0(xlnx,axi-interconnect-1.02.asimple-bus*axi-ethernet@8278000012xlnx,axi-ethernet-2.01.axlnx,axi-ethernet-1.00.a,networkEVa
    2: 5"s8x~0B00001	%1<M]nmdiophy@7marvell,88e1111
,ethernet-phy8x~axi-dma@84600000xlnx,axi-dma-3.00.aEV8`/virtex6			0	K	i	~x~serial@83e00000o=xlnx,axi-uart16550-1.01.axlnx,xps-uart16550-2.00.ans16550a	%,serialEV8			}x@/virtex6		
    3: 
    4: 
    5: &system-timer@83c00000o,xlnx,axi-timer-1.01.axlnx,xps-timer-1.00.aEV8
    6: : /virtex6
    7: K
    8: \
    9: m
   10: 
   11: interrupt-controller@81800000
   12: *xlnx,axi-intc-1.01.axlnx,xps-intc-1.00.a
   13: 8
   14: 
   15: x~flash@86000000
   16: xlnx,axi-emc-1.01.acfi-flash8
   17: '/virtex66Xz 	 (7 GZq  	
AXI4LITE
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::$8:L:`:tXXXXXXX(<Pdazaaa2:::p.(.:.L._.r..partition@0x00000000fpga8partition@0x00100000boot8partition@0x00140000bootenv8partition@0x00160000config8partition@0x00180000image8partition@0x00b80000spare8	#address-cells#size-cellscompatiblemodeldevice_typeregethernet0serial0bootargslinux,stdout-path#cpusclock-frequencyd-cache-baseaddrd-cache-highaddrd-cache-line-sized-cache-sizei-cache-baseaddri-cache-highaddri-cache-line-sizei-cache-sizetimebase-frequencyxlnx,addr-tag-bitsxlnx,allow-dcache-wrxlnx,allow-icache-wrxlnx,area-optimizedxlnx,branch-target-cache-sizexlnx,cache-byte-sizexlnx,d-axixlnx,d-lmbxlnx,d-plbxlnx,data-sizexlnx,dcache-addr-tagxlnx,dcache-always-usedxlnx,dcache-byte-sizexlnx,dcache-data-widthxlnx,dcache-force-tag-lutramxlnx,dcache-interfacexlnx,dcache-line-lenxlnx,dcache-use-fslxlnx,dcache-use-writebackxlnx,dcache-victimsxlnx,debug-enabledxlnx,div-zero-exceptionxlnx,dynamic-bus-sizingxlnx,ecc-use-ce-exceptionxlnx,edge-is-positivexlnx,endiannessxlnx,familyxlnx,fault-tolerantxlnx,fpu-exceptionxlnx,freqxlnx,fsl-data-sizexlnx,fsl-exceptionxlnx,fsl-linksxlnx,i-axixlnx,i-lmbxlnx,i-plbxlnx,icache-always-usedxlnx,icache-data-widthxlnx,icache-force-tag-lutramxlnx,icache-interfacexlnx,icache-line-lenxlnx,icache-streamsxlnx,icache-use-fslxlnx,icache-victimsxlnx,ill-opcode-exceptionxlnx,instancexlnx,interconnectxlnx,interrupt-is-edgexlnx,mmu-dtlb-sizexlnx,mmu-itlb-sizexlnx,mmu-privileged-instrxlnx,mmu-tlb-accessxlnx,mmu-zonesxlnx,number-of-pc-brkxlnx,number-of-rd-addr-brkxlnx,number-of-wr-addr-brkxlnx,opcode-0x0-illegalxlnx,optimizationxlnx,pvrxlnx,pvr-user1xlnx,pvr-user2xlnx,reset-msrxlnx,scoxlnx,stream-interconnectxlnx,unaligned-exceptionsxlnx,use-barrelxlnx,use-branch-target-cachexlnx,use-dcachexlnx,use-divxlnx,use-ext-brkxlnx,use-ext-nm-brkxlnx,use-extended-fsl-instrxlnx,use-fpuxlnx,use-hw-mulxlnx,use-icachexlnx,use-interruptxlnx,use-mmuxlnx,use-msr-instrxlnx,use-pcmp-instrxlnx,use-stack-protectionrangesaxistream-connectedinterrupt-parentinterruptslocal-mac-addressphy-handlexlnx,avbxlnx,halfdupxlnx,include-ioxlnx,mcast-extendxlnx,phy-typexlnx,phyaddrxlnx,rxcsumxlnx,rxmemxlnx,rxvlan-strpxlnx,rxvlan-tagxlnx,rxvlan-tranxlnx,statsxlnx,txcsumxlnx,txmemxlnx,txvlan-strpxlnx,txvlan-tagxlnx,txvlan-tranxlnx,typelinux,phandlexlnx,dlytmr-resolutionxlnx,include-mm2sxlnx,include-mm2s-drexlnx,include-s2mmxlnx,include-s2mm-drexlnx,mm2s-burst-sizexlnx,prmry-is-aclk-asyncxlnx,s2mm-burst-sizexlnx,sg-include-desc-queuexlnx,sg-include-stscntrl-strmxlnx,sg-length-widthxlnx,sg-use-stsapp-lengthcurrent-speedreg-offsetreg-shiftxlnx,external-xin-clk-hzxlnx,has-external-rclkxlnx,has-external-xinxlnx,is-a-16550xlnx,use-modem-portsxlnx,use-user-portsxlnx,count-widthxlnx,gen0-assertxlnx,gen1-assertxlnx,one-timer-onlyxlnx,trig0-assertxlnx,trig1-assert#interrupt-cellsinterrupt-controllerxlnx,kind-of-intrxlnx,num-intr-inputsbank-widthxlnx,axi-clk-period-psxlnx,include-datawidth-matching-0xlnx,include-datawidth-matching-1xlnx,include-datawidth-matching-2xlnx,include-datawidth-matching-3xlnx,include-negedge-ioregsxlnx,max-mem-widthxlnx,mem0-typexlnx,mem0-widthxlnx,mem1-typexlnx,mem1-widthxlnx,mem2-typexlnx,mem2-widthxlnx,mem3-typexlnx,mem3-widthxlnx,num-banks-memxlnx,parity-type-mem-0xlnx,parity-type-mem-1xlnx,parity-type-mem-2xlnx,parity-type-mem-3xlnx,s-axi-en-regxlnx,s-axi-mem-addr-widthxlnx,s-axi-mem-data-widthxlnx,s-axi-mem-id-widthxlnx,s-axi-mem-protocolxlnx,s-axi-reg-addr-widthxlnx,s-axi-reg-data-widthxlnx,s-axi-reg-protocolxlnx,synch-pipedelay-0xlnx,synch-pipedelay-1xlnx,synch-pipedelay-2xlnx,synch-pipedelay-3xlnx,tavdv-ps-mem-0xlnx,tavdv-ps-mem-1xlnx,tavdv-ps-mem-2xlnx,tavdv-ps-mem-3xlnx,tcedv-ps-mem-0xlnx,tcedv-ps-mem-1xlnx,tcedv-ps-mem-2xlnx,tcedv-ps-mem-3xlnx,thzce-ps-mem-0xlnx,thzce-ps-mem-1xlnx,thzce-ps-mem-2xlnx,thzce-ps-mem-3xlnx,thzoe-ps-mem-0xlnx,thzoe-ps-mem-1xlnx,thzoe-ps-mem-2xlnx,thzoe-ps-mem-3xlnx,tlzwe-ps-mem-0xlnx,tlzwe-ps-mem-1xlnx,tlzwe-ps-mem-2xlnx,tlzwe-ps-mem-3xlnx,tpacc-ps-flash-0xlnx,tpacc-ps-flash-1xlnx,tpacc-ps-flash-2xlnx,tpacc-ps-flash-3xlnx,twc-ps-mem-0xlnx,twc-ps-mem-1xlnx,twc-ps-mem-2xlnx,twc-ps-mem-3xlnx,twp-ps-mem-0xlnx,twp-ps-mem-1xlnx,twp-ps-mem-2xlnx,twp-ps-mem-3xlnx,twph-ps-mem-0xlnx,twph-ps-mem-1xlnx,twph-ps-mem-2xlnx,twph-ps-mem-3label

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