File:  [Qemu by Fabrice Bellard] / qemu / pc-bios / petalogix-s3adsp1800.dtb
Revision 1.1.1.1 (vendor branch): download - view: text, annotated - select for diffs
Tue Apr 24 17:26:47 2018 UTC (3 years, 5 months ago) by root
Branches: qemu, MAIN
CVS tags: qemu1101, qemu1001, qemu1000, qemu0151, qemu0150, qemu0141, qemu0140, qemu0130, qemu0125, qemu0124, qemu0123, qemu0122, qemu0121, qemu0120, qemu0111, qemu0110, HEAD
qemu 0.11.0

    1: 
 C8(3xlnx,microblaze&testingmemory@90000000,memory8chosen<console=ttyUL0,115200E/plb@0/serial@84000000cpusWcpu@0]xlnx,microblaze-7.10.dm~,cpu&microblaze,7.10.d8*?Shs~ /G_
uspartan3adsp +
Emicroblaze_0Se|)AJYhw%5HUhplb@0xlnx,plb-v46-1.03.asimple-bus|ethernet@81000000xlnx,xps-ethernetlite-2.00.b,network8
uspartan3adspflash@a0000000"xlnx,xps-mch-emc-2.00.acfi-flash8
uspartan3adsp0Rt > -@Zt/? O _ o			0	Gp	[:	o:	:	p	:	:	:	a	X
    2: X
    3: #X
    4: 7a
    5: KX
    6: _X
    7: sX
    8: 
    9: 
   10: 
   11: 
   12: p
   13: :
   14: :
:1.C.U.gzgpio@81400000xlnx,xps-gpio-1.00.a8@%7
uspartan3adspK[rserial@84000000]xlnx,xps-uartlite-1.00.a,serial8
uspartan3adsp
debug@84400000xlnx,mdm-1.00.d8@
uspartan3adspS

(
:
J
Xmpmc@90000000xlnx,mpmc-4.03.ainterrupt-controller@81800000
mxlnx,xps-intc-1.00.a
~8

   15: 

timer@83c00000xlnx,xps-timer-1.00.a8
 
uspartan3adsp


!	#address-cells#size-cellscompatiblemodeldevice_typeregbootargslinux,stdout-path#cpusclock-frequencyd-cache-baseaddrd-cache-highaddrd-cache-line-sized-cache-sizei-cache-baseaddri-cache-highaddri-cache-line-sizei-cache-sizetimebase-frequencyxlnx,addr-tag-bitsxlnx,allow-dcache-wrxlnx,allow-icache-wrxlnx,area-optimizedxlnx,cache-byte-sizexlnx,d-lmbxlnx,d-opbxlnx,d-plbxlnx,data-sizexlnx,dcache-addr-tagxlnx,dcache-always-usedxlnx,dcache-byte-sizexlnx,dcache-line-lenxlnx,dcache-use-fslxlnx,debug-enabledxlnx,div-zero-exceptionxlnx,dopb-bus-exceptionxlnx,dynamic-bus-sizingxlnx,edge-is-positivexlnx,familyxlnx,fpu-exceptionxlnx,fsl-data-sizexlnx,fsl-exceptionxlnx,fsl-linksxlnx,i-lmbxlnx,i-opbxlnx,i-plbxlnx,icache-always-usedxlnx,icache-line-lenxlnx,icache-use-fslxlnx,ill-opcode-exceptionxlnx,instancexlnx,interconnectxlnx,interrupt-is-edgexlnx,iopb-bus-exceptionxlnx,mmu-dtlb-sizexlnx,mmu-itlb-sizexlnx,mmu-tlb-accessxlnx,mmu-zonesxlnx,number-of-pc-brkxlnx,number-of-rd-addr-brkxlnx,number-of-wr-addr-brkxlnx,opcode-0x0-illegalxlnx,pvrxlnx,pvr-user1xlnx,pvr-user2xlnx,reset-msrxlnx,scoxlnx,unaligned-exceptionsxlnx,use-barrelxlnx,use-dcachexlnx,use-divxlnx,use-ext-brkxlnx,use-ext-nm-brkxlnx,use-extended-fsl-instrxlnx,use-fpuxlnx,use-hw-mulxlnx,use-icachexlnx,use-interruptxlnx,use-mmuxlnx,use-msr-instrxlnx,use-pcmp-instrrangesinterrupt-parentinterruptslocal-mac-addressxlnx,duplexxlnx,rx-ping-pongxlnx,tx-ping-pongbank-widthxlnx,include-datawidth-matching-0xlnx,include-datawidth-matching-1xlnx,include-datawidth-matching-2xlnx,include-datawidth-matching-3xlnx,include-negedge-ioregsxlnx,include-plb-ipifxlnx,include-wrbufxlnx,max-mem-widthxlnx,mch-native-dwidthxlnx,mch-plb-clk-period-psxlnx,mch-splb-awidthxlnx,mch0-accessbuf-depthxlnx,mch0-protocolxlnx,mch0-rddatabuf-depthxlnx,mch1-accessbuf-depthxlnx,mch1-protocolxlnx,mch1-rddatabuf-depthxlnx,mch2-accessbuf-depthxlnx,mch2-protocolxlnx,mch2-rddatabuf-depthxlnx,mch3-accessbuf-depthxlnx,mch3-protocolxlnx,mch3-rddatabuf-depthxlnx,mem0-widthxlnx,mem1-widthxlnx,mem2-widthxlnx,mem3-widthxlnx,num-banks-memxlnx,num-channelsxlnx,priority-modexlnx,synch-mem-0xlnx,synch-mem-1xlnx,synch-mem-2xlnx,synch-mem-3xlnx,synch-pipedelay-0xlnx,synch-pipedelay-1xlnx,synch-pipedelay-2xlnx,synch-pipedelay-3xlnx,tavdv-ps-mem-0xlnx,tavdv-ps-mem-1xlnx,tavdv-ps-mem-2xlnx,tavdv-ps-mem-3xlnx,tcedv-ps-mem-0xlnx,tcedv-ps-mem-1xlnx,tcedv-ps-mem-2xlnx,tcedv-ps-mem-3xlnx,thzce-ps-mem-0xlnx,thzce-ps-mem-1xlnx,thzce-ps-mem-2xlnx,thzce-ps-mem-3xlnx,thzoe-ps-mem-0xlnx,thzoe-ps-mem-1xlnx,thzoe-ps-mem-2xlnx,thzoe-ps-mem-3xlnx,tlzwe-ps-mem-0xlnx,tlzwe-ps-mem-1xlnx,tlzwe-ps-mem-2xlnx,tlzwe-ps-mem-3xlnx,twc-ps-mem-0xlnx,twc-ps-mem-1xlnx,twc-ps-mem-2xlnx,twc-ps-mem-3xlnx,twp-ps-mem-0xlnx,twp-ps-mem-1xlnx,twp-ps-mem-2xlnx,twp-ps-mem-3xlnx,xcl0-linesizexlnx,xcl0-writexferxlnx,xcl1-linesizexlnx,xcl1-writexferxlnx,xcl2-linesizexlnx,xcl2-writexferxlnx,xcl3-linesizexlnx,xcl3-writexferxlnx,all-inputsxlnx,all-inputs-2xlnx,dout-defaultxlnx,dout-default-2xlnx,gpio-widthxlnx,interrupt-presentxlnx,is-bidirxlnx,is-bidir-2xlnx,is-dualxlnx,tri-defaultxlnx,tri-default-2current-speedport-numberxlnx,baudratexlnx,data-bitsxlnx,odd-parityxlnx,use-parityxlnx,jtag-chainxlnx,mb-dbg-portsxlnx,uart-widthxlnx,use-uartxlnx,write-fsl-ports#interrupt-cellsinterrupt-controllerxlnx,kind-of-intrxlnx,num-intr-inputslinux,phandlexlnx,count-widthxlnx,gen0-assertxlnx,gen1-assertxlnx,one-timer-onlyxlnx,trig0-assertxlnx,trig1-assert

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