Annotation of qemu/roms/SLOF/board-js2x/slof/pci-bridge_1022_7460.fs, revision 1.1.1.1

1.1       root        1: \ *****************************************************************************
                      2: \ * Copyright (c) 2004, 2008 IBM Corporation
                      3: \ * All rights reserved.
                      4: \ * This program and the accompanying materials
                      5: \ * are made available under the terms of the BSD License
                      6: \ * which accompanies this distribution, and is available at
                      7: \ * http://www.opensource.org/licenses/bsd-license.php
                      8: \ *
                      9: \ * Contributors:
                     10: \ *     IBM Corporation - initial implementation
                     11: \ ****************************************************************************/
                     12: 
                     13: \ AMD 8111 I/O hub.
                     14: 
                     15: \ See the documentation at http://www.amd.com ; the datasheet for this chip is
                     16: \ document #24674.
                     17: 
                     18: \ First, some master config.  Not all of this logically belongs to just
                     19: \ one function, and certainly not to the LPC bridge; also, we'll
                     20: \ initialize all functions in "downstream" order, and this code has to be
                     21: \ run first.  So do it now.
                     22: 
                     23: 00 842 config-b! \ Disable 8237 & 8254 & 8259's.  We're not a PC.
                     24: u3?  IF
                     25:    80 847 config-b! \ Disable EHCI, as it is terminally broken.
                     26: THEN
                     27: 03 848 config-b! \ Enable LPC, IDE; disable I2C, SMM, AC'97 functions.
                     28: 01 849 config-b! \ Enable USB, disable 100Mb enet.
                     29: 01 84b config-b! \ Enable IO-APIC.
                     30: 
                     31: fec00000 s" ioapic.fs" included
                     32: 00 init-ioapic
                     33: 
                     34: \ Program PNPIRQ[0,1,2] as IRQ #D,E,F; switch those GPIOs to low-active.
                     35:   0b 848 config-b! \ enable devB:3
                     36: 7000 b58 config-l! \ map PMxx at pci i/o 7000
                     37:   d1 b41 config-b! \ enable access to PMxx space
                     38: 
                     39: \ on JS20 the planar id is encoded in GPIO 29, 30 and 31
                     40: \ >=5 is GA2 else it is GA1
                     41: : (planar-id) ( -- planar-id)
                     42:    [ 70dd io-c@ 5 rshift 1 and ]  LITERAL
                     43:    [ 70de io-c@ 5 rshift 2 and ]  LITERAL
                     44:    [ 70df io-c@ 5 rshift 4 and ]  LITERAL
                     45:    + + 7 xor
                     46: ;
                     47: 
                     48: u3?  IF  [']  (planar-id) to planar-id  THEN
                     49: 
                     50: 8 70d3 io-c!  8 70d4 io-c!  8 70d5 io-c! \ set the pins to low-active
                     51:  bimini? IF 5 70c4 io-c! THEN \ on bimini set gpio4 as output and high to power up USB
                     52:  fec b44 config-w! \ set PNPIRQ pnpirq2 -> f , pnpirq1 -> e pnpirq0 -> c
                     53:   51 b41 config-b! \ disable access to PMxx space
                     54:   03 848 config-b! \ disable devB:3
                     55: 
                     56: \ The function of the PCI controller BARs change depending on the mode the
                     57: \ controller is in.
                     58: \ And the default is legacy mode.  Gross.
                     59: 05 909 config-b! \ Enable native PCI mode.
                     60: 03 940 config-b! \ Enable both ports.
                     61: 
                     62: \ Enable HPET on 8111, at address fe000000.
                     63: fe000001 8a0 config-l!
                     64: 
                     65: : >hpet  fe000000 + ;
                     66: : hpet@  >hpet rl@-le ;
                     67: : hpet!  >hpet rl!-le ;
                     68: 
                     69: INCLUDE freq.fs
                     70: 
                     71: \ Disable HPET.
                     72: 0 8a0 config-l!
                     73: 
                     74: \ 8111 has only 16 bits of PCI I/O space.  Get the address in range.
                     75: 8000 next-pci-io !
                     76: 
                     77: \ before disabling EHCI it needs to be reset
                     78: 
                     79: \ first we are setting up the BAR0, so that we can talk to the
                     80: \ memory mapped controller; not using the PCI scan because we just
                     81: \ want a temporary setup
                     82: 
                     83: : really-disable-broken-amd8111-ehci  ( -- )
                     84:    \ this word only works on U4 systems (JS21/Bimini)
                     85:    \ yeah, hardcoded!
                     86:    f2000000 to puid
                     87:    
                     88:    \ the PCI scan would assign pci-next-mmio to that device
                     89:    \ let's just take that address
                     90:    pci-next-mmio @ 100000 #aligned 
                     91:    \ pci-bus-number 10 lshift 210 or could be something like 70210
                     92:    \ 7: pci-bus-number
                     93:    \ 2: device function
                     94:    \ 10: offset 10 (bar 0)
                     95:    pci-bus-number 10 lshift 210 or rtas-config-l!
                     96: 
                     97:    \ enable memory space
                     98:    pci-bus-number 10 lshift 204 or dup rtas-config-l@ 2 or swap rtas-config-l!
                     99: 
                    100:    pci-next-mmio @ 100000 #aligned ( base )
                    101: 
                    102:    \ Sequence prescribed for resetting the EHCI contoller
                    103: 
                    104:    \ If Run/Stop bit (ECAP30 bit 0) is 1
                    105:    \   Set Run/Stop bit to 0
                    106:    \   wait 2ms
                    107: 
                    108:    dup 30 + rl@ 1 and 1 =  IF
                    109:       dup 30 + rl@ 1 or
                    110:       over 30 + rl!
                    111:       2 ms
                    112:    THEN
                    113: 
                    114:    \ While HCHalted bit (ECAP34 bit 12) is 0  (still running, wait forever)
                    115:    \   wait 2ms
                    116: 
                    117:    BEGIN  dup 34 + rl@ 1000 and 0= 2 ms UNTIL
                    118: 
                    119:    \ Set HCReset bit (ECAP30 bit 1)
                    120: 
                    121:    dup 30 + 2 swap rl!
                    122: 
                    123:    \ While HCReset bit is 1 (wait forever for reset to complete)
                    124:    \   wait 2ms
                    125: 
                    126:    BEGIN  dup 30 + rl@ 2 and 0= 2 ms UNTIL  drop
                    127: 
                    128:    \ now it is really disabled
                    129: 
                    130:    \ disable memory space access again
                    131:    2100000 pci-bus-number 10 lshift 204 or rtas-config-l!
                    132: 
                    133:    80 847 config-b! \ Disable EHCI, as it is terminally broken.
                    134: ;
                    135: 
                    136: my-space pci-class-name type cr
                    137: 
                    138: \ copied from pci-properties.fs and pci-scan.fs
                    139: \ changed to disable the EHCI completely just before the scan
                    140: \ and after mem/IO transactions have been enabled
                    141: 
                    142: \ Setup the Base and Limits in the Bridge
                    143: \ and scan the bus(es) beyond that Bridge
                    144: : pci-bridge-probe-amd8111 ( addr -- )
                    145:    dup pci-bridge-set-bases                        \ SetUp all Base Registers
                    146:    pci-bus-number 1+ TO pci-bus-number             \ increase number of busses found
                    147:    pci-device-vec-len 1+ TO pci-device-vec-len     \ increase the device-slot vector depth
                    148:    dup                                             \ stack config-addr for pci-bus!
                    149:    FF swap                                         \ Subordinate Bus Number ( for now to max to open all subbusses )
                    150:    pci-bus-number swap                             \ Secondary   Bus Number ( the new busnumber )
                    151:    dup pci-addr2bus swap                           \ Primary     Bus Number ( the current bus )
                    152:    pci-bus!                                        \ and set them into the bridge
                    153:    pci-enable                                      \ enable mem/IO transactions
                    154: 
                    155:    \ at this point we can talk to the broken EHCI controller
                    156:    really-disable-broken-amd8111-ehci
                    157: 
                    158:    dup pci-bus-scnd@ func-pci-probe-bus            \ and probe the secondary bus
                    159:    dup pci-bus-number swap pci-bus-subo!           \ set SubOrdinate Bus Number to current number of busses
                    160:    pci-device-vec-len 1- TO pci-device-vec-len     \ decrease the device-slot vector depth
                    161:    dup pci-bridge-set-limits                       \ SetUp all Limit Registers
                    162:    drop                                            \ forget the config-addr
                    163: ;
                    164: 
                    165: \ used to set up all unknown Bridges.
                    166: \ If a Bridge has no special handling for setup
                    167: \ the device file (pci-bridge_VENDOR_DEVICE.fs) can call
                    168: \ this word to setup busses and scan beyond.
                    169: : pci-bridge-generic-setup-amd8111 ( addr -- )
                    170:    pci-device-slots >r             \ save the slot array on return stack
                    171:    dup pci-common-props            \ set the common properties before scanning the bus
                    172:    s" pci" device-type             \ the type is allways "pci"
                    173:    dup pci-bridge-probe-amd8111    \ find all device connected to it
                    174:    dup assign-all-bridge-bars      \ set up all memory access BARs
                    175:    dup pci-set-irq-line            \ set the interrupt pin
                    176:    dup pci-set-capabilities        \ set up the capabilities
                    177:    pci-bridge-props                \ and generate all properties
                    178:    r> TO pci-device-slots          \ and reset the slot array
                    179: ;
                    180: 
                    181: : amd8111-bridge-setup
                    182:     my-space
                    183:     u3? takeover? or  IF
                    184:        \ if it is js20 or we are coming from takeover
                    185:        \ we just do the normal setup
                    186:        pci-bridge-generic-setup
                    187:     ELSE
                    188:        pci-bridge-generic-setup-amd8111
                    189:     THEN
                    190:     s" pci" device-name
                    191: ;
                    192: 
                    193: amd8111-bridge-setup

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