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1.1 root 1: \ *****************************************************************************
2: \ * Copyright (c) 2004, 2008 IBM Corporation
3: \ * All rights reserved.
4: \ * This program and the accompanying materials
5: \ * are made available under the terms of the BSD License
6: \ * which accompanies this distribution, and is available at
7: \ * http://www.opensource.org/licenses/bsd-license.php
8: \ *
9: \ * Contributors:
10: \ * IBM Corporation - initial implementation
11: \ ****************************************************************************/
12:
13: my-space pci-class-name type
14:
15: my-space assign-all-device-bars
16: my-space pci-device-props
17: my-space pci-set-irq-line
18:
19: 7 4 config-w!
20:
21: \ Special notice from ATI:
22: \ ATI TECHNOLOGIES INC. ("ATI") HAS NOT ASSISTED IN THE CREATION OF,
23: \ AND DOES NOT ENDORSE THE USE OF, THIS SOFTWARE. ATI WILL NOT BE
24: \ RESPONSIBLE OR LIABLE FOR ANY ACTUAL OR ALLEGED DAMAGE OR LOSS
25: \ CAUSED BY OR IN CONNECTION WITH THE USE OF, OR RELIANCE ON,
26: \ THIS SOFTWARE.
27:
28: \ Description: This FCODE driver initializes the RN50 (ES1000) ATI
29: \ adaptor.
30:
31: -1 value mem-addr
32: -1 value regs-addr
33: false value is_installed
34:
1.1.1.2 ! root 35: : reg-rl@ regs-addr + rl@-le ;
! 36: : reg-rl! regs-addr + rl!-le ;
! 37: : map-in " map-in" $call-parent ;
! 38: : map-out " map-out" $call-parent ;
! 39: : pc@ ( offset -- byte ) regs-addr + rb@ ;
! 40: : pc! ( byte offset -- ) regs-addr + rb! ;
1.1 root 41:
42: 0 value phys_low
43: 0 value phys_mid
44: 0 value phys_high
45: 0 value phys_len
46:
47: : MAP-CSR-BASE ( -- )
48: " assigned-addresses" get-my-property 0= if
49: begin dup 0> while ( prop-addr len )
50: \ Get the phys-hi mid low and the low order 32 bits of the length
51:
52: decode-phys to phys_high to phys_mid to phys_low decode-int drop decode-int to phys_len
53:
54: phys_high H# FF and \ See which BAR this refers to
55: case
56: h# 10 of phys_low phys_mid phys_high h# 1000000 map-in to mem-addr endof
57: h# 18 of phys_low phys_mid phys_high phys_len map-in to regs-addr endof
58: endcase
59: repeat
60: ( prop-addr 0 ) 2drop
61: then
62:
63: ;
64:
65: : enable-card my-space 4 + dup config-b@ 3 or swap config-b! ;
66:
67: : EARLY-MAP ( -- )
68:
69: " reg" get-my-property 0= if
70: begin dup 0> while ( prop-addr len )
71:
72: \ Get the phys-hi mid low and the low order 32 bits of the length
73:
74: decode-phys to phys_high to phys_mid to phys_low decode-int drop decode-int to phys_len
75:
76: phys_high H# FF and \ See which BAR this refers to
77: case
78: h# 10 of phys_low phys_mid phys_high H# 1000000 map-in to mem-addr endof
79: h# 18 of phys_low phys_mid phys_high h# 1000 map-in to regs-addr endof
80: endcase
81: repeat
82: ( prop-addr 0 ) 2drop
83: then
84: ;
85:
86: : EARLY-UNMAP ( -- )
87:
88: mem-addr -1 <> if
89: mem-addr h# 1000000 map-out
90: -1 to mem-addr
91: then
92:
93: regs-addr -1 <> if
94: regs-addr h# 1000 map-out
95: -1 to regs-addr
96: then
97:
98: ;
99:
100: CREATE INIT1_ARRAY
101: H# 0F8 ( CONFIG_MEMSIZE ) L, H# 00000000 L, H# 01000000 L,
102: H# 1C0 ( MPP_TB_CONFIG ) L, H# 00FFFFFF L, H# 07000000 L,
103: H# 030 ( BUS_CNTL ) L, H# 00000000 L, H# 5133A3B0 L,
104: H# 0EC ( RBBM_CNTL ) L, H# 00000000 L, h# 00004443 L,
105: H# 1D0 ( DEBUG_CNTL ) L, H# FFFFFFFD L, H# 00000002 L,
106: H# 050 ( CRTC_GEN_CNTL ) L, H# 00000000 L, H# 04000000 L,
107: H# 058 ( DAC_CNTL ) L, H# 00000000 L, H# FF604102 L,
108: H# 168 ( PAD_CTLR_STRENGTH ) L, H# FFFEFFFF L, H# 00001200 L,
109: H# 178 ( MEM_REFRESH_CNTL ) L, H# 00000000 L, H# 88888888 L,
110: H# 17C ( MEM_READ_CNTL ) L, H# 00000000 L, H# B7C20000 L,
111: H# 188 ( MC_DEBUG ) L, H# FFFFFFFF L, H# 00000000 L,
112: H# D00 ( DISP_MISC_CNTL) L, H# 00FFFFFF L, H# 5B000000 L,
113: H# 88C ( TV_DAC_CNTL ) L, H# F800FCEF L, H# 00490200 L,
114: H# D04 ( DAC_MACRO_CNTL) L, H# 00000000 L, H# 00000905 L,
115: H# 284 ( FP_GEN_CNTL ) L, H# FFFFFFFF L, H# 00000008 L,
116: H# 030 ( BUS_CNTL ) L, H# FFFFFFEF L, H# 00000000 L,
117:
118: here INIT1_ARRAY - /L / CONSTANT INIT1_LENGTH
119:
120:
121: CREATE INIT2_ARRAY
122:
123: H# 140 ( MEM_CNTL ) L, H# 00000000 L, H# 38001A01 L, 0 L,
124: H# 158 ( MEM_SDRAM_MODE_REG ) L, H# E0000000 L, H# 08320032 L, 0 L,
125: H# 144 ( MEM_TIMING_CNTL ) L, H# 00000000 L, H# 20123833 L, 0 L,
126: H# 14C ( MC_AGP_LOCATION ) L, H# 00000000 L, H# 000FFFF0 L, 0 L,
127: H# 148 ( MC_FB_LOCATION ) L, H# 00000000 L, H# FFFF0000 L, 0 L,
128: H# 154 ( MEM_INIT_LAT_TIMER ) L, H# 00000000 L, H# 34444444 L, 0 L,
129: H# 18C ( MC_CHP_IO_OE_CNTL ) L, H# 00000000 L, H# 0A540002 L, 0 L,
130: H# 910 ( FCP_CNTL ) L, H# 00000000 L, H# 00000004 L, 0 L,
131: H# 010 ( BIOS_0_SCRATCH ) L, H# FFFFFFFB L, H# 00000004 L, 0 L,
132: H# D64 ( DISP_OUTPUT_CNTL ) L, H# FFFFFBFF L, H# 00000000 L, 0 L,
133: H# 2A8 ( TMDS_PLL_CNTL ) L, H# 00000000 L, H# 00000A1B L, 0 L,
134: H# 800 ( TV_MASTER_CNTL ) L, H# BFFFFFFF L, H# 40000000 L, 0 L,
135: H# D10 ( DISP_TEST_DBUG_CTL ) L, H# EFFFFFFF L, H# 10000000 L, 0 L,
136: H# 4DC ( OV0_FLAG_CNTRL ) L, H# FFFFFEFF L, H# 00000100 L, 0 L,
137: H# 034 ( BUS_CNTL1 ) L, H# 73FFFFFF L, H# 84000000 L, 0 L,
138: H# 174 ( AGP_CNTL ) L, H# FFEFFF00 L, H# 001E0000 L, 0 L,
139: H# 18C ( MC_CHP_IO_OE_CNTL ) L, H# FFFFFFF9 L, H# 00000006 L, h# 000A L,
140: H# 18C ( MC_CHP_IO_OE_CNTL ) L, H# FFFFFFFB L, H# 00000000 L, H# 000A L,
141: H# 18C ( MC_CHP_IO_OE_CNTL ) L, H# FFFFFFFD L, H# 00000000 L, 0 L,
142:
143: here INIT2_ARRAY - /L / CONSTANT INIT2_LENGTH
144:
145: CREATE PLLINIT_ARRAY
146:
147: H# 0D L, H# FFFFFFFF L, H# FFFF8000 L, 0 L,
148: H# 12 L, H# FFFFFFFF L, H# 00350000 L, 0 L,
149: H# 08 L, H# FFFFFFFF L, H# 00000000 L, 0 L,
150: H# 2D L, H# FFFFFFFF L, H# 00000000 L, 0 L,
151: H# 1F L, H# FFFFFFFF L, H# 0000000A L, 5 L,
152: H# 03 L, H# FFFFFFFF L, H# 0000003C L, 0 L,
153: H# 0A L, H# FFFFFFFF L, H# 00252504 L, 0 L,
154: H# 25 L, H# FFFFFFFF L, H# 00000005 L, 0 L,
155: H# 0E L, H# FFFFFFFF L, H# 04756400 L, 0 L,
156: H# 0C L, H# FFFFFFFF L, H# 04006401 L, 0 L,
157: H# 02 L, H# FFFFFFFF L, H# 0000A703 L, 0 L,
158: H# 0F L, H# FFFFFFFF L, H# 0000051C L, 0 L,
159: H# 10 L, H# FFFFFFFF L, H# 04000400 L, 5 L,
160: H# 0E L, H# FFFFFFFD L, H# 00000000 L, 5 L,
161: H# 0E L, H# FFFFFFFE L, H# 00000000 L, 5 L,
162: H# 12 L, H# FFFFFFFF L, H# 00350012 L, 5 L,
163: H# 0F L, H# FFFFFFFE L, H# 00000000 L, 6 L,
164: H# 10 L, H# FFFFFFFE L, H# 00000000 L, 5 L,
165: H# 10 L, H# FFFEFFFF L, H# 00000000 L, 6 L,
166: H# 0F L, H# FFFFFFFD L, H# 00000000 L, 5 L,
167: H# 10 L, H# FFFFFFFD L, H# 00000000 L, 5 L,
168: H# 10 L, H# FFFDFFFF L, H# 00000000 L, d# 10 L,
169: H# 0C L, H# FFFFFFFE L, H# 00000000 L, 6 L,
170: H# 0C L, H# FFFFFFFD L, H# 00000000 L, 5 L,
171: h# 0D L, H# FFFFFFFF L, H# FFFF8007 L, 5 L,
172: H# 08 L, H# FFFFFF3C L, H# 00000000 L, 0 L,
173: H# 02 L, H# FFFFFFFF L, H# 00000003 L, 0 L,
174: H# 04 L, H# FFFFFFFF L, H# 000381C0 L, 0 L,
175: H# 05 L, H# FFFFFFFF L, H# 000381F7 L, 0 L,
176: H# 06 L, H# FFFFFFFF L, H# 000381C0 L, 0 L,
177: H# 07 L, H# FFFFFFFF L, H# 000381F7 L, 0 L,
178: H# 02 L, H# FFFFFFFD L, H# 00000000 L, 6 L,
179: H# 02 L, H# FFFFFFFE L, H# 00000000 L, 5 L,
180: h# 08 L, H# FFFFFF3C L, H# 00000003 L, 5 L,
181: H# 0B L, H# FFFFFFFF L, H# 78000800 L, 0 L,
182: H# 0B L, H# FFFFFFFF L, H# 00004000 L, 0 L,
183: h# 01 L, h# FFFFFFFF L, H# 00000010 L, 0 L,
184:
185: here PLLINIT_ARRAY - /L / CONSTANT PLLINIT_LENGTH
186:
187: CREATE MEMINIT_ARRAY
188: h# 6FFF0000 L, H# 00004000 L, H# 6FFF0000 L, H# 80004000 L,
189: h# 6FFF0000 L, H# 00000132 L, H# 6FFF0000 L, H# 80000132 L,
190: h# 6FFF0000 L, H# 00000032 L, H# 6FFF0000 L, H# 80000032 L,
191: h# 6FFF0000 L, H# 10000032 L,
192: here MEMINIT_ARRAY - /L / CONSTANT MEMINIT_LENGTH
193: : L@+ ( addr -- value addr' )
194:
195: dup l@ swap la1+
196: ;
197:
198: 0 VALUE _len
199:
200: : ENCODE-ARRAY ( array len -- )
201: dup to _len 0 do l@+ swap encode-int rot loop
202: drop _len 1 - 0 ?do encode+ loop
203: ;
204:
205: : andorset ( reg and or -- )
1.1.1.2 ! root 206: 2 pick dup reg-rl@
! 207: 3 pick AND 2 pick OR swap reg-rl! 3drop
1.1 root 208: ;
209:
210: : INIT1
211: H# 0F8 ( CONFIG_MEMSIZE ) H# 00000000 H# 01000000 andorset \ Set 16Mb memory size
212: H# 1C0 ( MPP_TB_CONFIG ) H# 00FFFFFF H# 07000000 andorset
213: H# 030 ( BUS_CNTL ) H# 00000000 H# 5133A3B0 andorset
214: H# 0EC ( RBBM_CNTL ) H# 00000000 h# 00004443 andorset
215: H# 1D0 ( DEBUG_CNTL ) H# FFFFFFFD H# 00000002 andorset
216: H# 050 ( CRTC_GEN_CNTL ) H# 00000000 H# 04000000 andorset
217: H# 058 ( DAC_CNTL ) H# 00000000 H# FF604102 andorset
218: H# 168 ( PAD_CTLR_STRENGTH ) H# FFFEFFFF H# 00001200 andorset
219: H# 178 ( MEM_REFRESH_CNTL ) H# 00000000 H# 88888888 andorset
220: H# 17C ( MEM_READ_CNTL ) H# 00000000 H# B7C20000 andorset
221: H# 188 ( MC_DEBUG ) H# FFFFFFFF H# 00000000 andorset
222: H# D00 ( DISP_MISC_CNTL) H# 00FFFFFF H# 5B000000 andorset
223: H# 88C ( TV_DAC_CNTL ) H# F800FCEF H# 00490200 andorset
224: H# D04 ( DAC_MACRO_CNTL) H# 00000000 H# 00000905 andorset
225: H# 284 ( FP_GEN_CNTL ) H# FFFFFFFF H# 00000008 andorset
226: H# 030 ( BUS_CNTL ) H# FFFFFFEF H# 00000000 andorset
227: ;
228:
229:
230: : INIT2
231: H# 140 ( MEM_CNTL ) H# 00000000 H# 38001A01 andorset
232: H# 158 ( MEM_SDRAM_MODE_REG ) H# E0000000 H# 08320032 andorset
233: H# 144 ( MEM_TIMING_CNTL ) H# 00000000 H# 20123833 andorset
234: H# 14C ( MC_AGP_LOCATION ) H# 00000000 H# 000FFFF0 andorset
235: H# 148 ( MC_FB_LOCATION ) H# 00000000 H# FFFF0000 andorset
236: H# 154 ( MEM_INIT_LAT_TIMER ) H# 00000000 H# 34444444 andorset
237: H# 18C ( MC_CHP_IO_OE_CNTL ) H# 00000000 H# 0A540002 andorset
238: H# 910 ( FCP_CNTL ) H# 00000000 H# 00000004 andorset
239: H# 010 ( BIOS_0_SCRATCH ) H# FFFFFFFB H# 00000004 andorset
240: H# D64 ( DISP_OUTPUT_CNTL ) H# FFFFFBFF H# 00000000 andorset
241: H# 2A8 ( TMDS_PLL_CNTL ) H# 00000000 H# 00000A1B andorset
242: H# 800 ( TV_MASTER_CNTL ) H# BFFFFFFF H# 40000000 andorset
243: H# D10 ( DISP_TEST_DEBUG_CTL ) H# EFFFFFFF H# 10000000 andorset
244: H# 4DC ( OV0_FLAG_CNTRL ) H# FFFFFEFF H# 00000100 andorset
245: H# 034 ( BUS_CNTL1 ) H# 73FFFFFF H# 84000000 andorset
246: H# 174 ( AGP_CNTL ) H# FFEFFF00 H# 001E0000 andorset
247: H# 18C ( MC_CHP_IO_OE_CNTL ) H# FFFFFFF9 H# 00000006 andorset h# 000A ms
248: H# 18C ( MC_CHP_IO_OE_CNTL ) H# FFFFFFFB H# 00000000 andorset H# 000A ms
249: H# 18C ( MC_CHP_IO_OE_CNTL ) H# FFFFFFFD H# 00000000 andorset
250: ;
251:
252: : CLK-CNTL-INDEX! 8 ( CLK_CNTL_INDEX ) reg-rl! ;
253:
254: : CLK-CNTL-INDEX@ 8 ( CLK_CNTL_INDEX ) reg-rl@ ;
255:
256: : PLLWRITEON clk-cntl-index@ H# 80 ( PLL_WR_ENABLE ) or clk-cntl-index! ;
257:
258: : PLLWRITEOFF clk-cntl-index@ H# 80 ( PLL_WR_ENABLE ) not and clk-cntl-index! ; \ Remove PLL_WR_ENABLE
259:
260: : CLKDATA! h# 0c ( CLK_CNTL_DATA ) reg-rl! ;
261:
262: : CLKDATA@ h# 0c ( CLK_CNTL_DATA ) reg-rl@ ;
263:
264: : PLLINDEXSET clk-cntl-index@ h# FFFFFFC0 and or clk-cntl-index! ;
265:
266: : PLLSET swap pllindexset clkdata! ;
267:
268: : pllandorset ( index and or -- )
269: 2 pick pllindexset clkdata@
270: 2 pick AND over OR clkdata! 3drop
271: ;
272:
273: : PLLINIT
274: pllwriteon
275: H# 0D H# FFFF8000 pllset
276: H# 12 H# 00350000 pllset
277: H# 08 H# 00000000 pllset
278: H# 2D H# 00000000 pllset
279: H# 1F H# 0000000A pllset 5 ms
280:
281: H# 03 H# 0000003C pllset
282: H# 0A H# 00252504 pllset
283: H# 25 H# 00000005 pllset
284: H# 0E H# 04756400 pllset
285: H# 0C H# 04006401 pllset
286: H# 02 H# 0000A703 pllset
287: H# 0F H# 0000051C pllset
288: H# 10 H# 04000400 pllset 5 ms
289:
290: H# 0E H# FFFFFFFD 00 pllandorset 5 ms
291: H# 0E H# FFFFFFFE 00 pllandorset 5 ms
292: H# 12 H# 00350012 pllset 5 ms
293: H# 0F H# FFFFFFFE 00 pllandorset 6 ms
294: H# 10 H# FFFFFFFE 00 pllandorset 5 ms
295: H# 10 H# FFFEFFFF 00 pllandorset 6 ms
296: H# 0F H# FFFFFFFD 00 pllandorset 5 ms
297: H# 10 H# FFFFFFFD 00 pllandorset 5 ms
298: H# 10 H# FFFDFFFF 00 pllandorset d# 10 ms
299: H# 0C H# FFFFFFFE 00 pllandorset 6 ms
300: H# 0C H# FFFFFFFD 00 pllandorset 5 ms
301: h# 0D h# FFFF8007 pllset 5 ms
302: H# 08 H# FFFFFF3C 00 pllandorset
303: H# 02 h# FFFFFFFF 03 pllandorset
304: H# 04 H# 000381C0 pllset
305: H# 05 H# 000381F7 pllset
306: H# 06 H# 000381C0 pllset
307: H# 07 H# 000381F7 pllset
308: H# 02 H# FFFFFFFD 00 pllandorset 6 ms
309: H# 02 h# FFFFFFFE 00 pllandorset 5 ms
310: h# 08 H# FFFFFF3C 03 pllandorset 5 ms
311: H# 0B h# 78000800 pllset
312: H# 0B H# FFFFFFFF h# 4000 pllandorset
313: h# 01 h# FFFFFFFF h# 0010 pllandorset
314:
315: pllwriteoff
316: ;
317:
318: : DYNCKE
319: pllwriteon
320: H# 14 H# FFFF3FFF H# 30 pllandorset
321: H# 14 H# FF1FFFFF H# 00 pllandorset
322: H# 01 h# FFFFFFFF h# 80 pllandorset
323: H# 0D H# 00000007 pllset 5 ms
324: h# 2D H# 0000F8C0 pllset
325: h# 08 H# FFFFFFFF h# C0 pllandorset 5 ms
326: pllwriteoff
327: ;
328:
329: : MEM-MODE@
330: h# 158 ( MEM_SDRAM_MODE_REG ) reg-rl@ ;
331:
332: : MEM-MODE!
333: h# 158 ( MEM_SDRAM_MODE_REG ) reg-rl! ;
334:
335: : MEM-STATUS@
336: H# 150 reg-rl@ ;
337:
338: : WAIT-MEM-CMPLT
339: h# 8000 0 do mem-status@ 3 and 3 = if leave then loop ;
340:
341: : INITMEM
342:
343: mem-mode@ h# 6FFF0000 and h# 4000 or mem-mode!
344: mem-mode@ h# 6FFF0000 and h# 80004000 or mem-mode!
345: wait-mem-cmplt
346: mem-mode@ h# 6FFF0000 and h# 0132 or mem-mode!
347: mem-mode@ h# 6FFF0000 and h# 80000132 or mem-mode!
348: wait-mem-cmplt
349: mem-mode@ h# 6FFF0000 and h# 0032 or mem-mode!
350: mem-mode@ h# 6FFF0000 and h# 80000032 or mem-mode!
351: wait-mem-cmplt
352: mem-mode@ h# 6FFF0000 and h# 10000032 or mem-mode!
353: ;
354:
355:
356:
357: : CLR-REG ( reg -- )
358: 0 swap reg-rl!
359:
360: ;
361: : SET-PALETTE ( -- )
362: h# 0 h# b0 pc! \ Reset PALETTE_INDEX
363:
364: d# 16 0 do
365: H# 000000 h# B4 reg-rl! \ Write the PALETTE_DATA ( Auto increments)
366: H# aa0000 H# B4 reg-rl!
367: H# 00aa00 H# B4 reg-rl!
368: H# aa5500 H# B4 reg-rl!
369: H# 0000aa H# B4 reg-rl!
370: H# aa00aa H# B4 reg-rl!
371: H# 00aaaa H# B4 reg-rl!
372: H# aaaaaa H# B4 reg-rl!
373: H# 555555 H# B4 reg-rl!
374: H# ff5555 H# B4 reg-rl!
375: H# 55ff55 H# B4 reg-rl!
376: H# ffff55 H# B4 reg-rl!
377: H# 5555ff H# B4 reg-rl!
378: H# ff55ff H# B4 reg-rl!
379: H# 55ffff H# B4 reg-rl!
380: H# ffffff H# B4 reg-rl!
381: loop
382:
383: ;
384:
385: 0 VALUE _addr
386: 0 VALUE _color
387:
388: : DO-COLOR ( color-addr addr color -- )
389: to _color to _addr 0 to _color
390: 3 0 do _addr i + c@ 2 i - 8 * << _color + to _color loop
391: _color h# B4 reg-rl!
392: ;
393:
394: : SET-COLORS ( addr index #indicies -- )
395:
396: swap h# B0 pc!
397: ( addr #indicies ) 0 ?do dup ( index ) i 3 * + DO-COLOR loop
398: ( addr ) drop ;
399:
400: : init-card
401:
402: h# FF h# 58 3 + pc! \
403: h# 59 pc@ h# FE and h# 59 pc! \
404: h# 50 reg-rl@ H# FEFFFFFF AND h# 02000200 or \ Clear 24 set 25 and 8-11 to 2
405: h# 50 reg-rl!
406: h# 4F0063 h# 200 reg-rl!
407: H# 8C02A2 h# 204 reg-rl!
408: H# 1Df020C h# 208 reg-rl!
409: h# 8201EA h# 20C reg-rl!
410: h# 50 reg-rl@ H# F8FFFFFF AND h# 03000000 or h# 50 reg-rl!
411: h# 50 h# 22C reg-rl!
412: set-palette
413:
414: \ at this point for some reason mem-addr does not point
415: \ to the right address and therefore the following command
416: \ which should probably clean the frame buffer just
417: \ overwrites everything starting from 0 including the
418: \ exception vectors
419:
420: \ mem-addr h# F0000 0 fill
421: ;
422:
423: : DO-INIT
424: early-map
425: enable-card
426: init1
427: pllinit
428: init2
429: initmem
430: init-card
431: h# 8020 h# 54 reg-rl!
432: early-unmap
433: ;
434:
435: d# 640 constant /scanline
436: d# 480 constant #scanlines
437: /scanline #scanlines * constant /fb
438:
439: " okay" encode-string " status" property
440:
441: : display-install ( -- )
442: is_installed not if
443: map-csr-base
444: enable-card
445: mem-addr to frame-buffer-adr
446: h# 8020 h# 54 reg-rl!
447: default-font set-font
448: /scanline #scanlines d# 100 d# 40 fb8-install
449: true to is_installed
450: then
451: ;
452:
453: : display-remove ( -- ) ;
454:
455: do-init \ Set up the card
456: \ clear at least 640x480
457: 10 config-l@ 8 - F0000 0 rfill
458: init1_array init1_length encode-array " ibm,init1" property
459: init2_array init2_length encode-array " ibm,init2" property
460: pllinit_array pllinit_length encode-array " ibm,pllinit" property
461: meminit_array meminit_length encode-array " ibm,meminit" property
462: 0 0 encode-bytes " iso6429-1983-colors" property
463: " display" encode-string " device_type" property
464: /scanline encode-int " width" property
465: #scanlines encode-int " height" property
466: 8 encode-int " depth" property
467: /scanline encode-int " linebytes" property
468:
469: ' display-install is-install
470: ' display-remove is-remove
471:
472: : fill-rectangle ( index x y w h -- )
473: 2swap -rot /scanline * + frame-buffer-adr + ( index w h fbadr )
474: swap 0 ?do ( index w fbadr )
475: 3dup swap rot fill ( index w fbadr )
476: /scanline + ( index w fbadr' )
477: loop
478: 3drop
479: ;
480: : draw-rectangle ( addr x y w h -- )
481: 2swap -rot /scanline * + frame-buffer-adr + ( addr w h fbadr )
482: swap 0 ?do ( addr w fbadr )
483: 3dup swap move ( addr w fbadr )
484: >r tuck + swap r> ( addr' w fbadr )
485: /scanline + ( addr' w fbadr' )
486: loop
487: 3drop
488: ;
489: : read-rectangle ( addr x y w h -- )
490: 2swap -rot /scanline * + frame-buffer-adr + ( addr w h fbadr )
491: swap 0 ?do ( addr w fbadr )
492: 3dup -rot move ( addr w fbadr )
493: >r tuck + swap r> ( addr' w fbadr )
494: /scanline + ( addr' w fbadr' )
495: loop
496: 3drop
497: ;
498:
499: : dimensions ( -- width height ) /scanline #scanlines ;
500:
501: ." ( rn50 )" cr
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