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Annotation of qemu/roms/ipxe/src/arch/i386/include/pic8259.h, revision 1.1.1.1

1.1       root        1: /*
                      2:  * Basic support for controlling the 8259 Programmable Interrupt Controllers.
                      3:  *
                      4:  * Initially written by Michael Brown (mcb30).
                      5:  */
                      6: 
                      7: FILE_LICENCE ( GPL2_OR_LATER );
                      8: 
                      9: #ifndef PIC8259_H
                     10: #define PIC8259_H
                     11: 
                     12: /* For segoff_t */
                     13: #include "realmode.h"
                     14: 
                     15: #define IRQ_PIC_CUTOFF 8
                     16: 
                     17: /* 8259 register locations */
                     18: #define PIC1_ICW1 0x20
                     19: #define PIC1_OCW2 0x20
                     20: #define PIC1_OCW3 0x20
                     21: #define PIC1_ICR 0x20
                     22: #define PIC1_IRR 0x20
                     23: #define PIC1_ISR 0x20
                     24: #define PIC1_ICW2 0x21
                     25: #define PIC1_ICW3 0x21
                     26: #define PIC1_ICW4 0x21
                     27: #define PIC1_IMR 0x21
                     28: #define PIC2_ICW1 0xa0
                     29: #define PIC2_OCW2 0xa0
                     30: #define PIC2_OCW3 0xa0
                     31: #define PIC2_ICR 0xa0
                     32: #define PIC2_IRR 0xa0
                     33: #define PIC2_ISR 0xa0
                     34: #define PIC2_ICW2 0xa1
                     35: #define PIC2_ICW3 0xa1
                     36: #define PIC2_ICW4 0xa1
                     37: #define PIC2_IMR 0xa1
                     38: 
                     39: /* Register command values */
                     40: #define OCW3_ID 0x08
                     41: #define OCW3_READ_IRR 0x03
                     42: #define OCW3_READ_ISR 0x02
                     43: #define ICR_EOI_NON_SPECIFIC 0x20
                     44: #define ICR_EOI_NOP 0x40
                     45: #define ICR_EOI_SPECIFIC 0x60
                     46: #define ICR_EOI_SET_PRIORITY 0xc0
                     47: 
                     48: /* Macros to enable/disable IRQs */
                     49: #define IMR_REG(x) ( (x) < IRQ_PIC_CUTOFF ? PIC1_IMR : PIC2_IMR )
                     50: #define IMR_BIT(x) ( 1 << ( (x) % IRQ_PIC_CUTOFF ) )
                     51: #define irq_enabled(x) ( ( inb ( IMR_REG(x) ) & IMR_BIT(x) ) == 0 )
                     52: #define enable_irq(x) outb ( inb( IMR_REG(x) ) & ~IMR_BIT(x), IMR_REG(x) )
                     53: #define disable_irq(x) outb ( inb( IMR_REG(x) ) | IMR_BIT(x), IMR_REG(x) )
                     54: 
                     55: /* Macros for acknowledging IRQs */
                     56: #define ICR_REG( irq ) ( (irq) < IRQ_PIC_CUTOFF ? PIC1_ICR : PIC2_ICR )
                     57: #define ICR_VALUE( irq ) ( (irq) % IRQ_PIC_CUTOFF )
                     58: #define CHAINED_IRQ 2
                     59: 
                     60: /* Utility macros to convert IRQ numbers to INT numbers and INT vectors  */
                     61: #define IRQ_INT( irq ) ( ( ( (irq) - IRQ_PIC_CUTOFF ) ^ 0x70 ) & 0x7f )
                     62: 
                     63: /* Other constants */
                     64: #define IRQ_MAX 15
                     65: #define IRQ_NONE -1U
                     66: 
                     67: /* Function prototypes
                     68:  */
                     69: void send_eoi ( unsigned int irq );
                     70: 
                     71: #endif /* PIC8259_H */

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