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1.1 root 1: /*
2: * Copyright (C) 2008 Michael Brown <[email protected]>.
3: *
4: * This program is free software; you can redistribute it and/or
5: * modify it under the terms of the GNU General Public License as
6: * published by the Free Software Foundation; either version 2 of the
7: * License, or any later version.
8: *
9: * This program is distributed in the hope that it will be useful, but
10: * WITHOUT ANY WARRANTY; without even the implied warranty of
11: * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12: * General Public License for more details.
13: *
14: * You should have received a copy of the GNU General Public License
15: * along with this program; if not, write to the Free Software
16: * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
17: */
18:
19: FILE_LICENCE ( GPL2_OR_LATER );
20:
21: #include <stdint.h>
22: #include <stdlib.h>
23: #include <errno.h>
24: #include <unistd.h>
25: #include <assert.h>
26: #include <ipxe/io.h>
27: #include <ipxe/pci.h>
28: #include <ipxe/infiniband.h>
29: #include <ipxe/i2c.h>
30: #include <ipxe/bitbash.h>
31: #include <ipxe/malloc.h>
32: #include <ipxe/iobuf.h>
33: #include "linda.h"
34:
35: /**
36: * @file
37: *
38: * QLogic Linda Infiniband HCA
39: *
40: */
41:
42: /** A Linda send work queue */
43: struct linda_send_work_queue {
44: /** Send buffer usage */
45: uint8_t *send_buf;
46: /** Producer index */
47: unsigned int prod;
48: /** Consumer index */
49: unsigned int cons;
50: };
51:
52: /** A Linda receive work queue */
53: struct linda_recv_work_queue {
54: /** Receive header ring */
55: void *header;
56: /** Receive header producer offset (written by hardware) */
57: struct QIB_7220_scalar header_prod;
58: /** Receive header consumer offset */
59: unsigned int header_cons;
60: /** Offset within register space of the eager array */
61: unsigned long eager_array;
62: /** Number of entries in eager array */
63: unsigned int eager_entries;
64: /** Eager array producer index */
65: unsigned int eager_prod;
66: /** Eager array consumer index */
67: unsigned int eager_cons;
68: };
69:
70: /** A Linda HCA */
71: struct linda {
72: /** Registers */
73: void *regs;
74:
75: /** In-use contexts */
76: uint8_t used_ctx[LINDA_NUM_CONTEXTS];
77: /** Send work queues */
78: struct linda_send_work_queue send_wq[LINDA_NUM_CONTEXTS];
79: /** Receive work queues */
80: struct linda_recv_work_queue recv_wq[LINDA_NUM_CONTEXTS];
81:
82: /** Offset within register space of the first send buffer */
83: unsigned long send_buffer_base;
84: /** Send buffer availability (reported by hardware) */
85: struct QIB_7220_SendBufAvail *sendbufavail;
86: /** Send buffer availability (maintained by software) */
87: uint8_t send_buf[LINDA_MAX_SEND_BUFS];
88: /** Send buffer availability producer counter */
89: unsigned int send_buf_prod;
90: /** Send buffer availability consumer counter */
91: unsigned int send_buf_cons;
92: /** Number of reserved send buffers (across all QPs) */
93: unsigned int reserved_send_bufs;
94:
95: /** I2C bit-bashing interface */
96: struct i2c_bit_basher i2c;
97: /** I2C serial EEPROM */
98: struct i2c_device eeprom;
99: };
100:
101: /***************************************************************************
102: *
103: * Linda register access
104: *
105: ***************************************************************************
106: *
107: * This card requires atomic 64-bit accesses. Strange things happen
108: * if you try to use 32-bit accesses; sometimes they work, sometimes
109: * they don't, sometimes you get random data.
110: *
111: * These accessors use the "movq" MMX instruction, and so won't work
112: * on really old Pentiums (which won't have PCIe anyway, so this is
113: * something of a moot point).
114: */
115:
116: /**
117: * Read Linda qword register
118: *
119: * @v linda Linda device
120: * @v dwords Register buffer to read into
121: * @v offset Register offset
122: */
123: static void linda_readq ( struct linda *linda, uint32_t *dwords,
124: unsigned long offset ) {
125: void *addr = ( linda->regs + offset );
126:
127: __asm__ __volatile__ ( "movq (%1), %%mm0\n\t"
128: "movq %%mm0, (%0)\n\t"
129: : : "r" ( dwords ), "r" ( addr ) : "memory" );
130:
131: DBGIO ( "[%08lx] => %08x%08x\n",
132: virt_to_phys ( addr ), dwords[1], dwords[0] );
133: }
134: #define linda_readq( _linda, _ptr, _offset ) \
135: linda_readq ( (_linda), (_ptr)->u.dwords, (_offset) )
136: #define linda_readq_array8b( _linda, _ptr, _offset, _idx ) \
137: linda_readq ( (_linda), (_ptr), ( (_offset) + ( (_idx) * 8 ) ) )
138: #define linda_readq_array64k( _linda, _ptr, _offset, _idx ) \
139: linda_readq ( (_linda), (_ptr), ( (_offset) + ( (_idx) * 65536 ) ) )
140:
141: /**
142: * Write Linda qword register
143: *
144: * @v linda Linda device
145: * @v dwords Register buffer to write
146: * @v offset Register offset
147: */
148: static void linda_writeq ( struct linda *linda, const uint32_t *dwords,
149: unsigned long offset ) {
150: void *addr = ( linda->regs + offset );
151:
152: DBGIO ( "[%08lx] <= %08x%08x\n",
153: virt_to_phys ( addr ), dwords[1], dwords[0] );
154:
155: __asm__ __volatile__ ( "movq (%0), %%mm0\n\t"
156: "movq %%mm0, (%1)\n\t"
157: : : "r" ( dwords ), "r" ( addr ) : "memory" );
158: }
159: #define linda_writeq( _linda, _ptr, _offset ) \
160: linda_writeq ( (_linda), (_ptr)->u.dwords, (_offset) )
161: #define linda_writeq_array8b( _linda, _ptr, _offset, _idx ) \
162: linda_writeq ( (_linda), (_ptr), ( (_offset) + ( (_idx) * 8 ) ) )
163: #define linda_writeq_array64k( _linda, _ptr, _offset, _idx ) \
164: linda_writeq ( (_linda), (_ptr), ( (_offset) + ( (_idx) * 65536 ) ) )
165:
166: /**
167: * Write Linda dword register
168: *
169: * @v linda Linda device
170: * @v dword Value to write
171: * @v offset Register offset
172: */
173: static void linda_writel ( struct linda *linda, uint32_t dword,
174: unsigned long offset ) {
175: writel ( dword, ( linda->regs + offset ) );
176: }
177:
178: /***************************************************************************
179: *
180: * Link state management
181: *
182: ***************************************************************************
183: */
184:
185: /**
186: * Textual representation of link state
187: *
188: * @v link_state Link state
189: * @ret link_text Link state text
190: */
191: static const char * linda_link_state_text ( unsigned int link_state ) {
192: switch ( link_state ) {
193: case LINDA_LINK_STATE_DOWN: return "DOWN";
194: case LINDA_LINK_STATE_INIT: return "INIT";
195: case LINDA_LINK_STATE_ARM: return "ARM";
196: case LINDA_LINK_STATE_ACTIVE: return "ACTIVE";
197: case LINDA_LINK_STATE_ACT_DEFER:return "ACT_DEFER";
198: default: return "UNKNOWN";
199: }
200: }
201:
202: /**
203: * Handle link state change
204: *
205: * @v linda Linda device
206: */
207: static void linda_link_state_changed ( struct ib_device *ibdev ) {
208: struct linda *linda = ib_get_drvdata ( ibdev );
209: struct QIB_7220_IBCStatus ibcstatus;
210: struct QIB_7220_EXTCtrl extctrl;
211: unsigned int link_state;
212: unsigned int link_width;
213: unsigned int link_speed;
214:
215: /* Read link state */
216: linda_readq ( linda, &ibcstatus, QIB_7220_IBCStatus_offset );
217: link_state = BIT_GET ( &ibcstatus, LinkState );
218: link_width = BIT_GET ( &ibcstatus, LinkWidthActive );
219: link_speed = BIT_GET ( &ibcstatus, LinkSpeedActive );
220: DBGC ( linda, "Linda %p link state %s (%s %s)\n", linda,
221: linda_link_state_text ( link_state ),
222: ( link_speed ? "DDR" : "SDR" ), ( link_width ? "x4" : "x1" ) );
223:
224: /* Set LEDs according to link state */
225: linda_readq ( linda, &extctrl, QIB_7220_EXTCtrl_offset );
226: BIT_SET ( &extctrl, LEDPriPortGreenOn,
227: ( ( link_state >= LINDA_LINK_STATE_INIT ) ? 1 : 0 ) );
228: BIT_SET ( &extctrl, LEDPriPortYellowOn,
229: ( ( link_state >= LINDA_LINK_STATE_ACTIVE ) ? 1 : 0 ) );
230: linda_writeq ( linda, &extctrl, QIB_7220_EXTCtrl_offset );
231:
232: /* Notify Infiniband core of link state change */
233: ibdev->port_state = ( link_state + 1 );
234: ibdev->link_width_active =
235: ( link_width ? IB_LINK_WIDTH_4X : IB_LINK_WIDTH_1X );
236: ibdev->link_speed_active =
237: ( link_speed ? IB_LINK_SPEED_DDR : IB_LINK_SPEED_SDR );
238: ib_link_state_changed ( ibdev );
239: }
240:
241: /**
242: * Wait for link state change to take effect
243: *
244: * @v linda Linda device
245: * @v new_link_state Expected link state
246: * @ret rc Return status code
247: */
248: static int linda_link_state_check ( struct linda *linda,
249: unsigned int new_link_state ) {
250: struct QIB_7220_IBCStatus ibcstatus;
251: unsigned int link_state;
252: unsigned int i;
253:
254: for ( i = 0 ; i < LINDA_LINK_STATE_MAX_WAIT_US ; i++ ) {
255: linda_readq ( linda, &ibcstatus, QIB_7220_IBCStatus_offset );
256: link_state = BIT_GET ( &ibcstatus, LinkState );
257: if ( link_state == new_link_state )
258: return 0;
259: udelay ( 1 );
260: }
261:
262: DBGC ( linda, "Linda %p timed out waiting for link state %s\n",
263: linda, linda_link_state_text ( link_state ) );
264: return -ETIMEDOUT;
265: }
266:
267: /**
268: * Set port information
269: *
270: * @v ibdev Infiniband device
271: * @v mad Set port information MAD
272: */
273: static int linda_set_port_info ( struct ib_device *ibdev, union ib_mad *mad ) {
274: struct linda *linda = ib_get_drvdata ( ibdev );
275: struct ib_port_info *port_info = &mad->smp.smp_data.port_info;
276: struct QIB_7220_IBCCtrl ibcctrl;
277: unsigned int port_state;
278: unsigned int link_state;
279:
280: /* Set new link state */
281: port_state = ( port_info->link_speed_supported__port_state & 0xf );
282: if ( port_state ) {
283: link_state = ( port_state - 1 );
284: DBGC ( linda, "Linda %p set link state to %s (%x)\n", linda,
285: linda_link_state_text ( link_state ), link_state );
286: linda_readq ( linda, &ibcctrl, QIB_7220_IBCCtrl_offset );
287: BIT_SET ( &ibcctrl, LinkCmd, link_state );
288: linda_writeq ( linda, &ibcctrl, QIB_7220_IBCCtrl_offset );
289:
290: /* Wait for link state change to take effect. Ignore
291: * errors; the current link state will be returned via
292: * the GetResponse MAD.
293: */
294: linda_link_state_check ( linda, link_state );
295: }
296:
297: /* Detect and report link state change */
298: linda_link_state_changed ( ibdev );
299:
300: return 0;
301: }
302:
303: /**
304: * Set partition key table
305: *
306: * @v ibdev Infiniband device
307: * @v mad Set partition key table MAD
308: */
309: static int linda_set_pkey_table ( struct ib_device *ibdev __unused,
310: union ib_mad *mad __unused ) {
311: /* Nothing to do */
312: return 0;
313: }
314:
315: /***************************************************************************
316: *
317: * Context allocation
318: *
319: ***************************************************************************
320: */
321:
322: /**
323: * Map context number to QPN
324: *
325: * @v ctx Context index
326: * @ret qpn Queue pair number
327: */
328: static int linda_ctx_to_qpn ( unsigned int ctx ) {
329: /* This mapping is fixed by hardware */
330: return ( ctx * 2 );
331: }
332:
333: /**
334: * Map QPN to context number
335: *
336: * @v qpn Queue pair number
337: * @ret ctx Context index
338: */
339: static int linda_qpn_to_ctx ( unsigned int qpn ) {
340: /* This mapping is fixed by hardware */
341: return ( qpn / 2 );
342: }
343:
344: /**
345: * Allocate a context
346: *
347: * @v linda Linda device
348: * @ret ctx Context index, or negative error
349: */
350: static int linda_alloc_ctx ( struct linda *linda ) {
351: unsigned int ctx;
352:
353: for ( ctx = 0 ; ctx < LINDA_NUM_CONTEXTS ; ctx++ ) {
354:
355: if ( ! linda->used_ctx[ctx] ) {
356: linda->used_ctx[ctx ] = 1;
357: DBGC2 ( linda, "Linda %p CTX %d allocated\n",
358: linda, ctx );
359: return ctx;
360: }
361: }
362:
363: DBGC ( linda, "Linda %p out of available contexts\n", linda );
364: return -ENOENT;
365: }
366:
367: /**
368: * Free a context
369: *
370: * @v linda Linda device
371: * @v ctx Context index
372: */
373: static void linda_free_ctx ( struct linda *linda, unsigned int ctx ) {
374:
375: linda->used_ctx[ctx] = 0;
376: DBGC2 ( linda, "Linda %p CTX %d freed\n", linda, ctx );
377: }
378:
379: /***************************************************************************
380: *
381: * Send datapath
382: *
383: ***************************************************************************
384: */
385:
386: /** Send buffer toggle bit
387: *
388: * We encode send buffers as 7 bits of send buffer index plus a single
389: * bit which should match the "check" bit in the SendBufAvail array.
390: */
391: #define LINDA_SEND_BUF_TOGGLE 0x80
392:
393: /**
394: * Allocate a send buffer
395: *
396: * @v linda Linda device
397: * @ret send_buf Send buffer
398: *
399: * You must guarantee that a send buffer is available. This is done
400: * by refusing to allocate more TX WQEs in total than the number of
401: * available send buffers.
402: */
403: static unsigned int linda_alloc_send_buf ( struct linda *linda ) {
404: unsigned int send_buf;
405:
406: send_buf = linda->send_buf[linda->send_buf_cons];
407: send_buf ^= LINDA_SEND_BUF_TOGGLE;
408: linda->send_buf_cons = ( ( linda->send_buf_cons + 1 ) %
409: LINDA_MAX_SEND_BUFS );
410: return send_buf;
411: }
412:
413: /**
414: * Free a send buffer
415: *
416: * @v linda Linda device
417: * @v send_buf Send buffer
418: */
419: static void linda_free_send_buf ( struct linda *linda,
420: unsigned int send_buf ) {
421: linda->send_buf[linda->send_buf_prod] = send_buf;
422: linda->send_buf_prod = ( ( linda->send_buf_prod + 1 ) %
423: LINDA_MAX_SEND_BUFS );
424: }
425:
426: /**
427: * Check to see if send buffer is in use
428: *
429: * @v linda Linda device
430: * @v send_buf Send buffer
431: * @ret in_use Send buffer is in use
432: */
433: static int linda_send_buf_in_use ( struct linda *linda,
434: unsigned int send_buf ) {
435: unsigned int send_idx;
436: unsigned int send_check;
437: unsigned int inusecheck;
438: unsigned int inuse;
439: unsigned int check;
440:
441: send_idx = ( send_buf & ~LINDA_SEND_BUF_TOGGLE );
442: send_check = ( !! ( send_buf & LINDA_SEND_BUF_TOGGLE ) );
443: inusecheck = BIT_GET ( linda->sendbufavail, InUseCheck[send_idx] );
444: inuse = ( !! ( inusecheck & 0x02 ) );
445: check = ( !! ( inusecheck & 0x01 ) );
446: return ( inuse || ( check != send_check ) );
447: }
448:
449: /**
450: * Calculate starting offset for send buffer
451: *
452: * @v linda Linda device
453: * @v send_buf Send buffer
454: * @ret offset Starting offset
455: */
456: static unsigned long linda_send_buffer_offset ( struct linda *linda,
457: unsigned int send_buf ) {
458: return ( linda->send_buffer_base +
459: ( ( send_buf & ~LINDA_SEND_BUF_TOGGLE ) *
460: LINDA_SEND_BUF_SIZE ) );
461: }
462:
463: /**
464: * Create send work queue
465: *
466: * @v linda Linda device
467: * @v qp Queue pair
468: */
469: static int linda_create_send_wq ( struct linda *linda,
470: struct ib_queue_pair *qp ) {
471: struct ib_work_queue *wq = &qp->send;
472: struct linda_send_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
473: int rc;
474:
475: /* Reserve send buffers */
476: if ( ( linda->reserved_send_bufs + qp->send.num_wqes ) >
477: LINDA_MAX_SEND_BUFS ) {
478: DBGC ( linda, "Linda %p out of send buffers (have %d, used "
479: "%d, need %d)\n", linda, LINDA_MAX_SEND_BUFS,
480: linda->reserved_send_bufs, qp->send.num_wqes );
481: rc = -ENOBUFS;
482: goto err_reserve_bufs;
483: }
484: linda->reserved_send_bufs += qp->send.num_wqes;
485:
486: /* Reset work queue */
487: linda_wq->prod = 0;
488: linda_wq->cons = 0;
489:
490: /* Allocate space for send buffer uasge list */
491: linda_wq->send_buf = zalloc ( qp->send.num_wqes *
492: sizeof ( linda_wq->send_buf[0] ) );
493: if ( ! linda_wq->send_buf ) {
494: rc = -ENOBUFS;
495: goto err_alloc_send_buf;
496: }
497:
498: return 0;
499:
500: free ( linda_wq->send_buf );
501: err_alloc_send_buf:
502: linda->reserved_send_bufs -= qp->send.num_wqes;
503: err_reserve_bufs:
504: return rc;
505: }
506:
507: /**
508: * Destroy send work queue
509: *
510: * @v linda Linda device
511: * @v qp Queue pair
512: */
513: static void linda_destroy_send_wq ( struct linda *linda,
514: struct ib_queue_pair *qp ) {
515: struct ib_work_queue *wq = &qp->send;
516: struct linda_send_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
517:
518: free ( linda_wq->send_buf );
519: linda->reserved_send_bufs -= qp->send.num_wqes;
520: }
521:
522: /**
523: * Initialise send datapath
524: *
525: * @v linda Linda device
526: * @ret rc Return status code
527: */
528: static int linda_init_send ( struct linda *linda ) {
529: struct QIB_7220_SendBufBase sendbufbase;
530: struct QIB_7220_SendBufAvailAddr sendbufavailaddr;
531: struct QIB_7220_SendCtrl sendctrl;
532: unsigned int i;
533: int rc;
534:
535: /* Retrieve SendBufBase */
536: linda_readq ( linda, &sendbufbase, QIB_7220_SendBufBase_offset );
537: linda->send_buffer_base = BIT_GET ( &sendbufbase,
538: BaseAddr_SmallPIO );
539: DBGC ( linda, "Linda %p send buffers at %lx\n",
540: linda, linda->send_buffer_base );
541:
542: /* Initialise the send_buf[] array */
543: for ( i = 0 ; i < LINDA_MAX_SEND_BUFS ; i++ )
544: linda->send_buf[i] = i;
545:
546: /* Allocate space for the SendBufAvail array */
547: linda->sendbufavail = malloc_dma ( sizeof ( *linda->sendbufavail ),
548: LINDA_SENDBUFAVAIL_ALIGN );
549: if ( ! linda->sendbufavail ) {
550: rc = -ENOMEM;
551: goto err_alloc_sendbufavail;
552: }
553: memset ( linda->sendbufavail, 0, sizeof ( linda->sendbufavail ) );
554:
555: /* Program SendBufAvailAddr into the hardware */
556: memset ( &sendbufavailaddr, 0, sizeof ( sendbufavailaddr ) );
557: BIT_FILL_1 ( &sendbufavailaddr, SendBufAvailAddr,
558: ( virt_to_bus ( linda->sendbufavail ) >> 6 ) );
559: linda_writeq ( linda, &sendbufavailaddr,
560: QIB_7220_SendBufAvailAddr_offset );
561:
562: /* Enable sending and DMA of SendBufAvail */
563: memset ( &sendctrl, 0, sizeof ( sendctrl ) );
564: BIT_FILL_2 ( &sendctrl,
565: SendBufAvailUpd, 1,
566: SPioEnable, 1 );
567: linda_writeq ( linda, &sendctrl, QIB_7220_SendCtrl_offset );
568:
569: return 0;
570:
571: free_dma ( linda->sendbufavail, sizeof ( *linda->sendbufavail ) );
572: err_alloc_sendbufavail:
573: return rc;
574: }
575:
576: /**
577: * Shut down send datapath
578: *
579: * @v linda Linda device
580: */
581: static void linda_fini_send ( struct linda *linda ) {
582: struct QIB_7220_SendCtrl sendctrl;
583:
584: /* Disable sending and DMA of SendBufAvail */
585: memset ( &sendctrl, 0, sizeof ( sendctrl ) );
586: linda_writeq ( linda, &sendctrl, QIB_7220_SendCtrl_offset );
587: mb();
588:
589: /* Ensure hardware has seen this disable */
590: linda_readq ( linda, &sendctrl, QIB_7220_SendCtrl_offset );
591:
592: free_dma ( linda->sendbufavail, sizeof ( *linda->sendbufavail ) );
593: }
594:
595: /***************************************************************************
596: *
597: * Receive datapath
598: *
599: ***************************************************************************
600: */
601:
602: /**
603: * Create receive work queue
604: *
605: * @v linda Linda device
606: * @v qp Queue pair
607: * @ret rc Return status code
608: */
609: static int linda_create_recv_wq ( struct linda *linda,
610: struct ib_queue_pair *qp ) {
611: struct ib_work_queue *wq = &qp->recv;
612: struct linda_recv_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
613: struct QIB_7220_RcvHdrAddr0 rcvhdraddr;
614: struct QIB_7220_RcvHdrTailAddr0 rcvhdrtailaddr;
615: struct QIB_7220_RcvHdrHead0 rcvhdrhead;
616: struct QIB_7220_scalar rcvegrindexhead;
617: struct QIB_7220_RcvCtrl rcvctrl;
618: unsigned int ctx = linda_qpn_to_ctx ( qp->qpn );
619: int rc;
620:
621: /* Reset context information */
622: memset ( &linda_wq->header_prod, 0,
623: sizeof ( linda_wq->header_prod ) );
624: linda_wq->header_cons = 0;
625: linda_wq->eager_prod = 0;
626: linda_wq->eager_cons = 0;
627:
628: /* Allocate receive header buffer */
629: linda_wq->header = malloc_dma ( LINDA_RECV_HEADERS_SIZE,
630: LINDA_RECV_HEADERS_ALIGN );
631: if ( ! linda_wq->header ) {
632: rc = -ENOMEM;
633: goto err_alloc_header;
634: }
635:
636: /* Enable context in hardware */
637: memset ( &rcvhdraddr, 0, sizeof ( rcvhdraddr ) );
638: BIT_FILL_1 ( &rcvhdraddr, RcvHdrAddr0,
639: ( virt_to_bus ( linda_wq->header ) >> 2 ) );
640: linda_writeq_array8b ( linda, &rcvhdraddr,
641: QIB_7220_RcvHdrAddr0_offset, ctx );
642: memset ( &rcvhdrtailaddr, 0, sizeof ( rcvhdrtailaddr ) );
643: BIT_FILL_1 ( &rcvhdrtailaddr, RcvHdrTailAddr0,
644: ( virt_to_bus ( &linda_wq->header_prod ) >> 2 ) );
645: linda_writeq_array8b ( linda, &rcvhdrtailaddr,
646: QIB_7220_RcvHdrTailAddr0_offset, ctx );
647: memset ( &rcvhdrhead, 0, sizeof ( rcvhdrhead ) );
648: BIT_FILL_1 ( &rcvhdrhead, counter, 1 );
649: linda_writeq_array64k ( linda, &rcvhdrhead,
650: QIB_7220_RcvHdrHead0_offset, ctx );
651: memset ( &rcvegrindexhead, 0, sizeof ( rcvegrindexhead ) );
652: BIT_FILL_1 ( &rcvegrindexhead, Value, 1 );
653: linda_writeq_array64k ( linda, &rcvegrindexhead,
654: QIB_7220_RcvEgrIndexHead0_offset, ctx );
655: linda_readq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
656: BIT_SET ( &rcvctrl, PortEnable[ctx], 1 );
657: BIT_SET ( &rcvctrl, IntrAvail[ctx], 1 );
658: linda_writeq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
659:
660: DBGC ( linda, "Linda %p QPN %ld CTX %d hdrs [%lx,%lx) prod %lx\n",
661: linda, qp->qpn, ctx, virt_to_bus ( linda_wq->header ),
662: ( virt_to_bus ( linda_wq->header ) + LINDA_RECV_HEADERS_SIZE ),
663: virt_to_bus ( &linda_wq->header_prod ) );
664: return 0;
665:
666: free_dma ( linda_wq->header, LINDA_RECV_HEADERS_SIZE );
667: err_alloc_header:
668: return rc;
669: }
670:
671: /**
672: * Destroy receive work queue
673: *
674: * @v linda Linda device
675: * @v qp Queue pair
676: */
677: static void linda_destroy_recv_wq ( struct linda *linda,
678: struct ib_queue_pair *qp ) {
679: struct ib_work_queue *wq = &qp->recv;
680: struct linda_recv_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
681: struct QIB_7220_RcvCtrl rcvctrl;
682: unsigned int ctx = linda_qpn_to_ctx ( qp->qpn );
683:
684: /* Disable context in hardware */
685: linda_readq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
686: BIT_SET ( &rcvctrl, PortEnable[ctx], 0 );
687: BIT_SET ( &rcvctrl, IntrAvail[ctx], 0 );
688: linda_writeq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
689:
690: /* Make sure the hardware has seen that the context is disabled */
691: linda_readq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
692: mb();
693:
694: /* Free headers ring */
695: free_dma ( linda_wq->header, LINDA_RECV_HEADERS_SIZE );
696:
697: /* Free context */
698: linda_free_ctx ( linda, ctx );
699: }
700:
701: /**
702: * Initialise receive datapath
703: *
704: * @v linda Linda device
705: * @ret rc Return status code
706: */
707: static int linda_init_recv ( struct linda *linda ) {
708: struct QIB_7220_RcvCtrl rcvctrl;
709: struct QIB_7220_scalar rcvegrbase;
710: struct QIB_7220_scalar rcvhdrentsize;
711: struct QIB_7220_scalar rcvhdrcnt;
712: struct QIB_7220_RcvBTHQP rcvbthqp;
713: unsigned int portcfg;
714: unsigned long egrbase;
715: unsigned int eager_array_size_0;
716: unsigned int eager_array_size_other;
717: unsigned int ctx;
718:
719: /* Select configuration based on number of contexts */
720: switch ( LINDA_NUM_CONTEXTS ) {
721: case 5:
722: portcfg = LINDA_PORTCFG_5CTX;
723: eager_array_size_0 = LINDA_EAGER_ARRAY_SIZE_5CTX_0;
724: eager_array_size_other = LINDA_EAGER_ARRAY_SIZE_5CTX_OTHER;
725: break;
726: case 9:
727: portcfg = LINDA_PORTCFG_9CTX;
728: eager_array_size_0 = LINDA_EAGER_ARRAY_SIZE_9CTX_0;
729: eager_array_size_other = LINDA_EAGER_ARRAY_SIZE_9CTX_OTHER;
730: break;
731: case 17:
732: portcfg = LINDA_PORTCFG_17CTX;
733: eager_array_size_0 = LINDA_EAGER_ARRAY_SIZE_17CTX_0;
734: eager_array_size_other = LINDA_EAGER_ARRAY_SIZE_17CTX_OTHER;
735: break;
736: default:
737: linker_assert ( 0, invalid_LINDA_NUM_CONTEXTS );
738: return -EINVAL;
739: }
740:
741: /* Configure number of contexts */
742: memset ( &rcvctrl, 0, sizeof ( rcvctrl ) );
743: BIT_FILL_3 ( &rcvctrl,
744: TailUpd, 1,
745: PortCfg, portcfg,
746: RcvQPMapEnable, 1 );
747: linda_writeq ( linda, &rcvctrl, QIB_7220_RcvCtrl_offset );
748:
749: /* Configure receive header buffer sizes */
750: memset ( &rcvhdrcnt, 0, sizeof ( rcvhdrcnt ) );
751: BIT_FILL_1 ( &rcvhdrcnt, Value, LINDA_RECV_HEADER_COUNT );
752: linda_writeq ( linda, &rcvhdrcnt, QIB_7220_RcvHdrCnt_offset );
753: memset ( &rcvhdrentsize, 0, sizeof ( rcvhdrentsize ) );
754: BIT_FILL_1 ( &rcvhdrentsize, Value, ( LINDA_RECV_HEADER_SIZE >> 2 ) );
755: linda_writeq ( linda, &rcvhdrentsize, QIB_7220_RcvHdrEntSize_offset );
756:
757: /* Calculate eager array start addresses for each context */
758: linda_readq ( linda, &rcvegrbase, QIB_7220_RcvEgrBase_offset );
759: egrbase = BIT_GET ( &rcvegrbase, Value );
760: linda->recv_wq[0].eager_array = egrbase;
761: linda->recv_wq[0].eager_entries = eager_array_size_0;
762: egrbase += ( eager_array_size_0 * sizeof ( struct QIB_7220_RcvEgr ) );
763: for ( ctx = 1 ; ctx < LINDA_NUM_CONTEXTS ; ctx++ ) {
764: linda->recv_wq[ctx].eager_array = egrbase;
765: linda->recv_wq[ctx].eager_entries = eager_array_size_other;
766: egrbase += ( eager_array_size_other *
767: sizeof ( struct QIB_7220_RcvEgr ) );
768: }
769: for ( ctx = 0 ; ctx < LINDA_NUM_CONTEXTS ; ctx++ ) {
770: DBGC ( linda, "Linda %p CTX %d eager array at %lx (%d "
771: "entries)\n", linda, ctx,
772: linda->recv_wq[ctx].eager_array,
773: linda->recv_wq[ctx].eager_entries );
774: }
775:
776: /* Set the BTH QP for Infinipath packets to an unused value */
777: memset ( &rcvbthqp, 0, sizeof ( rcvbthqp ) );
778: BIT_FILL_1 ( &rcvbthqp, RcvBTHQP, LINDA_QP_IDETH );
779: linda_writeq ( linda, &rcvbthqp, QIB_7220_RcvBTHQP_offset );
780:
781: return 0;
782: }
783:
784: /**
785: * Shut down receive datapath
786: *
787: * @v linda Linda device
788: */
789: static void linda_fini_recv ( struct linda *linda __unused ) {
790: /* Nothing to do; all contexts were already disabled when the
791: * queue pairs were destroyed
792: */
793: }
794:
795: /***************************************************************************
796: *
797: * Completion queue operations
798: *
799: ***************************************************************************
800: */
801:
802: /**
803: * Create completion queue
804: *
805: * @v ibdev Infiniband device
806: * @v cq Completion queue
807: * @ret rc Return status code
808: */
809: static int linda_create_cq ( struct ib_device *ibdev,
810: struct ib_completion_queue *cq ) {
811: struct linda *linda = ib_get_drvdata ( ibdev );
812: static int cqn;
813:
814: /* The hardware has no concept of completion queues. We
815: * simply use the association between CQs and WQs (already
816: * handled by the IB core) to decide which WQs to poll.
817: *
818: * We do set a CQN, just to avoid confusing debug messages
819: * from the IB core.
820: */
821: cq->cqn = ++cqn;
822: DBGC ( linda, "Linda %p CQN %ld created\n", linda, cq->cqn );
823:
824: return 0;
825: }
826:
827: /**
828: * Destroy completion queue
829: *
830: * @v ibdev Infiniband device
831: * @v cq Completion queue
832: */
833: static void linda_destroy_cq ( struct ib_device *ibdev,
834: struct ib_completion_queue *cq ) {
835: struct linda *linda = ib_get_drvdata ( ibdev );
836:
837: /* Nothing to do */
838: DBGC ( linda, "Linda %p CQN %ld destroyed\n", linda, cq->cqn );
839: }
840:
841: /***************************************************************************
842: *
843: * Queue pair operations
844: *
845: ***************************************************************************
846: */
847:
848: /**
849: * Create queue pair
850: *
851: * @v ibdev Infiniband device
852: * @v qp Queue pair
853: * @ret rc Return status code
854: */
855: static int linda_create_qp ( struct ib_device *ibdev,
856: struct ib_queue_pair *qp ) {
857: struct linda *linda = ib_get_drvdata ( ibdev );
858: int ctx;
859: int rc;
860:
861: /* Locate an available context */
862: ctx = linda_alloc_ctx ( linda );
863: if ( ctx < 0 ) {
864: rc = ctx;
865: goto err_alloc_ctx;
866: }
867:
868: /* Set queue pair number based on context index */
869: qp->qpn = linda_ctx_to_qpn ( ctx );
870:
871: /* Set work-queue private data pointers */
872: ib_wq_set_drvdata ( &qp->send, &linda->send_wq[ctx] );
873: ib_wq_set_drvdata ( &qp->recv, &linda->recv_wq[ctx] );
874:
875: /* Create receive work queue */
876: if ( ( rc = linda_create_recv_wq ( linda, qp ) ) != 0 )
877: goto err_create_recv_wq;
878:
879: /* Create send work queue */
880: if ( ( rc = linda_create_send_wq ( linda, qp ) ) != 0 )
881: goto err_create_send_wq;
882:
883: return 0;
884:
885: linda_destroy_send_wq ( linda, qp );
886: err_create_send_wq:
887: linda_destroy_recv_wq ( linda, qp );
888: err_create_recv_wq:
889: linda_free_ctx ( linda, ctx );
890: err_alloc_ctx:
891: return rc;
892: }
893:
894: /**
895: * Modify queue pair
896: *
897: * @v ibdev Infiniband device
898: * @v qp Queue pair
899: * @ret rc Return status code
900: */
901: static int linda_modify_qp ( struct ib_device *ibdev,
902: struct ib_queue_pair *qp ) {
903: struct linda *linda = ib_get_drvdata ( ibdev );
904:
905: /* Nothing to do; the hardware doesn't have a notion of queue
906: * keys
907: */
908: DBGC ( linda, "Linda %p QPN %ld modified\n", linda, qp->qpn );
909: return 0;
910: }
911:
912: /**
913: * Destroy queue pair
914: *
915: * @v ibdev Infiniband device
916: * @v qp Queue pair
917: */
918: static void linda_destroy_qp ( struct ib_device *ibdev,
919: struct ib_queue_pair *qp ) {
920: struct linda *linda = ib_get_drvdata ( ibdev );
921:
922: linda_destroy_send_wq ( linda, qp );
923: linda_destroy_recv_wq ( linda, qp );
924: }
925:
926: /***************************************************************************
927: *
928: * Work request operations
929: *
930: ***************************************************************************
931: */
932:
933: /**
934: * Post send work queue entry
935: *
936: * @v ibdev Infiniband device
937: * @v qp Queue pair
938: * @v av Address vector
939: * @v iobuf I/O buffer
940: * @ret rc Return status code
941: */
942: static int linda_post_send ( struct ib_device *ibdev,
943: struct ib_queue_pair *qp,
944: struct ib_address_vector *av,
945: struct io_buffer *iobuf ) {
946: struct linda *linda = ib_get_drvdata ( ibdev );
947: struct ib_work_queue *wq = &qp->send;
948: struct linda_send_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
949: struct QIB_7220_SendPbc sendpbc;
950: uint8_t header_buf[IB_MAX_HEADER_SIZE];
951: struct io_buffer headers;
952: unsigned int send_buf;
953: unsigned long start_offset;
954: unsigned long offset;
955: size_t len;
956: ssize_t frag_len;
957: uint32_t *data;
958:
959: /* Allocate send buffer and calculate offset */
960: send_buf = linda_alloc_send_buf ( linda );
961: start_offset = offset = linda_send_buffer_offset ( linda, send_buf );
962:
963: /* Store I/O buffer and send buffer index */
964: assert ( wq->iobufs[linda_wq->prod] == NULL );
965: wq->iobufs[linda_wq->prod] = iobuf;
966: linda_wq->send_buf[linda_wq->prod] = send_buf;
967:
968: /* Construct headers */
969: iob_populate ( &headers, header_buf, 0, sizeof ( header_buf ) );
970: iob_reserve ( &headers, sizeof ( header_buf ) );
971: ib_push ( ibdev, &headers, qp, iob_len ( iobuf ), av );
972:
973: /* Calculate packet length */
974: len = ( ( sizeof ( sendpbc ) + iob_len ( &headers ) +
975: iob_len ( iobuf ) + 3 ) & ~3 );
976:
977: /* Construct send per-buffer control word */
978: memset ( &sendpbc, 0, sizeof ( sendpbc ) );
979: BIT_FILL_2 ( &sendpbc,
980: LengthP1_toibc, ( ( len >> 2 ) - 1 ),
981: VL15, 1 );
982:
983: /* Write SendPbc */
984: DBG_DISABLE ( DBGLVL_IO );
985: linda_writeq ( linda, &sendpbc, offset );
986: offset += sizeof ( sendpbc );
987:
988: /* Write headers */
989: for ( data = headers.data, frag_len = iob_len ( &headers ) ;
990: frag_len > 0 ; data++, offset += 4, frag_len -= 4 ) {
991: linda_writel ( linda, *data, offset );
992: }
993:
994: /* Write data */
995: for ( data = iobuf->data, frag_len = iob_len ( iobuf ) ;
996: frag_len > 0 ; data++, offset += 4, frag_len -= 4 ) {
997: linda_writel ( linda, *data, offset );
998: }
999: DBG_ENABLE ( DBGLVL_IO );
1000:
1001: assert ( ( start_offset + len ) == offset );
1002: DBGC2 ( linda, "Linda %p QPN %ld TX %d(%d) posted [%lx,%lx)\n",
1003: linda, qp->qpn, send_buf, linda_wq->prod,
1004: start_offset, offset );
1005:
1006: /* Increment producer counter */
1007: linda_wq->prod = ( ( linda_wq->prod + 1 ) & ( wq->num_wqes - 1 ) );
1008:
1009: return 0;
1010: }
1011:
1012: /**
1013: * Complete send work queue entry
1014: *
1015: * @v ibdev Infiniband device
1016: * @v qp Queue pair
1017: * @v wqe_idx Work queue entry index
1018: */
1019: static void linda_complete_send ( struct ib_device *ibdev,
1020: struct ib_queue_pair *qp,
1021: unsigned int wqe_idx ) {
1022: struct linda *linda = ib_get_drvdata ( ibdev );
1023: struct ib_work_queue *wq = &qp->send;
1024: struct linda_send_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
1025: struct io_buffer *iobuf;
1026: unsigned int send_buf;
1027:
1028: /* Parse completion */
1029: send_buf = linda_wq->send_buf[wqe_idx];
1030: DBGC2 ( linda, "Linda %p QPN %ld TX %d(%d) complete\n",
1031: linda, qp->qpn, send_buf, wqe_idx );
1032:
1033: /* Complete work queue entry */
1034: iobuf = wq->iobufs[wqe_idx];
1035: assert ( iobuf != NULL );
1036: ib_complete_send ( ibdev, qp, iobuf, 0 );
1037: wq->iobufs[wqe_idx] = NULL;
1038:
1039: /* Free send buffer */
1040: linda_free_send_buf ( linda, send_buf );
1041: }
1042:
1043: /**
1044: * Poll send work queue
1045: *
1046: * @v ibdev Infiniband device
1047: * @v qp Queue pair
1048: */
1049: static void linda_poll_send_wq ( struct ib_device *ibdev,
1050: struct ib_queue_pair *qp ) {
1051: struct linda *linda = ib_get_drvdata ( ibdev );
1052: struct ib_work_queue *wq = &qp->send;
1053: struct linda_send_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
1054: unsigned int send_buf;
1055:
1056: /* Look for completions */
1057: while ( wq->fill ) {
1058:
1059: /* Check to see if send buffer has completed */
1060: send_buf = linda_wq->send_buf[linda_wq->cons];
1061: if ( linda_send_buf_in_use ( linda, send_buf ) )
1062: break;
1063:
1064: /* Complete this buffer */
1065: linda_complete_send ( ibdev, qp, linda_wq->cons );
1066:
1067: /* Increment consumer counter */
1068: linda_wq->cons = ( ( linda_wq->cons + 1 ) &
1069: ( wq->num_wqes - 1 ) );
1070: }
1071: }
1072:
1073: /**
1074: * Post receive work queue entry
1075: *
1076: * @v ibdev Infiniband device
1077: * @v qp Queue pair
1078: * @v iobuf I/O buffer
1079: * @ret rc Return status code
1080: */
1081: static int linda_post_recv ( struct ib_device *ibdev,
1082: struct ib_queue_pair *qp,
1083: struct io_buffer *iobuf ) {
1084: struct linda *linda = ib_get_drvdata ( ibdev );
1085: struct ib_work_queue *wq = &qp->recv;
1086: struct linda_recv_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
1087: struct QIB_7220_RcvEgr rcvegr;
1088: struct QIB_7220_scalar rcvegrindexhead;
1089: unsigned int ctx = linda_qpn_to_ctx ( qp->qpn );
1090: physaddr_t addr;
1091: size_t len;
1092: unsigned int wqe_idx;
1093: unsigned int bufsize;
1094:
1095: /* Sanity checks */
1096: addr = virt_to_bus ( iobuf->data );
1097: len = iob_tailroom ( iobuf );
1098: if ( addr & ( LINDA_EAGER_BUFFER_ALIGN - 1 ) ) {
1099: DBGC ( linda, "Linda %p QPN %ld misaligned RX buffer "
1100: "(%08lx)\n", linda, qp->qpn, addr );
1101: return -EINVAL;
1102: }
1103: if ( len != LINDA_RECV_PAYLOAD_SIZE ) {
1104: DBGC ( linda, "Linda %p QPN %ld wrong RX buffer size (%zd)\n",
1105: linda, qp->qpn, len );
1106: return -EINVAL;
1107: }
1108:
1109: /* Calculate eager producer index and WQE index */
1110: wqe_idx = ( linda_wq->eager_prod & ( wq->num_wqes - 1 ) );
1111: assert ( wq->iobufs[wqe_idx] == NULL );
1112:
1113: /* Store I/O buffer */
1114: wq->iobufs[wqe_idx] = iobuf;
1115:
1116: /* Calculate buffer size */
1117: switch ( LINDA_RECV_PAYLOAD_SIZE ) {
1118: case 2048: bufsize = LINDA_EAGER_BUFFER_2K; break;
1119: case 4096: bufsize = LINDA_EAGER_BUFFER_4K; break;
1120: case 8192: bufsize = LINDA_EAGER_BUFFER_8K; break;
1121: case 16384: bufsize = LINDA_EAGER_BUFFER_16K; break;
1122: case 32768: bufsize = LINDA_EAGER_BUFFER_32K; break;
1123: case 65536: bufsize = LINDA_EAGER_BUFFER_64K; break;
1124: default: linker_assert ( 0, invalid_rx_payload_size );
1125: bufsize = LINDA_EAGER_BUFFER_NONE;
1126: }
1127:
1128: /* Post eager buffer */
1129: memset ( &rcvegr, 0, sizeof ( rcvegr ) );
1130: BIT_FILL_2 ( &rcvegr,
1131: Addr, ( addr >> 11 ),
1132: BufSize, bufsize );
1133: linda_writeq_array8b ( linda, &rcvegr,
1134: linda_wq->eager_array, linda_wq->eager_prod );
1135: DBGC2 ( linda, "Linda %p QPN %ld RX egr %d(%d) posted [%lx,%lx)\n",
1136: linda, qp->qpn, linda_wq->eager_prod, wqe_idx,
1137: addr, ( addr + len ) );
1138:
1139: /* Increment producer index */
1140: linda_wq->eager_prod = ( ( linda_wq->eager_prod + 1 ) &
1141: ( linda_wq->eager_entries - 1 ) );
1142:
1143: /* Update head index */
1144: memset ( &rcvegrindexhead, 0, sizeof ( rcvegrindexhead ) );
1145: BIT_FILL_1 ( &rcvegrindexhead,
1146: Value, ( ( linda_wq->eager_prod + 1 ) &
1147: ( linda_wq->eager_entries - 1 ) ) );
1148: linda_writeq_array64k ( linda, &rcvegrindexhead,
1149: QIB_7220_RcvEgrIndexHead0_offset, ctx );
1150:
1151: return 0;
1152: }
1153:
1154: /**
1155: * Complete receive work queue entry
1156: *
1157: * @v ibdev Infiniband device
1158: * @v qp Queue pair
1159: * @v header_offs Header offset
1160: */
1161: static void linda_complete_recv ( struct ib_device *ibdev,
1162: struct ib_queue_pair *qp,
1163: unsigned int header_offs ) {
1164: struct linda *linda = ib_get_drvdata ( ibdev );
1165: struct ib_work_queue *wq = &qp->recv;
1166: struct linda_recv_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
1167: struct QIB_7220_RcvHdrFlags *rcvhdrflags;
1168: struct QIB_7220_RcvEgr rcvegr;
1169: struct io_buffer headers;
1170: struct io_buffer *iobuf;
1171: struct ib_queue_pair *intended_qp;
1172: struct ib_address_vector av;
1173: unsigned int rcvtype;
1174: unsigned int pktlen;
1175: unsigned int egrindex;
1176: unsigned int useegrbfr;
1177: unsigned int iberr, mkerr, tiderr, khdrerr, mtuerr;
1178: unsigned int lenerr, parityerr, vcrcerr, icrcerr;
1179: unsigned int err;
1180: unsigned int hdrqoffset;
1181: unsigned int header_len;
1182: unsigned int padded_payload_len;
1183: unsigned int wqe_idx;
1184: size_t payload_len;
1185: int qp0;
1186: int rc;
1187:
1188: /* RcvHdrFlags are at the end of the header entry */
1189: rcvhdrflags = ( linda_wq->header + header_offs +
1190: LINDA_RECV_HEADER_SIZE - sizeof ( *rcvhdrflags ) );
1191: rcvtype = BIT_GET ( rcvhdrflags, RcvType );
1192: pktlen = ( BIT_GET ( rcvhdrflags, PktLen ) << 2 );
1193: egrindex = BIT_GET ( rcvhdrflags, EgrIndex );
1194: useegrbfr = BIT_GET ( rcvhdrflags, UseEgrBfr );
1195: hdrqoffset = ( BIT_GET ( rcvhdrflags, HdrqOffset ) << 2 );
1196: iberr = BIT_GET ( rcvhdrflags, IBErr );
1197: mkerr = BIT_GET ( rcvhdrflags, MKErr );
1198: tiderr = BIT_GET ( rcvhdrflags, TIDErr );
1199: khdrerr = BIT_GET ( rcvhdrflags, KHdrErr );
1200: mtuerr = BIT_GET ( rcvhdrflags, MTUErr );
1201: lenerr = BIT_GET ( rcvhdrflags, LenErr );
1202: parityerr = BIT_GET ( rcvhdrflags, ParityErr );
1203: vcrcerr = BIT_GET ( rcvhdrflags, VCRCErr );
1204: icrcerr = BIT_GET ( rcvhdrflags, ICRCErr );
1205: header_len = ( LINDA_RECV_HEADER_SIZE - hdrqoffset -
1206: sizeof ( *rcvhdrflags ) );
1207: padded_payload_len = ( pktlen - header_len - 4 /* ICRC */ );
1208: err = ( iberr | mkerr | tiderr | khdrerr | mtuerr |
1209: lenerr | parityerr | vcrcerr | icrcerr );
1210: /* IB header is placed immediately before RcvHdrFlags */
1211: iob_populate ( &headers, ( ( ( void * ) rcvhdrflags ) - header_len ),
1212: header_len, header_len );
1213:
1214: /* Dump diagnostic information */
1215: if ( err || ( ! useegrbfr ) ) {
1216: DBGC ( linda, "Linda %p QPN %ld RX egr %d%s hdr %d type %d "
1217: "len %d(%d+%d+4)%s%s%s%s%s%s%s%s%s%s%s\n", linda,
1218: qp->qpn, egrindex, ( useegrbfr ? "" : "(unused)" ),
1219: ( header_offs / LINDA_RECV_HEADER_SIZE ), rcvtype,
1220: pktlen, header_len, padded_payload_len,
1221: ( err ? " [Err" : "" ), ( iberr ? " IB" : "" ),
1222: ( mkerr ? " MK" : "" ), ( tiderr ? " TID" : "" ),
1223: ( khdrerr ? " KHdr" : "" ), ( mtuerr ? " MTU" : "" ),
1224: ( lenerr ? " Len" : "" ), ( parityerr ? " Parity" : ""),
1225: ( vcrcerr ? " VCRC" : "" ), ( icrcerr ? " ICRC" : "" ),
1226: ( err ? "]" : "" ) );
1227: } else {
1228: DBGC2 ( linda, "Linda %p QPN %ld RX egr %d hdr %d type %d "
1229: "len %d(%d+%d+4)\n", linda, qp->qpn, egrindex,
1230: ( header_offs / LINDA_RECV_HEADER_SIZE ), rcvtype,
1231: pktlen, header_len, padded_payload_len );
1232: }
1233: DBGCP_HDA ( linda, hdrqoffset, headers.data,
1234: ( header_len + sizeof ( *rcvhdrflags ) ) );
1235:
1236: /* Parse header to generate address vector */
1237: qp0 = ( qp->qpn == 0 );
1238: intended_qp = NULL;
1239: if ( ( rc = ib_pull ( ibdev, &headers, ( qp0 ? &intended_qp : NULL ),
1240: &payload_len, &av ) ) != 0 ) {
1241: DBGC ( linda, "Linda %p could not parse headers: %s\n",
1242: linda, strerror ( rc ) );
1243: err = 1;
1244: }
1245: if ( ! intended_qp )
1246: intended_qp = qp;
1247:
1248: /* Complete this buffer and any skipped buffers. Note that
1249: * when the hardware runs out of buffers, it will repeatedly
1250: * report the same buffer (the tail) as a TID error, and that
1251: * it also has a habit of sometimes skipping over several
1252: * buffers at once.
1253: */
1254: while ( 1 ) {
1255:
1256: /* If we have caught up to the producer counter, stop.
1257: * This will happen when the hardware first runs out
1258: * of buffers and starts reporting TID errors against
1259: * the eager buffer it wants to use next.
1260: */
1261: if ( linda_wq->eager_cons == linda_wq->eager_prod )
1262: break;
1263:
1264: /* If we have caught up to where we should be after
1265: * completing this egrindex, stop. We phrase the test
1266: * this way to avoid completing the entire ring when
1267: * we receive the same egrindex twice in a row.
1268: */
1269: if ( ( linda_wq->eager_cons ==
1270: ( ( egrindex + 1 ) & ( linda_wq->eager_entries - 1 ) )))
1271: break;
1272:
1273: /* Identify work queue entry and corresponding I/O
1274: * buffer.
1275: */
1276: wqe_idx = ( linda_wq->eager_cons & ( wq->num_wqes - 1 ) );
1277: iobuf = wq->iobufs[wqe_idx];
1278: assert ( iobuf != NULL );
1279: wq->iobufs[wqe_idx] = NULL;
1280:
1281: /* Complete the eager buffer */
1282: if ( linda_wq->eager_cons == egrindex ) {
1283: /* Completing the eager buffer described in
1284: * this header entry.
1285: */
1286: iob_put ( iobuf, payload_len );
1287: rc = ( err ? -EIO : ( useegrbfr ? 0 : -ECANCELED ) );
1288: /* Redirect to target QP if necessary */
1289: if ( qp != intended_qp ) {
1290: DBGC ( linda, "Linda %p redirecting QPN %ld "
1291: "=> %ld\n",
1292: linda, qp->qpn, intended_qp->qpn );
1293: /* Compensate for incorrect fill levels */
1294: qp->recv.fill--;
1295: intended_qp->recv.fill++;
1296: }
1297: ib_complete_recv ( ibdev, intended_qp, &av, iobuf, rc);
1298: } else {
1299: /* Completing on a skipped-over eager buffer */
1300: ib_complete_recv ( ibdev, qp, &av, iobuf, -ECANCELED );
1301: }
1302:
1303: /* Clear eager buffer */
1304: memset ( &rcvegr, 0, sizeof ( rcvegr ) );
1305: linda_writeq_array8b ( linda, &rcvegr, linda_wq->eager_array,
1306: linda_wq->eager_cons );
1307:
1308: /* Increment consumer index */
1309: linda_wq->eager_cons = ( ( linda_wq->eager_cons + 1 ) &
1310: ( linda_wq->eager_entries - 1 ) );
1311: }
1312: }
1313:
1314: /**
1315: * Poll receive work queue
1316: *
1317: * @v ibdev Infiniband device
1318: * @v qp Queue pair
1319: */
1320: static void linda_poll_recv_wq ( struct ib_device *ibdev,
1321: struct ib_queue_pair *qp ) {
1322: struct linda *linda = ib_get_drvdata ( ibdev );
1323: struct ib_work_queue *wq = &qp->recv;
1324: struct linda_recv_work_queue *linda_wq = ib_wq_get_drvdata ( wq );
1325: struct QIB_7220_RcvHdrHead0 rcvhdrhead;
1326: unsigned int ctx = linda_qpn_to_ctx ( qp->qpn );
1327: unsigned int header_prod;
1328:
1329: /* Check for received packets */
1330: header_prod = ( BIT_GET ( &linda_wq->header_prod, Value ) << 2 );
1331: if ( header_prod == linda_wq->header_cons )
1332: return;
1333:
1334: /* Process all received packets */
1335: while ( linda_wq->header_cons != header_prod ) {
1336:
1337: /* Complete the receive */
1338: linda_complete_recv ( ibdev, qp, linda_wq->header_cons );
1339:
1340: /* Increment the consumer offset */
1341: linda_wq->header_cons += LINDA_RECV_HEADER_SIZE;
1342: linda_wq->header_cons %= LINDA_RECV_HEADERS_SIZE;
1343: }
1344:
1345: /* Update consumer offset */
1346: memset ( &rcvhdrhead, 0, sizeof ( rcvhdrhead ) );
1347: BIT_FILL_2 ( &rcvhdrhead,
1348: RcvHeadPointer, ( linda_wq->header_cons >> 2 ),
1349: counter, 1 );
1350: linda_writeq_array64k ( linda, &rcvhdrhead,
1351: QIB_7220_RcvHdrHead0_offset, ctx );
1352: }
1353:
1354: /**
1355: * Poll completion queue
1356: *
1357: * @v ibdev Infiniband device
1358: * @v cq Completion queue
1359: */
1360: static void linda_poll_cq ( struct ib_device *ibdev,
1361: struct ib_completion_queue *cq ) {
1362: struct ib_work_queue *wq;
1363:
1364: /* Poll associated send and receive queues */
1365: list_for_each_entry ( wq, &cq->work_queues, list ) {
1366: if ( wq->is_send ) {
1367: linda_poll_send_wq ( ibdev, wq->qp );
1368: } else {
1369: linda_poll_recv_wq ( ibdev, wq->qp );
1370: }
1371: }
1372: }
1373:
1374: /***************************************************************************
1375: *
1376: * Event queues
1377: *
1378: ***************************************************************************
1379: */
1380:
1381: /**
1382: * Poll event queue
1383: *
1384: * @v ibdev Infiniband device
1385: */
1386: static void linda_poll_eq ( struct ib_device *ibdev ) {
1387: struct linda *linda = ib_get_drvdata ( ibdev );
1388: struct QIB_7220_ErrStatus errstatus;
1389: struct QIB_7220_ErrClear errclear;
1390:
1391: /* Check for link status changes */
1392: DBG_DISABLE ( DBGLVL_IO );
1393: linda_readq ( linda, &errstatus, QIB_7220_ErrStatus_offset );
1394: DBG_ENABLE ( DBGLVL_IO );
1395: if ( BIT_GET ( &errstatus, IBStatusChanged ) ) {
1396: linda_link_state_changed ( ibdev );
1397: memset ( &errclear, 0, sizeof ( errclear ) );
1398: BIT_FILL_1 ( &errclear, IBStatusChangedClear, 1 );
1399: linda_writeq ( linda, &errclear, QIB_7220_ErrClear_offset );
1400: }
1401: }
1402:
1403: /***************************************************************************
1404: *
1405: * Infiniband link-layer operations
1406: *
1407: ***************************************************************************
1408: */
1409:
1410: /**
1411: * Initialise Infiniband link
1412: *
1413: * @v ibdev Infiniband device
1414: * @ret rc Return status code
1415: */
1416: static int linda_open ( struct ib_device *ibdev ) {
1417: struct linda *linda = ib_get_drvdata ( ibdev );
1418: struct QIB_7220_Control control;
1419:
1420: /* Disable link */
1421: linda_readq ( linda, &control, QIB_7220_Control_offset );
1422: BIT_SET ( &control, LinkEn, 1 );
1423: linda_writeq ( linda, &control, QIB_7220_Control_offset );
1424: return 0;
1425: }
1426:
1427: /**
1428: * Close Infiniband link
1429: *
1430: * @v ibdev Infiniband device
1431: */
1432: static void linda_close ( struct ib_device *ibdev ) {
1433: struct linda *linda = ib_get_drvdata ( ibdev );
1434: struct QIB_7220_Control control;
1435:
1436: /* Disable link */
1437: linda_readq ( linda, &control, QIB_7220_Control_offset );
1438: BIT_SET ( &control, LinkEn, 0 );
1439: linda_writeq ( linda, &control, QIB_7220_Control_offset );
1440: }
1441:
1442: /***************************************************************************
1443: *
1444: * Multicast group operations
1445: *
1446: ***************************************************************************
1447: */
1448:
1449: /**
1450: * Attach to multicast group
1451: *
1452: * @v ibdev Infiniband device
1453: * @v qp Queue pair
1454: * @v gid Multicast GID
1455: * @ret rc Return status code
1456: */
1457: static int linda_mcast_attach ( struct ib_device *ibdev,
1458: struct ib_queue_pair *qp,
1459: union ib_gid *gid ) {
1460: struct linda *linda = ib_get_drvdata ( ibdev );
1461:
1462: ( void ) linda;
1463: ( void ) qp;
1464: ( void ) gid;
1465: return 0;
1466: }
1467:
1468: /**
1469: * Detach from multicast group
1470: *
1471: * @v ibdev Infiniband device
1472: * @v qp Queue pair
1473: * @v gid Multicast GID
1474: */
1475: static void linda_mcast_detach ( struct ib_device *ibdev,
1476: struct ib_queue_pair *qp,
1477: union ib_gid *gid ) {
1478: struct linda *linda = ib_get_drvdata ( ibdev );
1479:
1480: ( void ) linda;
1481: ( void ) qp;
1482: ( void ) gid;
1483: }
1484:
1485: /** Linda Infiniband operations */
1486: static struct ib_device_operations linda_ib_operations = {
1487: .create_cq = linda_create_cq,
1488: .destroy_cq = linda_destroy_cq,
1489: .create_qp = linda_create_qp,
1490: .modify_qp = linda_modify_qp,
1491: .destroy_qp = linda_destroy_qp,
1492: .post_send = linda_post_send,
1493: .post_recv = linda_post_recv,
1494: .poll_cq = linda_poll_cq,
1495: .poll_eq = linda_poll_eq,
1496: .open = linda_open,
1497: .close = linda_close,
1498: .mcast_attach = linda_mcast_attach,
1499: .mcast_detach = linda_mcast_detach,
1500: .set_port_info = linda_set_port_info,
1501: .set_pkey_table = linda_set_pkey_table,
1502: };
1503:
1504: /***************************************************************************
1505: *
1506: * I2C bus operations
1507: *
1508: ***************************************************************************
1509: */
1510:
1511: /** Linda I2C bit to GPIO mappings */
1512: static unsigned int linda_i2c_bits[] = {
1513: [I2C_BIT_SCL] = ( 1 << LINDA_GPIO_SCL ),
1514: [I2C_BIT_SDA] = ( 1 << LINDA_GPIO_SDA ),
1515: };
1516:
1517: /**
1518: * Read Linda I2C line status
1519: *
1520: * @v basher Bit-bashing interface
1521: * @v bit_id Bit number
1522: * @ret zero Input is a logic 0
1523: * @ret non-zero Input is a logic 1
1524: */
1525: static int linda_i2c_read_bit ( struct bit_basher *basher,
1526: unsigned int bit_id ) {
1527: struct linda *linda =
1528: container_of ( basher, struct linda, i2c.basher );
1529: struct QIB_7220_EXTStatus extstatus;
1530: unsigned int status;
1531:
1532: DBG_DISABLE ( DBGLVL_IO );
1533:
1534: linda_readq ( linda, &extstatus, QIB_7220_EXTStatus_offset );
1535: status = ( BIT_GET ( &extstatus, GPIOIn ) & linda_i2c_bits[bit_id] );
1536:
1537: DBG_ENABLE ( DBGLVL_IO );
1538:
1539: return status;
1540: }
1541:
1542: /**
1543: * Write Linda I2C line status
1544: *
1545: * @v basher Bit-bashing interface
1546: * @v bit_id Bit number
1547: * @v data Value to write
1548: */
1549: static void linda_i2c_write_bit ( struct bit_basher *basher,
1550: unsigned int bit_id, unsigned long data ) {
1551: struct linda *linda =
1552: container_of ( basher, struct linda, i2c.basher );
1553: struct QIB_7220_EXTCtrl extctrl;
1554: struct QIB_7220_GPIO gpioout;
1555: unsigned int bit = linda_i2c_bits[bit_id];
1556: unsigned int outputs = 0;
1557: unsigned int output_enables = 0;
1558:
1559: DBG_DISABLE ( DBGLVL_IO );
1560:
1561: /* Read current GPIO mask and outputs */
1562: linda_readq ( linda, &extctrl, QIB_7220_EXTCtrl_offset );
1563: linda_readq ( linda, &gpioout, QIB_7220_GPIOOut_offset );
1564:
1565: /* Update outputs and output enables. I2C lines are tied
1566: * high, so we always set the output to 0 and use the output
1567: * enable to control the line.
1568: */
1569: output_enables = BIT_GET ( &extctrl, GPIOOe );
1570: output_enables = ( ( output_enables & ~bit ) | ( ~data & bit ) );
1571: outputs = BIT_GET ( &gpioout, GPIO );
1572: outputs = ( outputs & ~bit );
1573: BIT_SET ( &extctrl, GPIOOe, output_enables );
1574: BIT_SET ( &gpioout, GPIO, outputs );
1575:
1576: /* Write the output enable first; that way we avoid logic
1577: * hazards.
1578: */
1579: linda_writeq ( linda, &extctrl, QIB_7220_EXTCtrl_offset );
1580: linda_writeq ( linda, &gpioout, QIB_7220_GPIOOut_offset );
1581: mb();
1582:
1583: DBG_ENABLE ( DBGLVL_IO );
1584: }
1585:
1586: /** Linda I2C bit-bashing interface operations */
1587: static struct bit_basher_operations linda_i2c_basher_ops = {
1588: .read = linda_i2c_read_bit,
1589: .write = linda_i2c_write_bit,
1590: };
1591:
1592: /**
1593: * Initialise Linda I2C subsystem
1594: *
1595: * @v linda Linda device
1596: * @ret rc Return status code
1597: */
1598: static int linda_init_i2c ( struct linda *linda ) {
1599: static int try_eeprom_address[] = { 0x51, 0x50 };
1600: unsigned int i;
1601: int rc;
1602:
1603: /* Initialise bus */
1604: if ( ( rc = init_i2c_bit_basher ( &linda->i2c,
1605: &linda_i2c_basher_ops ) ) != 0 ) {
1606: DBGC ( linda, "Linda %p could not initialise I2C bus: %s\n",
1607: linda, strerror ( rc ) );
1608: return rc;
1609: }
1610:
1611: /* Probe for devices */
1612: for ( i = 0 ; i < ( sizeof ( try_eeprom_address ) /
1613: sizeof ( try_eeprom_address[0] ) ) ; i++ ) {
1614: init_i2c_eeprom ( &linda->eeprom, try_eeprom_address[i] );
1615: if ( ( rc = i2c_check_presence ( &linda->i2c.i2c,
1616: &linda->eeprom ) ) == 0 ) {
1617: DBGC2 ( linda, "Linda %p found EEPROM at %02x\n",
1618: linda, try_eeprom_address[i] );
1619: return 0;
1620: }
1621: }
1622:
1623: DBGC ( linda, "Linda %p could not find EEPROM\n", linda );
1624: return -ENODEV;
1625: }
1626:
1627: /**
1628: * Read EEPROM parameters
1629: *
1630: * @v linda Linda device
1631: * @v guid GUID to fill in
1632: * @ret rc Return status code
1633: */
1634: static int linda_read_eeprom ( struct linda *linda, union ib_guid *guid ) {
1635: struct i2c_interface *i2c = &linda->i2c.i2c;
1636: int rc;
1637:
1638: /* Read GUID */
1639: if ( ( rc = i2c->read ( i2c, &linda->eeprom, LINDA_EEPROM_GUID_OFFSET,
1640: guid->bytes, sizeof ( *guid ) ) ) != 0 ) {
1641: DBGC ( linda, "Linda %p could not read GUID: %s\n",
1642: linda, strerror ( rc ) );
1643: return rc;
1644: }
1645: DBGC2 ( linda, "Linda %p has GUID " IB_GUID_FMT "\n",
1646: linda, IB_GUID_ARGS ( guid ) );
1647:
1648: /* Read serial number (debug only) */
1649: if ( DBG_LOG ) {
1650: uint8_t serial[LINDA_EEPROM_SERIAL_SIZE + 1];
1651:
1652: serial[ sizeof ( serial ) - 1 ] = '\0';
1653: if ( ( rc = i2c->read ( i2c, &linda->eeprom,
1654: LINDA_EEPROM_SERIAL_OFFSET, serial,
1655: ( sizeof ( serial ) - 1 ) ) ) != 0 ) {
1656: DBGC ( linda, "Linda %p could not read serial: %s\n",
1657: linda, strerror ( rc ) );
1658: return rc;
1659: }
1660: DBGC2 ( linda, "Linda %p has serial number \"%s\"\n",
1661: linda, serial );
1662: }
1663:
1664: return 0;
1665: }
1666:
1667: /***************************************************************************
1668: *
1669: * External parallel bus access
1670: *
1671: ***************************************************************************
1672: */
1673:
1674: /**
1675: * Request ownership of the IB external parallel bus
1676: *
1677: * @v linda Linda device
1678: * @ret rc Return status code
1679: */
1680: static int linda_ib_epb_request ( struct linda *linda ) {
1681: struct QIB_7220_ibsd_epb_access_ctrl access;
1682: unsigned int i;
1683:
1684: /* Request ownership */
1685: memset ( &access, 0, sizeof ( access ) );
1686: BIT_FILL_1 ( &access, sw_ib_epb_req, 1 );
1687: linda_writeq ( linda, &access, QIB_7220_ibsd_epb_access_ctrl_offset );
1688:
1689: /* Wait for ownership to be granted */
1690: for ( i = 0 ; i < LINDA_EPB_REQUEST_MAX_WAIT_US ; i++ ) {
1691: linda_readq ( linda, &access,
1692: QIB_7220_ibsd_epb_access_ctrl_offset );
1693: if ( BIT_GET ( &access, sw_ib_epb_req_granted ) )
1694: return 0;
1695: udelay ( 1 );
1696: }
1697:
1698: DBGC ( linda, "Linda %p timed out waiting for IB EPB request\n",
1699: linda );
1700: return -ETIMEDOUT;
1701: }
1702:
1703: /**
1704: * Wait for IB external parallel bus transaction to complete
1705: *
1706: * @v linda Linda device
1707: * @v xact Buffer to hold transaction result
1708: * @ret rc Return status code
1709: */
1710: static int linda_ib_epb_wait ( struct linda *linda,
1711: struct QIB_7220_ibsd_epb_transaction_reg *xact ) {
1712: unsigned int i;
1713:
1714: /* Discard first read to allow for signals crossing clock domains */
1715: linda_readq ( linda, xact, QIB_7220_ibsd_epb_transaction_reg_offset );
1716:
1717: for ( i = 0 ; i < LINDA_EPB_XACT_MAX_WAIT_US ; i++ ) {
1718: linda_readq ( linda, xact,
1719: QIB_7220_ibsd_epb_transaction_reg_offset );
1720: if ( BIT_GET ( xact, ib_epb_rdy ) ) {
1721: if ( BIT_GET ( xact, ib_epb_req_error ) ) {
1722: DBGC ( linda, "Linda %p EPB transaction "
1723: "failed\n", linda );
1724: return -EIO;
1725: } else {
1726: return 0;
1727: }
1728: }
1729: udelay ( 1 );
1730: }
1731:
1732: DBGC ( linda, "Linda %p timed out waiting for IB EPB transaction\n",
1733: linda );
1734: return -ETIMEDOUT;
1735: }
1736:
1737: /**
1738: * Release ownership of the IB external parallel bus
1739: *
1740: * @v linda Linda device
1741: */
1742: static void linda_ib_epb_release ( struct linda *linda ) {
1743: struct QIB_7220_ibsd_epb_access_ctrl access;
1744:
1745: memset ( &access, 0, sizeof ( access ) );
1746: BIT_FILL_1 ( &access, sw_ib_epb_req, 0 );
1747: linda_writeq ( linda, &access, QIB_7220_ibsd_epb_access_ctrl_offset );
1748: }
1749:
1750: /**
1751: * Read data via IB external parallel bus
1752: *
1753: * @v linda Linda device
1754: * @v location EPB location
1755: * @ret data Data read, or negative error
1756: *
1757: * You must have already acquired ownership of the IB external
1758: * parallel bus.
1759: */
1760: static int linda_ib_epb_read ( struct linda *linda, unsigned int location ) {
1761: struct QIB_7220_ibsd_epb_transaction_reg xact;
1762: unsigned int data;
1763: int rc;
1764:
1765: /* Ensure no transaction is currently in progress */
1766: if ( ( rc = linda_ib_epb_wait ( linda, &xact ) ) != 0 )
1767: return rc;
1768:
1769: /* Process data */
1770: memset ( &xact, 0, sizeof ( xact ) );
1771: BIT_FILL_3 ( &xact,
1772: ib_epb_address, LINDA_EPB_LOC_ADDRESS ( location ),
1773: ib_epb_read_write, LINDA_EPB_READ,
1774: ib_epb_cs, LINDA_EPB_LOC_CS ( location ) );
1775: linda_writeq ( linda, &xact,
1776: QIB_7220_ibsd_epb_transaction_reg_offset );
1777:
1778: /* Wait for transaction to complete */
1779: if ( ( rc = linda_ib_epb_wait ( linda, &xact ) ) != 0 )
1780: return rc;
1781:
1782: data = BIT_GET ( &xact, ib_epb_data );
1783: return data;
1784: }
1785:
1786: /**
1787: * Write data via IB external parallel bus
1788: *
1789: * @v linda Linda device
1790: * @v location EPB location
1791: * @v data Data to write
1792: * @ret rc Return status code
1793: *
1794: * You must have already acquired ownership of the IB external
1795: * parallel bus.
1796: */
1797: static int linda_ib_epb_write ( struct linda *linda, unsigned int location,
1798: unsigned int data ) {
1799: struct QIB_7220_ibsd_epb_transaction_reg xact;
1800: int rc;
1801:
1802: /* Ensure no transaction is currently in progress */
1803: if ( ( rc = linda_ib_epb_wait ( linda, &xact ) ) != 0 )
1804: return rc;
1805:
1806: /* Process data */
1807: memset ( &xact, 0, sizeof ( xact ) );
1808: BIT_FILL_4 ( &xact,
1809: ib_epb_data, data,
1810: ib_epb_address, LINDA_EPB_LOC_ADDRESS ( location ),
1811: ib_epb_read_write, LINDA_EPB_WRITE,
1812: ib_epb_cs, LINDA_EPB_LOC_CS ( location ) );
1813: linda_writeq ( linda, &xact,
1814: QIB_7220_ibsd_epb_transaction_reg_offset );
1815:
1816: /* Wait for transaction to complete */
1817: if ( ( rc = linda_ib_epb_wait ( linda, &xact ) ) != 0 )
1818: return rc;
1819:
1820: return 0;
1821: }
1822:
1823: /**
1824: * Read/modify/write EPB register
1825: *
1826: * @v linda Linda device
1827: * @v cs Chip select
1828: * @v channel Channel
1829: * @v element Element
1830: * @v reg Register
1831: * @v value Value to set
1832: * @v mask Mask to apply to old value
1833: * @ret rc Return status code
1834: */
1835: static int linda_ib_epb_mod_reg ( struct linda *linda, unsigned int cs,
1836: unsigned int channel, unsigned int element,
1837: unsigned int reg, unsigned int value,
1838: unsigned int mask ) {
1839: unsigned int location;
1840: int old_value;
1841: int rc;
1842:
1843: DBG_DISABLE ( DBGLVL_IO );
1844:
1845: /* Sanity check */
1846: assert ( ( value & mask ) == value );
1847:
1848: /* Acquire bus ownership */
1849: if ( ( rc = linda_ib_epb_request ( linda ) ) != 0 )
1850: goto out;
1851:
1852: /* Read existing value, if necessary */
1853: location = LINDA_EPB_LOC ( cs, channel, element, reg );
1854: if ( (~mask) & 0xff ) {
1855: old_value = linda_ib_epb_read ( linda, location );
1856: if ( old_value < 0 ) {
1857: rc = old_value;
1858: goto out_release;
1859: }
1860: } else {
1861: old_value = 0;
1862: }
1863:
1864: /* Update value */
1865: value = ( ( old_value & ~mask ) | value );
1866: DBGCP ( linda, "Linda %p CS %d EPB(%d,%d,%#02x) %#02x => %#02x\n",
1867: linda, cs, channel, element, reg, old_value, value );
1868: if ( ( rc = linda_ib_epb_write ( linda, location, value ) ) != 0 )
1869: goto out_release;
1870:
1871: out_release:
1872: /* Release bus */
1873: linda_ib_epb_release ( linda );
1874: out:
1875: DBG_ENABLE ( DBGLVL_IO );
1876: return rc;
1877: }
1878:
1879: /**
1880: * Transfer data to/from microcontroller RAM
1881: *
1882: * @v linda Linda device
1883: * @v address Starting address
1884: * @v write Data to write, or NULL
1885: * @v read Data to read, or NULL
1886: * @v len Length of data
1887: * @ret rc Return status code
1888: */
1889: static int linda_ib_epb_ram_xfer ( struct linda *linda, unsigned int address,
1890: const void *write, void *read,
1891: size_t len ) {
1892: unsigned int control;
1893: unsigned int address_hi;
1894: unsigned int address_lo;
1895: int data;
1896: int rc;
1897:
1898: DBG_DISABLE ( DBGLVL_IO );
1899:
1900: assert ( ! ( write && read ) );
1901: assert ( ( address % LINDA_EPB_UC_CHUNK_SIZE ) == 0 );
1902: assert ( ( len % LINDA_EPB_UC_CHUNK_SIZE ) == 0 );
1903:
1904: /* Acquire bus ownership */
1905: if ( ( rc = linda_ib_epb_request ( linda ) ) != 0 )
1906: goto out;
1907:
1908: /* Process data */
1909: while ( len ) {
1910:
1911: /* Reset the address for each new chunk */
1912: if ( ( address % LINDA_EPB_UC_CHUNK_SIZE ) == 0 ) {
1913:
1914: /* Write the control register */
1915: control = ( read ? LINDA_EPB_UC_CTL_READ :
1916: LINDA_EPB_UC_CTL_WRITE );
1917: if ( ( rc = linda_ib_epb_write ( linda,
1918: LINDA_EPB_UC_CTL,
1919: control ) ) != 0 )
1920: break;
1921:
1922: /* Write the address registers */
1923: address_hi = ( address >> 8 );
1924: if ( ( rc = linda_ib_epb_write ( linda,
1925: LINDA_EPB_UC_ADDR_HI,
1926: address_hi ) ) != 0 )
1927: break;
1928: address_lo = ( address & 0xff );
1929: if ( ( rc = linda_ib_epb_write ( linda,
1930: LINDA_EPB_UC_ADDR_LO,
1931: address_lo ) ) != 0 )
1932: break;
1933: }
1934:
1935: /* Read or write the data */
1936: if ( read ) {
1937: data = linda_ib_epb_read ( linda, LINDA_EPB_UC_DATA );
1938: if ( data < 0 ) {
1939: rc = data;
1940: break;
1941: }
1942: *( ( uint8_t * ) read++ ) = data;
1943: } else {
1944: data = *( ( uint8_t * ) write++ );
1945: if ( ( rc = linda_ib_epb_write ( linda,
1946: LINDA_EPB_UC_DATA,
1947: data ) ) != 0 )
1948: break;
1949: }
1950: address++;
1951: len--;
1952:
1953: /* Reset the control byte after each chunk */
1954: if ( ( address % LINDA_EPB_UC_CHUNK_SIZE ) == 0 ) {
1955: if ( ( rc = linda_ib_epb_write ( linda,
1956: LINDA_EPB_UC_CTL,
1957: 0 ) ) != 0 )
1958: break;
1959: }
1960: }
1961:
1962: /* Release bus */
1963: linda_ib_epb_release ( linda );
1964:
1965: out:
1966: DBG_ENABLE ( DBGLVL_IO );
1967: return rc;
1968: }
1969:
1970: /***************************************************************************
1971: *
1972: * Infiniband SerDes initialisation
1973: *
1974: ***************************************************************************
1975: */
1976:
1977: /** A Linda SerDes parameter */
1978: struct linda_serdes_param {
1979: /** EPB address as constructed by LINDA_EPB_ADDRESS() */
1980: uint16_t address;
1981: /** Value to set */
1982: uint8_t value;
1983: /** Mask to apply to old value */
1984: uint8_t mask;
1985: } __packed;
1986:
1987: /** Magic "all channels" channel number */
1988: #define LINDA_EPB_ALL_CHANNELS 31
1989:
1990: /** End of SerDes parameter list marker */
1991: #define LINDA_SERDES_PARAM_END { 0, 0, 0 }
1992:
1993: /**
1994: * Program IB SerDes register(s)
1995: *
1996: * @v linda Linda device
1997: * @v param SerDes parameter
1998: * @ret rc Return status code
1999: */
2000: static int linda_set_serdes_param ( struct linda *linda,
2001: struct linda_serdes_param *param ) {
2002: unsigned int channel;
2003: unsigned int channel_start;
2004: unsigned int channel_end;
2005: unsigned int element;
2006: unsigned int reg;
2007: int rc;
2008:
2009: /* Break down the EPB address and determine channels */
2010: channel = LINDA_EPB_ADDRESS_CHANNEL ( param->address );
2011: element = LINDA_EPB_ADDRESS_ELEMENT ( param->address );
2012: reg = LINDA_EPB_ADDRESS_REG ( param->address );
2013: if ( channel == LINDA_EPB_ALL_CHANNELS ) {
2014: channel_start = 0;
2015: channel_end = 3;
2016: } else {
2017: channel_start = channel_end = channel;
2018: }
2019:
2020: /* Modify register for each specified channel */
2021: for ( channel = channel_start ; channel <= channel_end ; channel++ ) {
2022: if ( ( rc = linda_ib_epb_mod_reg ( linda, LINDA_EPB_CS_SERDES,
2023: channel, element, reg,
2024: param->value,
2025: param->mask ) ) != 0 )
2026: return rc;
2027: }
2028:
2029: return 0;
2030: }
2031:
2032: /**
2033: * Program IB SerDes registers
2034: *
2035: * @v linda Linda device
2036: * @v param SerDes parameters
2037: * @v count Number of parameters
2038: * @ret rc Return status code
2039: */
2040: static int linda_set_serdes_params ( struct linda *linda,
2041: struct linda_serdes_param *params ) {
2042: int rc;
2043:
2044: for ( ; params->mask != 0 ; params++ ){
2045: if ( ( rc = linda_set_serdes_param ( linda,
2046: params ) ) != 0 )
2047: return rc;
2048: }
2049:
2050: return 0;
2051: }
2052:
2053: #define LINDA_DDS_VAL( amp_d, main_d, ipst_d, ipre_d, \
2054: amp_s, main_s, ipst_s, ipre_s ) \
2055: { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x00 ), \
2056: ( ( ( amp_d & 0x1f ) << 1 ) | 1 ), 0xff }, \
2057: { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x01 ), \
2058: ( ( ( amp_s & 0x1f ) << 1 ) | 1 ), 0xff }, \
2059: { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x09 ), \
2060: ( ( main_d << 3 ) | 4 | ( ipre_d >> 2 ) ), 0xff }, \
2061: { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x0a ), \
2062: ( ( main_s << 3 ) | 4 | ( ipre_s >> 2 ) ), 0xff }, \
2063: { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x06 ), \
2064: ( ( ( ipst_d & 0xf ) << 1 ) | \
2065: ( ( ipre_d & 3 ) << 6 ) | 0x21 ), 0xff }, \
2066: { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 9, 0x07 ), \
2067: ( ( ( ipst_s & 0xf ) << 1 ) | \
2068: ( ( ipre_s & 3 ) << 6) | 0x21 ), 0xff }
2069:
2070: /**
2071: * Linda SerDes default parameters
2072: *
2073: * These magic start-of-day values are taken from the Linux driver.
2074: */
2075: static struct linda_serdes_param linda_serdes_defaults1[] = {
2076: /* RXHSCTRL0 */
2077: { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x00 ), 0xd4, 0xff },
2078: /* VCDL_DAC2 */
2079: { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x05 ), 0x2d, 0xff },
2080: /* VCDL_CTRL2 */
2081: { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x08 ), 0x03, 0x0f },
2082: /* START_EQ1 */
2083: { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x27 ), 0x10, 0xff },
2084: /* START_EQ2 */
2085: { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x28 ), 0x30, 0xff },
2086: /* BACTRL */
2087: { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x0e ), 0x40, 0xff },
2088: /* LDOUTCTRL1 */
2089: { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x06 ), 0x04, 0xff },
2090: /* RXHSSTATUS */
2091: { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x0f ), 0x04, 0xff },
2092: /* End of this block */
2093: LINDA_SERDES_PARAM_END
2094: };
2095: static struct linda_serdes_param linda_serdes_defaults2[] = {
2096: /* LDOUTCTRL1 */
2097: { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x06 ), 0x00, 0xff },
2098: /* DDS values */
2099: LINDA_DDS_VAL ( 31, 19, 12, 0, 29, 22, 9, 0 ),
2100: /* Set Rcv Eq. to Preset node */
2101: { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x27 ), 0x10, 0xff },
2102: /* DFELTHFDR */
2103: { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x08 ), 0x00, 0xff },
2104: /* DFELTHHDR */
2105: { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x21 ), 0x00, 0xff },
2106: /* TLTHFDR */
2107: { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x09 ), 0x02, 0xff },
2108: /* TLTHHDR */
2109: { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x23 ), 0x02, 0xff },
2110: /* ZFR */
2111: { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x1b ), 0x0c, 0xff },
2112: /* ZCNT) */
2113: { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x1c ), 0x0c, 0xff },
2114: /* GFR */
2115: { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x1e ), 0x10, 0xff },
2116: /* GHR */
2117: { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x1f ), 0x10, 0xff },
2118: /* VCDL_CTRL0 toggle */
2119: { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x06 ), 0x20, 0xff },
2120: { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 6, 0x06 ), 0x00, 0xff },
2121: /* CMUCTRL5 */
2122: { LINDA_EPB_ADDRESS ( 7, 0, 0x15 ), 0x80, 0xff },
2123: /* End of this block */
2124: LINDA_SERDES_PARAM_END
2125: };
2126: static struct linda_serdes_param linda_serdes_defaults3[] = {
2127: /* START_EQ1 */
2128: { LINDA_EPB_ADDRESS ( LINDA_EPB_ALL_CHANNELS, 7, 0x27 ), 0x00, 0x38 },
2129: /* End of this block */
2130: LINDA_SERDES_PARAM_END
2131: };
2132:
2133: /**
2134: * Program the microcontroller RAM
2135: *
2136: * @v linda Linda device
2137: * @ret rc Return status code
2138: */
2139: static int linda_program_uc_ram ( struct linda *linda ) {
2140: int rc;
2141:
2142: if ( ( rc = linda_ib_epb_ram_xfer ( linda, 0, linda_ib_fw, NULL,
2143: sizeof ( linda_ib_fw ) ) ) != 0 ){
2144: DBGC ( linda, "Linda %p could not load IB firmware: %s\n",
2145: linda, strerror ( rc ) );
2146: return rc;
2147: }
2148:
2149: return 0;
2150: }
2151:
2152: /**
2153: * Verify the microcontroller RAM
2154: *
2155: * @v linda Linda device
2156: * @ret rc Return status code
2157: */
2158: static int linda_verify_uc_ram ( struct linda *linda ) {
2159: uint8_t verify[LINDA_EPB_UC_CHUNK_SIZE];
2160: unsigned int offset;
2161: int rc;
2162:
2163: for ( offset = 0 ; offset < sizeof ( linda_ib_fw );
2164: offset += sizeof ( verify ) ) {
2165: if ( ( rc = linda_ib_epb_ram_xfer ( linda, offset,
2166: NULL, verify,
2167: sizeof (verify) )) != 0 ){
2168: DBGC ( linda, "Linda %p could not read back IB "
2169: "firmware: %s\n", linda, strerror ( rc ) );
2170: return rc;
2171: }
2172: if ( memcmp ( ( linda_ib_fw + offset ), verify,
2173: sizeof ( verify ) ) != 0 ) {
2174: DBGC ( linda, "Linda %p firmware verification failed "
2175: "at offset %#x\n", linda, offset );
2176: DBGC_HDA ( linda, offset, ( linda_ib_fw + offset ),
2177: sizeof ( verify ) );
2178: DBGC_HDA ( linda, offset, verify, sizeof ( verify ) );
2179: return -EIO;
2180: }
2181: }
2182:
2183: DBGC2 ( linda, "Linda %p firmware verified ok\n", linda );
2184: return 0;
2185: }
2186:
2187: /**
2188: * Use the microcontroller to trim the IB link
2189: *
2190: * @v linda Linda device
2191: * @ret rc Return status code
2192: */
2193: static int linda_trim_ib ( struct linda *linda ) {
2194: struct QIB_7220_IBSerDesCtrl ctrl;
2195: struct QIB_7220_IntStatus intstatus;
2196: unsigned int i;
2197: int rc;
2198:
2199: /* Bring the microcontroller out of reset */
2200: linda_readq ( linda, &ctrl, QIB_7220_IBSerDesCtrl_offset );
2201: BIT_SET ( &ctrl, ResetIB_uC_Core, 0 );
2202: linda_writeq ( linda, &ctrl, QIB_7220_IBSerDesCtrl_offset );
2203:
2204: /* Wait for the "trim done" signal */
2205: for ( i = 0 ; i < LINDA_TRIM_DONE_MAX_WAIT_MS ; i++ ) {
2206: linda_readq ( linda, &intstatus, QIB_7220_IntStatus_offset );
2207: if ( BIT_GET ( &intstatus, IBSerdesTrimDone ) ) {
2208: rc = 0;
2209: goto out_reset;
2210: }
2211: mdelay ( 1 );
2212: }
2213:
2214: DBGC ( linda, "Linda %p timed out waiting for trim done\n", linda );
2215: rc = -ETIMEDOUT;
2216: out_reset:
2217: /* Put the microcontroller back into reset */
2218: BIT_SET ( &ctrl, ResetIB_uC_Core, 1 );
2219: linda_writeq ( linda, &ctrl, QIB_7220_IBSerDesCtrl_offset );
2220:
2221: return rc;
2222: }
2223:
2224: /**
2225: * Initialise the IB SerDes
2226: *
2227: * @v linda Linda device
2228: * @ret rc Return status code
2229: */
2230: static int linda_init_ib_serdes ( struct linda *linda ) {
2231: struct QIB_7220_Control control;
2232: struct QIB_7220_IBCCtrl ibcctrl;
2233: struct QIB_7220_IBCDDRCtrl ibcddrctrl;
2234: struct QIB_7220_XGXSCfg xgxscfg;
2235: int rc;
2236:
2237: /* Disable link */
2238: linda_readq ( linda, &control, QIB_7220_Control_offset );
2239: BIT_SET ( &control, LinkEn, 0 );
2240: linda_writeq ( linda, &control, QIB_7220_Control_offset );
2241:
2242: /* Configure sensible defaults for IBC */
2243: memset ( &ibcctrl, 0, sizeof ( ibcctrl ) );
2244: BIT_FILL_6 ( &ibcctrl, /* Tuning values taken from Linux driver */
2245: FlowCtrlPeriod, 0x03,
2246: FlowCtrlWaterMark, 0x05,
2247: MaxPktLen, ( ( LINDA_RECV_HEADER_SIZE +
2248: LINDA_RECV_PAYLOAD_SIZE +
2249: 4 /* ICRC */ ) >> 2 ),
2250: PhyerrThreshold, 0xf,
2251: OverrunThreshold, 0xf,
2252: CreditScale, 0x4 );
2253: linda_writeq ( linda, &ibcctrl, QIB_7220_IBCCtrl_offset );
2254:
2255: /* Force SDR only to avoid needing all the DDR tuning,
2256: * Mellanox compatibility hacks etc. SDR is plenty for
2257: * boot-time operation.
2258: */
2259: linda_readq ( linda, &ibcddrctrl, QIB_7220_IBCDDRCtrl_offset );
2260: BIT_SET ( &ibcddrctrl, IB_ENHANCED_MODE, 0 );
2261: BIT_SET ( &ibcddrctrl, SD_SPEED_SDR, 1 );
2262: BIT_SET ( &ibcddrctrl, SD_SPEED_DDR, 0 );
2263: BIT_SET ( &ibcddrctrl, SD_SPEED_QDR, 0 );
2264: BIT_SET ( &ibcddrctrl, HRTBT_ENB, 0 );
2265: BIT_SET ( &ibcddrctrl, HRTBT_AUTO, 0 );
2266: linda_writeq ( linda, &ibcddrctrl, QIB_7220_IBCDDRCtrl_offset );
2267:
2268: /* Set default SerDes parameters */
2269: if ( ( rc = linda_set_serdes_params ( linda,
2270: linda_serdes_defaults1 ) ) != 0 )
2271: return rc;
2272: udelay ( 415 ); /* Magic delay while SerDes sorts itself out */
2273: if ( ( rc = linda_set_serdes_params ( linda,
2274: linda_serdes_defaults2 ) ) != 0 )
2275: return rc;
2276:
2277: /* Program the microcontroller RAM */
2278: if ( ( rc = linda_program_uc_ram ( linda ) ) != 0 )
2279: return rc;
2280:
2281: /* Verify the microcontroller RAM contents */
2282: if ( DBGLVL_LOG ) {
2283: if ( ( rc = linda_verify_uc_ram ( linda ) ) != 0 )
2284: return rc;
2285: }
2286:
2287: /* More SerDes tuning */
2288: if ( ( rc = linda_set_serdes_params ( linda,
2289: linda_serdes_defaults3 ) ) != 0 )
2290: return rc;
2291:
2292: /* Use the microcontroller to trim the IB link */
2293: if ( ( rc = linda_trim_ib ( linda ) ) != 0 )
2294: return rc;
2295:
2296: /* Bring XGXS out of reset */
2297: linda_readq ( linda, &xgxscfg, QIB_7220_XGXSCfg_offset );
2298: BIT_SET ( &xgxscfg, tx_rx_reset, 0 );
2299: BIT_SET ( &xgxscfg, xcv_reset, 0 );
2300: linda_writeq ( linda, &xgxscfg, QIB_7220_XGXSCfg_offset );
2301:
2302: return rc;
2303: }
2304:
2305: /***************************************************************************
2306: *
2307: * PCI layer interface
2308: *
2309: ***************************************************************************
2310: */
2311:
2312: /**
2313: * Probe PCI device
2314: *
2315: * @v pci PCI device
2316: * @v id PCI ID
2317: * @ret rc Return status code
2318: */
2319: static int linda_probe ( struct pci_device *pci ) {
2320: struct ib_device *ibdev;
2321: struct linda *linda;
2322: struct QIB_7220_Revision revision;
2323: int rc;
2324:
2325: /* Allocate Infiniband device */
2326: ibdev = alloc_ibdev ( sizeof ( *linda ) );
2327: if ( ! ibdev ) {
2328: rc = -ENOMEM;
2329: goto err_alloc_ibdev;
2330: }
2331: pci_set_drvdata ( pci, ibdev );
2332: linda = ib_get_drvdata ( ibdev );
2333: ibdev->op = &linda_ib_operations;
2334: ibdev->dev = &pci->dev;
2335: ibdev->port = 1;
2336:
2337: /* Fix up PCI device */
2338: adjust_pci_device ( pci );
2339:
2340: /* Get PCI BARs */
2341: linda->regs = ioremap ( pci->membase, LINDA_BAR0_SIZE );
2342: DBGC2 ( linda, "Linda %p has BAR at %08lx\n", linda, pci->membase );
2343:
2344: /* Print some general data */
2345: linda_readq ( linda, &revision, QIB_7220_Revision_offset );
2346: DBGC2 ( linda, "Linda %p board %02lx v%ld.%ld.%ld.%ld\n", linda,
2347: BIT_GET ( &revision, BoardID ),
2348: BIT_GET ( &revision, R_SW ),
2349: BIT_GET ( &revision, R_Arch ),
2350: BIT_GET ( &revision, R_ChipRevMajor ),
2351: BIT_GET ( &revision, R_ChipRevMinor ) );
2352:
2353: /* Record link capabilities. Note that we force SDR only to
2354: * avoid having to carry extra code for DDR tuning etc.
2355: */
2356: ibdev->link_width_enabled = ibdev->link_width_supported =
2357: ( IB_LINK_WIDTH_4X | IB_LINK_WIDTH_1X );
2358: ibdev->link_speed_enabled = ibdev->link_speed_supported =
2359: IB_LINK_SPEED_SDR;
2360:
2361: /* Initialise I2C subsystem */
2362: if ( ( rc = linda_init_i2c ( linda ) ) != 0 )
2363: goto err_init_i2c;
2364:
2365: /* Read EEPROM parameters */
2366: if ( ( rc = linda_read_eeprom ( linda, &ibdev->node_guid ) ) != 0 )
2367: goto err_read_eeprom;
2368: memcpy ( &ibdev->gid.s.guid, &ibdev->node_guid,
2369: sizeof ( ibdev->gid.s.guid ) );
2370:
2371: /* Initialise send datapath */
2372: if ( ( rc = linda_init_send ( linda ) ) != 0 )
2373: goto err_init_send;
2374:
2375: /* Initialise receive datapath */
2376: if ( ( rc = linda_init_recv ( linda ) ) != 0 )
2377: goto err_init_recv;
2378:
2379: /* Initialise the IB SerDes */
2380: if ( ( rc = linda_init_ib_serdes ( linda ) ) != 0 )
2381: goto err_init_ib_serdes;
2382:
2383: /* Register Infiniband device */
2384: if ( ( rc = register_ibdev ( ibdev ) ) != 0 ) {
2385: DBGC ( linda, "Linda %p could not register IB "
2386: "device: %s\n", linda, strerror ( rc ) );
2387: goto err_register_ibdev;
2388: }
2389:
2390: return 0;
2391:
2392: unregister_ibdev ( ibdev );
2393: err_register_ibdev:
2394: linda_fini_recv ( linda );
2395: err_init_recv:
2396: linda_fini_send ( linda );
2397: err_init_send:
2398: err_init_ib_serdes:
2399: err_read_eeprom:
2400: err_init_i2c:
2401: ibdev_put ( ibdev );
2402: err_alloc_ibdev:
2403: return rc;
2404: }
2405:
2406: /**
2407: * Remove PCI device
2408: *
2409: * @v pci PCI device
2410: */
2411: static void linda_remove ( struct pci_device *pci ) {
2412: struct ib_device *ibdev = pci_get_drvdata ( pci );
2413: struct linda *linda = ib_get_drvdata ( ibdev );
2414:
2415: unregister_ibdev ( ibdev );
2416: linda_fini_recv ( linda );
2417: linda_fini_send ( linda );
2418: ibdev_put ( ibdev );
2419: }
2420:
2421: static struct pci_device_id linda_nics[] = {
2422: PCI_ROM ( 0x1077, 0x7220, "iba7220", "QLE7240/7280 HCA driver", 0 ),
2423: };
2424:
2425: struct pci_driver linda_driver __pci_driver = {
2426: .ids = linda_nics,
2427: .id_count = ( sizeof ( linda_nics ) / sizeof ( linda_nics[0] ) ),
2428: .probe = linda_probe,
2429: .remove = linda_remove,
2430: };
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.