Annotation of qemu/roms/ipxe/src/drivers/infiniband/linda.h, revision 1.1.1.1

1.1       root        1: #ifndef _LINDA_H
                      2: #define _LINDA_H
                      3: 
                      4: /*
                      5:  * Copyright (C) 2008 Michael Brown <[email protected]>.
                      6:  *
                      7:  * This program is free software; you can redistribute it and/or
                      8:  * modify it under the terms of the GNU General Public License as
                      9:  * published by the Free Software Foundation; either version 2 of the
                     10:  * License, or any later version.
                     11:  *
                     12:  * This program is distributed in the hope that it will be useful, but
                     13:  * WITHOUT ANY WARRANTY; without even the implied warranty of
                     14:  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
                     15:  * General Public License for more details.
                     16:  *
                     17:  * You should have received a copy of the GNU General Public License
                     18:  * along with this program; if not, write to the Free Software
                     19:  * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
                     20:  */
                     21: 
                     22: FILE_LICENCE ( GPL2_OR_LATER );
                     23: 
                     24: /**
                     25:  * @file
                     26:  *
                     27:  * QLogic Linda Infiniband HCA
                     28:  *
                     29:  */
                     30: 
                     31: #define BITOPS_LITTLE_ENDIAN
                     32: #include <ipxe/bitops.h>
                     33: #include "qib_7220_regs.h"
                     34: 
                     35: struct ib_device;
                     36: 
                     37: /** A Linda GPIO register */
                     38: struct QIB_7220_GPIO_pb {
                     39:        pseudo_bit_t GPIO[16];
                     40:        pseudo_bit_t Reserved[48];
                     41: };
                     42: struct QIB_7220_GPIO {
                     43:        PSEUDO_BIT_STRUCT ( struct QIB_7220_GPIO_pb );
                     44: };
                     45: 
                     46: /** A Linda general scalar register */
                     47: struct QIB_7220_scalar_pb {
                     48:        pseudo_bit_t Value[64];
                     49: };
                     50: struct QIB_7220_scalar {
                     51:        PSEUDO_BIT_STRUCT ( struct QIB_7220_scalar_pb );
                     52: };
                     53: 
                     54: /** Linda send per-buffer control word */
                     55: struct QIB_7220_SendPbc_pb {
                     56:        pseudo_bit_t LengthP1_toibc[11];
                     57:        pseudo_bit_t Reserved1[4];
                     58:        pseudo_bit_t LengthP1_trigger[11];
                     59:        pseudo_bit_t Reserved2[3];
                     60:        pseudo_bit_t TestEbp[1];
                     61:        pseudo_bit_t Test[1];
                     62:        pseudo_bit_t Intr[1];
                     63:        pseudo_bit_t Reserved3[31];
                     64:        pseudo_bit_t VL15[1];
                     65: };
                     66: struct QIB_7220_SendPbc {
                     67:        PSEUDO_BIT_STRUCT ( struct QIB_7220_SendPbc_pb );
                     68: };
                     69: 
                     70: /** Linda send buffer availability */
                     71: struct QIB_7220_SendBufAvail_pb {
                     72:        pseudo_bit_t InUseCheck[144][2];
                     73:        pseudo_bit_t Reserved[32];
                     74: };
                     75: struct QIB_7220_SendBufAvail {
                     76:        PSEUDO_BIT_STRUCT ( struct QIB_7220_SendBufAvail_pb );
                     77: };
                     78: 
                     79: /** DMA alignment for send buffer availability */
                     80: #define LINDA_SENDBUFAVAIL_ALIGN 64
                     81: 
                     82: /** A Linda eager receive descriptor */
                     83: struct QIB_7220_RcvEgr_pb {
                     84:        pseudo_bit_t Addr[37];
                     85:        pseudo_bit_t BufSize[3];
                     86:        pseudo_bit_t Reserved[24];
                     87: };
                     88: struct QIB_7220_RcvEgr {
                     89:        PSEUDO_BIT_STRUCT ( struct QIB_7220_RcvEgr_pb );
                     90: };
                     91: 
                     92: /** Linda receive header flags */
                     93: struct QIB_7220_RcvHdrFlags_pb {
                     94:        pseudo_bit_t PktLen[11];
                     95:        pseudo_bit_t RcvType[3];
                     96:        pseudo_bit_t SoftB[1];
                     97:        pseudo_bit_t SoftA[1];
                     98:        pseudo_bit_t EgrIndex[12];
                     99:        pseudo_bit_t Reserved1[3];
                    100:        pseudo_bit_t UseEgrBfr[1];
                    101:        pseudo_bit_t RcvSeq[4];
                    102:        pseudo_bit_t HdrqOffset[11];
                    103:        pseudo_bit_t Reserved2[8];
                    104:        pseudo_bit_t IBErr[1];
                    105:        pseudo_bit_t MKErr[1];
                    106:        pseudo_bit_t TIDErr[1];
                    107:        pseudo_bit_t KHdrErr[1];
                    108:        pseudo_bit_t MTUErr[1];
                    109:        pseudo_bit_t LenErr[1];
                    110:        pseudo_bit_t ParityErr[1];
                    111:        pseudo_bit_t VCRCErr[1];
                    112:        pseudo_bit_t ICRCErr[1];
                    113: };
                    114: struct QIB_7220_RcvHdrFlags {
                    115:        PSEUDO_BIT_STRUCT ( struct QIB_7220_RcvHdrFlags_pb );
                    116: };
                    117: 
                    118: /** Linda memory BAR size */
                    119: #define LINDA_BAR0_SIZE 0x400000
                    120: 
                    121: /** Linda I2C SCL line GPIO number */
                    122: #define LINDA_GPIO_SCL 0
                    123: 
                    124: /** Linda I2C SDA line GPIO number */
                    125: #define LINDA_GPIO_SDA 1
                    126: 
                    127: /** GUID offset within EEPROM */
                    128: #define LINDA_EEPROM_GUID_OFFSET 3
                    129: 
                    130: /** GUID size within EEPROM */
                    131: #define LINDA_EEPROM_GUID_SIZE 8
                    132: 
                    133: /** Board serial number offset within EEPROM */
                    134: #define LINDA_EEPROM_SERIAL_OFFSET 12
                    135: 
                    136: /** Board serial number size within EEPROM */
                    137: #define LINDA_EEPROM_SERIAL_SIZE 12
                    138: 
                    139: /** Maximum number of send buffers used
                    140:  *
                    141:  * This is a policy decision.  Must be less than or equal to the total
                    142:  * number of send buffers supported by the hardware (128).
                    143:  */
                    144: #define LINDA_MAX_SEND_BUFS 32
                    145: 
                    146: /** Linda send buffer size */
                    147: #define LINDA_SEND_BUF_SIZE 4096
                    148: 
                    149: /** Number of contexts (including kernel context)
                    150:  *
                    151:  * This is a policy decision.  Must be 5, 9 or 17.
                    152:  */
                    153: #define LINDA_NUM_CONTEXTS 5
                    154: 
                    155: /** PortCfg values for different numbers of contexts */
                    156: enum linda_portcfg {
                    157:        LINDA_PORTCFG_5CTX = 0,
                    158:        LINDA_PORTCFG_9CTX = 1,
                    159:        LINDA_PORTCFG_17CTX = 2,
                    160: };
                    161: 
                    162: /** PortCfg values for different numbers of contexts */
                    163: #define LINDA_EAGER_ARRAY_SIZE_5CTX_0 2048
                    164: #define LINDA_EAGER_ARRAY_SIZE_5CTX_OTHER 4096
                    165: #define LINDA_EAGER_ARRAY_SIZE_9CTX_0 2048
                    166: #define LINDA_EAGER_ARRAY_SIZE_9CTX_OTHER 2048
                    167: #define LINDA_EAGER_ARRAY_SIZE_17CTX_0 2048
                    168: #define LINDA_EAGER_ARRAY_SIZE_17CTX_OTHER 1024
                    169: 
                    170: /** Eager buffer required alignment */
                    171: #define LINDA_EAGER_BUFFER_ALIGN 2048
                    172: 
                    173: /** Eager buffer size encodings */
                    174: enum linda_eager_buffer_size {
                    175:        LINDA_EAGER_BUFFER_NONE = 0,
                    176:        LINDA_EAGER_BUFFER_2K = 1,
                    177:        LINDA_EAGER_BUFFER_4K = 2,
                    178:        LINDA_EAGER_BUFFER_8K = 3,
                    179:        LINDA_EAGER_BUFFER_16K = 4,
                    180:        LINDA_EAGER_BUFFER_32K = 5,
                    181:        LINDA_EAGER_BUFFER_64K = 6,
                    182: };
                    183: 
                    184: /** Number of RX headers per context
                    185:  *
                    186:  * This is a policy decision.
                    187:  */
                    188: #define LINDA_RECV_HEADER_COUNT 8
                    189: 
                    190: /** Maximum size of each RX header
                    191:  *
                    192:  * This is a policy decision.  Must be divisible by 4.
                    193:  */
                    194: #define LINDA_RECV_HEADER_SIZE 96
                    195: 
                    196: /** Total size of an RX header ring */
                    197: #define LINDA_RECV_HEADERS_SIZE \
                    198:        ( LINDA_RECV_HEADER_SIZE * LINDA_RECV_HEADER_COUNT )
                    199: 
                    200: /** RX header alignment */
                    201: #define LINDA_RECV_HEADERS_ALIGN 64
                    202: 
                    203: /** RX payload size
                    204:  *
                    205:  * This is a policy decision.  Must be a valid eager buffer size.
                    206:  */
                    207: #define LINDA_RECV_PAYLOAD_SIZE 2048
                    208: 
                    209: /** QPN used for Infinipath Packets
                    210:  *
                    211:  * This is a policy decision.  Must have bit 0 clear.  Must not be a
                    212:  * QPN that we will use.
                    213:  */
                    214: #define LINDA_QP_IDETH 0xdead0
                    215: 
                    216: /** Maximum time for wait for external parallel bus request, in us */
                    217: #define LINDA_EPB_REQUEST_MAX_WAIT_US 500
                    218: 
                    219: /** Maximum time for wait for external parallel bus transaction, in us */
                    220: #define LINDA_EPB_XACT_MAX_WAIT_US 500
                    221: 
                    222: /** Linda external parallel bus chip selects */
                    223: #define LINDA_EPB_CS_SERDES 1
                    224: #define LINDA_EPB_CS_UC 2
                    225: 
                    226: /** Linda external parallel bus read/write operations */
                    227: #define LINDA_EPB_WRITE 0
                    228: #define LINDA_EPB_READ 1
                    229: 
                    230: /** Linda external parallel bus register addresses */
                    231: #define LINDA_EPB_ADDRESS( _channel, _element, _reg ) \
                    232:        ( (_element) | ( (_channel) << 4 ) | ( (_reg) << 9 ) )
                    233: #define LINDA_EPB_ADDRESS_CHANNEL( _address )  ( ( (_address) >> 4 ) & 0x1f )
                    234: #define LINDA_EPB_ADDRESS_ELEMENT( _address )  ( ( (_address) >> 0 ) & 0x0f )
                    235: #define LINDA_EPB_ADDRESS_REG( _address )      ( ( (_address) >> 9 ) & 0x3f )
                    236: 
                    237: /** Linda external parallel bus locations
                    238:  *
                    239:  * The location is used by the driver to encode both the chip select
                    240:  * and the EPB address.
                    241:  */
                    242: #define LINDA_EPB_LOC( _cs, _channel, _element, _reg) \
                    243:        ( ( (_cs) << 16 ) | LINDA_EPB_ADDRESS ( _channel, _element, _reg ) )
                    244: #define LINDA_EPB_LOC_ADDRESS( _loc )  ( (_loc) & 0xffff )
                    245: #define LINDA_EPB_LOC_CS( _loc )       ( (_loc) >> 16 )
                    246: 
                    247: /** Linda external parallel bus microcontroller register addresses */
                    248: #define LINDA_EPB_UC_CHANNEL 6
                    249: #define LINDA_EPB_UC_LOC( _reg ) \
                    250:        LINDA_EPB_LOC ( LINDA_EPB_CS_UC, LINDA_EPB_UC_CHANNEL, 0, (_reg) )
                    251: #define LINDA_EPB_UC_CTL       LINDA_EPB_UC_LOC ( 0 )
                    252: #define LINDA_EPB_UC_CTL_WRITE 1
                    253: #define LINDA_EPB_UC_CTL_READ  2
                    254: #define LINDA_EPB_UC_ADDR_LO   LINDA_EPB_UC_LOC ( 2 )
                    255: #define LINDA_EPB_UC_ADDR_HI   LINDA_EPB_UC_LOC ( 3 )
                    256: #define LINDA_EPB_UC_DATA      LINDA_EPB_UC_LOC ( 4 )
                    257: #define LINDA_EPB_UC_CHUNK_SIZE        64
                    258: 
                    259: extern uint8_t linda_ib_fw[8192];
                    260: 
                    261: /** Maximum time to wait for "trim done" signal, in ms */
                    262: #define LINDA_TRIM_DONE_MAX_WAIT_MS 1000
                    263: 
                    264: /** Linda link states */
                    265: enum linda_link_state {
                    266:        LINDA_LINK_STATE_DOWN = 0,
                    267:        LINDA_LINK_STATE_INIT = 1,
                    268:        LINDA_LINK_STATE_ARM = 2,
                    269:        LINDA_LINK_STATE_ACTIVE = 3,
                    270:        LINDA_LINK_STATE_ACT_DEFER = 4,
                    271: };
                    272: 
                    273: /** Maximum time to wait for link state changes, in us */
                    274: #define LINDA_LINK_STATE_MAX_WAIT_US 20
                    275: 
                    276: #endif /* _LINDA_H */

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