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1.1 ! root 1: /* ! 2: * RF Buffer handling functions ! 3: * ! 4: * Copyright (c) 2009 Nick Kossifidis <[email protected]> ! 5: * ! 6: * Permission to use, copy, modify, and distribute this software for any ! 7: * purpose with or without fee is hereby granted, provided that the above ! 8: * copyright notice and this permission notice appear in all copies. ! 9: * ! 10: * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES ! 11: * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF ! 12: * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ! 13: * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES ! 14: * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN ! 15: * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF ! 16: * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. ! 17: * ! 18: */ ! 19: ! 20: ! 21: /* ! 22: * There are some special registers on the RF chip ! 23: * that control various operation settings related mostly to ! 24: * the analog parts (channel, gain adjustment etc). ! 25: * ! 26: * We don't write on those registers directly but ! 27: * we send a data packet on the chip, using a special register, ! 28: * that holds all the settings we need. After we 've sent the ! 29: * data packet, we write on another special register to notify hw ! 30: * to apply the settings. This is done so that control registers ! 31: * can be dynamicaly programmed during operation and the settings ! 32: * are applied faster on the hw. ! 33: * ! 34: * We call each data packet an "RF Bank" and all the data we write ! 35: * (all RF Banks) "RF Buffer". This file holds initial RF Buffer ! 36: * data for the different RF chips, and various info to match RF ! 37: * Buffer offsets with specific RF registers so that we can access ! 38: * them. We tweak these settings on rfregs_init function. ! 39: * ! 40: * Also check out reg.h and U.S. Patent 6677779 B1 (about buffer ! 41: * registers and control registers): ! 42: * ! 43: * http://www.google.com/patents?id=qNURAAAAEBAJ ! 44: */ ! 45: ! 46: ! 47: /* ! 48: * Struct to hold default mode specific RF ! 49: * register values (RF Banks) ! 50: */ ! 51: struct ath5k_ini_rfbuffer { ! 52: u8 rfb_bank; /* RF Bank number */ ! 53: u16 rfb_ctrl_register; /* RF Buffer control register */ ! 54: u32 rfb_mode_data[5]; /* RF Buffer data for each mode */ ! 55: }; ! 56: ! 57: /* ! 58: * Struct to hold RF Buffer field ! 59: * infos used to access certain RF ! 60: * analog registers ! 61: */ ! 62: struct ath5k_rfb_field { ! 63: u8 len; /* Field length */ ! 64: u16 pos; /* Offset on the raw packet */ ! 65: u8 col; /* Column -used for shifting */ ! 66: }; ! 67: ! 68: /* ! 69: * RF analog register definition ! 70: */ ! 71: struct ath5k_rf_reg { ! 72: u8 bank; /* RF Buffer Bank number */ ! 73: u8 index; /* Register's index on rf_regs_idx */ ! 74: struct ath5k_rfb_field field; /* RF Buffer field for this register */ ! 75: }; ! 76: ! 77: /* Map RF registers to indexes ! 78: * We do this to handle common bits and make our ! 79: * life easier by using an index for each register ! 80: * instead of a full rfb_field */ ! 81: enum ath5k_rf_regs_idx { ! 82: /* BANK 6 */ ! 83: AR5K_RF_OB_2GHZ = 0, ! 84: AR5K_RF_OB_5GHZ, ! 85: AR5K_RF_DB_2GHZ, ! 86: AR5K_RF_DB_5GHZ, ! 87: AR5K_RF_FIXED_BIAS_A, ! 88: AR5K_RF_FIXED_BIAS_B, ! 89: AR5K_RF_PWD_XPD, ! 90: AR5K_RF_XPD_SEL, ! 91: AR5K_RF_XPD_GAIN, ! 92: AR5K_RF_PD_GAIN_LO, ! 93: AR5K_RF_PD_GAIN_HI, ! 94: AR5K_RF_HIGH_VC_CP, ! 95: AR5K_RF_MID_VC_CP, ! 96: AR5K_RF_LOW_VC_CP, ! 97: AR5K_RF_PUSH_UP, ! 98: AR5K_RF_PAD2GND, ! 99: AR5K_RF_XB2_LVL, ! 100: AR5K_RF_XB5_LVL, ! 101: AR5K_RF_PWD_ICLOBUF_2G, ! 102: AR5K_RF_PWD_84, ! 103: AR5K_RF_PWD_90, ! 104: AR5K_RF_PWD_130, ! 105: AR5K_RF_PWD_131, ! 106: AR5K_RF_PWD_132, ! 107: AR5K_RF_PWD_136, ! 108: AR5K_RF_PWD_137, ! 109: AR5K_RF_PWD_138, ! 110: AR5K_RF_PWD_166, ! 111: AR5K_RF_PWD_167, ! 112: AR5K_RF_DERBY_CHAN_SEL_MODE, ! 113: /* BANK 7 */ ! 114: AR5K_RF_GAIN_I, ! 115: AR5K_RF_PLO_SEL, ! 116: AR5K_RF_RFGAIN_SEL, ! 117: AR5K_RF_RFGAIN_STEP, ! 118: AR5K_RF_WAIT_S, ! 119: AR5K_RF_WAIT_I, ! 120: AR5K_RF_MAX_TIME, ! 121: AR5K_RF_MIXVGA_OVR, ! 122: AR5K_RF_MIXGAIN_OVR, ! 123: AR5K_RF_MIXGAIN_STEP, ! 124: AR5K_RF_PD_DELAY_A, ! 125: AR5K_RF_PD_DELAY_B, ! 126: AR5K_RF_PD_DELAY_XR, ! 127: AR5K_RF_PD_PERIOD_A, ! 128: AR5K_RF_PD_PERIOD_B, ! 129: AR5K_RF_PD_PERIOD_XR, ! 130: }; ! 131: ! 132: ! 133: /*******************\ ! 134: * RF5111 (Sombrero) * ! 135: \*******************/ ! 136: ! 137: /* BANK 6 len pos col */ ! 138: #define AR5K_RF5111_OB_2GHZ { 3, 119, 0 } ! 139: #define AR5K_RF5111_DB_2GHZ { 3, 122, 0 } ! 140: ! 141: #define AR5K_RF5111_OB_5GHZ { 3, 104, 0 } ! 142: #define AR5K_RF5111_DB_5GHZ { 3, 107, 0 } ! 143: ! 144: #define AR5K_RF5111_PWD_XPD { 1, 95, 0 } ! 145: #define AR5K_RF5111_XPD_GAIN { 4, 96, 0 } ! 146: ! 147: /* Access to PWD registers */ ! 148: #define AR5K_RF5111_PWD(_n) { 1, (135 - _n), 3 } ! 149: ! 150: /* BANK 7 len pos col */ ! 151: #define AR5K_RF5111_GAIN_I { 6, 29, 0 } ! 152: #define AR5K_RF5111_PLO_SEL { 1, 4, 0 } ! 153: #define AR5K_RF5111_RFGAIN_SEL { 1, 36, 0 } ! 154: #define AR5K_RF5111_RFGAIN_STEP { 6, 37, 0 } ! 155: /* Only on AR5212 BaseBand and up */ ! 156: #define AR5K_RF5111_WAIT_S { 5, 19, 0 } ! 157: #define AR5K_RF5111_WAIT_I { 5, 24, 0 } ! 158: #define AR5K_RF5111_MAX_TIME { 2, 49, 0 } ! 159: ! 160: static const struct ath5k_rf_reg rf_regs_5111[] = { ! 161: {6, AR5K_RF_OB_2GHZ, AR5K_RF5111_OB_2GHZ}, ! 162: {6, AR5K_RF_DB_2GHZ, AR5K_RF5111_DB_2GHZ}, ! 163: {6, AR5K_RF_OB_5GHZ, AR5K_RF5111_OB_5GHZ}, ! 164: {6, AR5K_RF_DB_5GHZ, AR5K_RF5111_DB_5GHZ}, ! 165: {6, AR5K_RF_PWD_XPD, AR5K_RF5111_PWD_XPD}, ! 166: {6, AR5K_RF_XPD_GAIN, AR5K_RF5111_XPD_GAIN}, ! 167: {6, AR5K_RF_PWD_84, AR5K_RF5111_PWD(84)}, ! 168: {6, AR5K_RF_PWD_90, AR5K_RF5111_PWD(90)}, ! 169: {7, AR5K_RF_GAIN_I, AR5K_RF5111_GAIN_I}, ! 170: {7, AR5K_RF_PLO_SEL, AR5K_RF5111_PLO_SEL}, ! 171: {7, AR5K_RF_RFGAIN_SEL, AR5K_RF5111_RFGAIN_SEL}, ! 172: {7, AR5K_RF_RFGAIN_STEP, AR5K_RF5111_RFGAIN_STEP}, ! 173: {7, AR5K_RF_WAIT_S, AR5K_RF5111_WAIT_S}, ! 174: {7, AR5K_RF_WAIT_I, AR5K_RF5111_WAIT_I}, ! 175: {7, AR5K_RF_MAX_TIME, AR5K_RF5111_MAX_TIME} ! 176: }; ! 177: ! 178: /* Default mode specific settings */ ! 179: static const struct ath5k_ini_rfbuffer rfb_5111[] = { ! 180: { 0, 0x989c, ! 181: /* mode a/XR mode aTurbo mode b mode g mode gTurbo */ ! 182: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 183: { 0, 0x989c, ! 184: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 185: { 0, 0x989c, ! 186: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 187: { 0, 0x989c, ! 188: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 189: { 0, 0x989c, ! 190: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 191: { 0, 0x989c, ! 192: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 193: { 0, 0x989c, ! 194: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 195: { 0, 0x989c, ! 196: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 197: { 0, 0x989c, ! 198: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 199: { 0, 0x989c, ! 200: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 201: { 0, 0x989c, ! 202: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 203: { 0, 0x989c, ! 204: { 0x00380000, 0x00380000, 0x00380000, 0x00380000, 0x00380000 } }, ! 205: { 0, 0x989c, ! 206: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 207: { 0, 0x989c, ! 208: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 209: { 0, 0x989c, ! 210: { 0x00000000, 0x00000000, 0x000000c0, 0x00000080, 0x00000080 } }, ! 211: { 0, 0x989c, ! 212: { 0x000400f9, 0x000400f9, 0x000400ff, 0x000400fd, 0x000400fd } }, ! 213: { 0, 0x98d4, ! 214: { 0x00000000, 0x00000000, 0x00000004, 0x00000004, 0x00000004 } }, ! 215: { 1, 0x98d4, ! 216: { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } }, ! 217: { 2, 0x98d4, ! 218: { 0x00000010, 0x00000014, 0x00000010, 0x00000010, 0x00000014 } }, ! 219: { 3, 0x98d8, ! 220: { 0x00601068, 0x00601068, 0x00601068, 0x00601068, 0x00601068 } }, ! 221: { 6, 0x989c, ! 222: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 223: { 6, 0x989c, ! 224: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 225: { 6, 0x989c, ! 226: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 227: { 6, 0x989c, ! 228: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 229: { 6, 0x989c, ! 230: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 231: { 6, 0x989c, ! 232: { 0x10000000, 0x10000000, 0x10000000, 0x10000000, 0x10000000 } }, ! 233: { 6, 0x989c, ! 234: { 0x04000000, 0x04000000, 0x04000000, 0x04000000, 0x04000000 } }, ! 235: { 6, 0x989c, ! 236: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 237: { 6, 0x989c, ! 238: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 239: { 6, 0x989c, ! 240: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 241: { 6, 0x989c, ! 242: { 0x00000000, 0x00000000, 0x0a000000, 0x00000000, 0x00000000 } }, ! 243: { 6, 0x989c, ! 244: { 0x003800c0, 0x00380080, 0x023800c0, 0x003800c0, 0x003800c0 } }, ! 245: { 6, 0x989c, ! 246: { 0x00020006, 0x00020006, 0x00000006, 0x00020006, 0x00020006 } }, ! 247: { 6, 0x989c, ! 248: { 0x00000089, 0x00000089, 0x00000089, 0x00000089, 0x00000089 } }, ! 249: { 6, 0x989c, ! 250: { 0x000000a0, 0x000000a0, 0x000000a0, 0x000000a0, 0x000000a0 } }, ! 251: { 6, 0x989c, ! 252: { 0x00040007, 0x00040007, 0x00040007, 0x00040007, 0x00040007 } }, ! 253: { 6, 0x98d4, ! 254: { 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a, 0x0000001a } }, ! 255: { 7, 0x989c, ! 256: { 0x00000040, 0x00000048, 0x00000040, 0x00000040, 0x00000040 } }, ! 257: { 7, 0x989c, ! 258: { 0x00000010, 0x00000010, 0x00000010, 0x00000010, 0x00000010 } }, ! 259: { 7, 0x989c, ! 260: { 0x00000008, 0x00000008, 0x00000008, 0x00000008, 0x00000008 } }, ! 261: { 7, 0x989c, ! 262: { 0x0000004f, 0x0000004f, 0x0000004f, 0x0000004f, 0x0000004f } }, ! 263: { 7, 0x989c, ! 264: { 0x000000f1, 0x000000f1, 0x00000061, 0x000000f1, 0x000000f1 } }, ! 265: { 7, 0x989c, ! 266: { 0x0000904f, 0x0000904f, 0x0000904c, 0x0000904f, 0x0000904f } }, ! 267: { 7, 0x989c, ! 268: { 0x0000125a, 0x0000125a, 0x0000129a, 0x0000125a, 0x0000125a } }, ! 269: { 7, 0x98cc, ! 270: { 0x0000000e, 0x0000000e, 0x0000000f, 0x0000000e, 0x0000000e } }, ! 271: }; ! 272: ! 273: ! 274: ! 275: /***********************\ ! 276: * RF5112/RF2112 (Derby) * ! 277: \***********************/ ! 278: ! 279: /* BANK 7 (Common) len pos col */ ! 280: #define AR5K_RF5112X_GAIN_I { 6, 14, 0 } ! 281: #define AR5K_RF5112X_MIXVGA_OVR { 1, 36, 0 } ! 282: #define AR5K_RF5112X_MIXGAIN_OVR { 2, 37, 0 } ! 283: #define AR5K_RF5112X_MIXGAIN_STEP { 4, 32, 0 } ! 284: #define AR5K_RF5112X_PD_DELAY_A { 4, 58, 0 } ! 285: #define AR5K_RF5112X_PD_DELAY_B { 4, 62, 0 } ! 286: #define AR5K_RF5112X_PD_DELAY_XR { 4, 66, 0 } ! 287: #define AR5K_RF5112X_PD_PERIOD_A { 4, 70, 0 } ! 288: #define AR5K_RF5112X_PD_PERIOD_B { 4, 74, 0 } ! 289: #define AR5K_RF5112X_PD_PERIOD_XR { 4, 78, 0 } ! 290: ! 291: /* RFX112 (Derby 1) */ ! 292: ! 293: /* BANK 6 len pos col */ ! 294: #define AR5K_RF5112_OB_2GHZ { 3, 269, 0 } ! 295: #define AR5K_RF5112_DB_2GHZ { 3, 272, 0 } ! 296: ! 297: #define AR5K_RF5112_OB_5GHZ { 3, 261, 0 } ! 298: #define AR5K_RF5112_DB_5GHZ { 3, 264, 0 } ! 299: ! 300: #define AR5K_RF5112_FIXED_BIAS_A { 1, 260, 0 } ! 301: #define AR5K_RF5112_FIXED_BIAS_B { 1, 259, 0 } ! 302: ! 303: #define AR5K_RF5112_XPD_SEL { 1, 284, 0 } ! 304: #define AR5K_RF5112_XPD_GAIN { 2, 252, 0 } ! 305: ! 306: /* Access to PWD registers */ ! 307: #define AR5K_RF5112_PWD(_n) { 1, (302 - _n), 3 } ! 308: ! 309: static const struct ath5k_rf_reg rf_regs_5112[] = { ! 310: {6, AR5K_RF_OB_2GHZ, AR5K_RF5112_OB_2GHZ}, ! 311: {6, AR5K_RF_DB_2GHZ, AR5K_RF5112_DB_2GHZ}, ! 312: {6, AR5K_RF_OB_5GHZ, AR5K_RF5112_OB_5GHZ}, ! 313: {6, AR5K_RF_DB_5GHZ, AR5K_RF5112_DB_5GHZ}, ! 314: {6, AR5K_RF_FIXED_BIAS_A, AR5K_RF5112_FIXED_BIAS_A}, ! 315: {6, AR5K_RF_FIXED_BIAS_B, AR5K_RF5112_FIXED_BIAS_B}, ! 316: {6, AR5K_RF_XPD_SEL, AR5K_RF5112_XPD_SEL}, ! 317: {6, AR5K_RF_XPD_GAIN, AR5K_RF5112_XPD_GAIN}, ! 318: {6, AR5K_RF_PWD_130, AR5K_RF5112_PWD(130)}, ! 319: {6, AR5K_RF_PWD_131, AR5K_RF5112_PWD(131)}, ! 320: {6, AR5K_RF_PWD_132, AR5K_RF5112_PWD(132)}, ! 321: {6, AR5K_RF_PWD_136, AR5K_RF5112_PWD(136)}, ! 322: {6, AR5K_RF_PWD_137, AR5K_RF5112_PWD(137)}, ! 323: {6, AR5K_RF_PWD_138, AR5K_RF5112_PWD(138)}, ! 324: {7, AR5K_RF_GAIN_I, AR5K_RF5112X_GAIN_I}, ! 325: {7, AR5K_RF_MIXVGA_OVR, AR5K_RF5112X_MIXVGA_OVR}, ! 326: {7, AR5K_RF_MIXGAIN_OVR, AR5K_RF5112X_MIXGAIN_OVR}, ! 327: {7, AR5K_RF_MIXGAIN_STEP, AR5K_RF5112X_MIXGAIN_STEP}, ! 328: {7, AR5K_RF_PD_DELAY_A, AR5K_RF5112X_PD_DELAY_A}, ! 329: {7, AR5K_RF_PD_DELAY_B, AR5K_RF5112X_PD_DELAY_B}, ! 330: {7, AR5K_RF_PD_DELAY_XR, AR5K_RF5112X_PD_DELAY_XR}, ! 331: {7, AR5K_RF_PD_PERIOD_A, AR5K_RF5112X_PD_PERIOD_A}, ! 332: {7, AR5K_RF_PD_PERIOD_B, AR5K_RF5112X_PD_PERIOD_B}, ! 333: {7, AR5K_RF_PD_PERIOD_XR, AR5K_RF5112X_PD_PERIOD_XR}, ! 334: }; ! 335: ! 336: /* Default mode specific settings */ ! 337: static const struct ath5k_ini_rfbuffer rfb_5112[] = { ! 338: { 1, 0x98d4, ! 339: /* mode a/XR mode aTurbo mode b mode g mode gTurbo */ ! 340: { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } }, ! 341: { 2, 0x98d0, ! 342: { 0x03060408, 0x03070408, 0x03060408, 0x03060408, 0x03070408 } }, ! 343: { 3, 0x98dc, ! 344: { 0x00a0c0c0, 0x00a0c0c0, 0x00e0c0c0, 0x00e0c0c0, 0x00e0c0c0 } }, ! 345: { 6, 0x989c, ! 346: { 0x00a00000, 0x00a00000, 0x00a00000, 0x00a00000, 0x00a00000 } }, ! 347: { 6, 0x989c, ! 348: { 0x000a0000, 0x000a0000, 0x000a0000, 0x000a0000, 0x000a0000 } }, ! 349: { 6, 0x989c, ! 350: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 351: { 6, 0x989c, ! 352: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 353: { 6, 0x989c, ! 354: { 0x00660000, 0x00660000, 0x00660000, 0x00660000, 0x00660000 } }, ! 355: { 6, 0x989c, ! 356: { 0x00db0000, 0x00db0000, 0x00db0000, 0x00db0000, 0x00db0000 } }, ! 357: { 6, 0x989c, ! 358: { 0x00f10000, 0x00f10000, 0x00f10000, 0x00f10000, 0x00f10000 } }, ! 359: { 6, 0x989c, ! 360: { 0x00120000, 0x00120000, 0x00120000, 0x00120000, 0x00120000 } }, ! 361: { 6, 0x989c, ! 362: { 0x00120000, 0x00120000, 0x00120000, 0x00120000, 0x00120000 } }, ! 363: { 6, 0x989c, ! 364: { 0x00730000, 0x00730000, 0x00730000, 0x00730000, 0x00730000 } }, ! 365: { 6, 0x989c, ! 366: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 367: { 6, 0x989c, ! 368: { 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000 } }, ! 369: { 6, 0x989c, ! 370: { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } }, ! 371: { 6, 0x989c, ! 372: { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } }, ! 373: { 6, 0x989c, ! 374: { 0x008b0000, 0x008b0000, 0x008b0000, 0x008b0000, 0x008b0000 } }, ! 375: { 6, 0x989c, ! 376: { 0x00600000, 0x00600000, 0x00600000, 0x00600000, 0x00600000 } }, ! 377: { 6, 0x989c, ! 378: { 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000 } }, ! 379: { 6, 0x989c, ! 380: { 0x00840000, 0x00840000, 0x00840000, 0x00840000, 0x00840000 } }, ! 381: { 6, 0x989c, ! 382: { 0x00640000, 0x00640000, 0x00640000, 0x00640000, 0x00640000 } }, ! 383: { 6, 0x989c, ! 384: { 0x00200000, 0x00200000, 0x00200000, 0x00200000, 0x00200000 } }, ! 385: { 6, 0x989c, ! 386: { 0x00240000, 0x00240000, 0x00240000, 0x00240000, 0x00240000 } }, ! 387: { 6, 0x989c, ! 388: { 0x00250000, 0x00250000, 0x00250000, 0x00250000, 0x00250000 } }, ! 389: { 6, 0x989c, ! 390: { 0x00110000, 0x00110000, 0x00110000, 0x00110000, 0x00110000 } }, ! 391: { 6, 0x989c, ! 392: { 0x00110000, 0x00110000, 0x00110000, 0x00110000, 0x00110000 } }, ! 393: { 6, 0x989c, ! 394: { 0x00510000, 0x00510000, 0x00510000, 0x00510000, 0x00510000 } }, ! 395: { 6, 0x989c, ! 396: { 0x1c040000, 0x1c040000, 0x1c040000, 0x1c040000, 0x1c040000 } }, ! 397: { 6, 0x989c, ! 398: { 0x000a0000, 0x000a0000, 0x000a0000, 0x000a0000, 0x000a0000 } }, ! 399: { 6, 0x989c, ! 400: { 0x00a10000, 0x00a10000, 0x00a10000, 0x00a10000, 0x00a10000 } }, ! 401: { 6, 0x989c, ! 402: { 0x00400000, 0x00400000, 0x00400000, 0x00400000, 0x00400000 } }, ! 403: { 6, 0x989c, ! 404: { 0x03090000, 0x03090000, 0x03090000, 0x03090000, 0x03090000 } }, ! 405: { 6, 0x989c, ! 406: { 0x06000000, 0x06000000, 0x06000000, 0x06000000, 0x06000000 } }, ! 407: { 6, 0x989c, ! 408: { 0x000000b0, 0x000000b0, 0x000000a8, 0x000000a8, 0x000000a8 } }, ! 409: { 6, 0x989c, ! 410: { 0x0000002e, 0x0000002e, 0x0000002e, 0x0000002e, 0x0000002e } }, ! 411: { 6, 0x989c, ! 412: { 0x006c4a41, 0x006c4a41, 0x006c4af1, 0x006c4a61, 0x006c4a61 } }, ! 413: { 6, 0x989c, ! 414: { 0x0050892a, 0x0050892a, 0x0050892b, 0x0050892b, 0x0050892b } }, ! 415: { 6, 0x989c, ! 416: { 0x00842400, 0x00842400, 0x00842400, 0x00842400, 0x00842400 } }, ! 417: { 6, 0x989c, ! 418: { 0x00c69200, 0x00c69200, 0x00c69200, 0x00c69200, 0x00c69200 } }, ! 419: { 6, 0x98d0, ! 420: { 0x0002000c, 0x0002000c, 0x0002000c, 0x0002000c, 0x0002000c } }, ! 421: { 7, 0x989c, ! 422: { 0x00000094, 0x00000094, 0x00000094, 0x00000094, 0x00000094 } }, ! 423: { 7, 0x989c, ! 424: { 0x00000091, 0x00000091, 0x00000091, 0x00000091, 0x00000091 } }, ! 425: { 7, 0x989c, ! 426: { 0x0000000a, 0x0000000a, 0x00000012, 0x00000012, 0x00000012 } }, ! 427: { 7, 0x989c, ! 428: { 0x00000080, 0x00000080, 0x00000080, 0x00000080, 0x00000080 } }, ! 429: { 7, 0x989c, ! 430: { 0x000000c1, 0x000000c1, 0x000000c1, 0x000000c1, 0x000000c1 } }, ! 431: { 7, 0x989c, ! 432: { 0x00000060, 0x00000060, 0x00000060, 0x00000060, 0x00000060 } }, ! 433: { 7, 0x989c, ! 434: { 0x000000f0, 0x000000f0, 0x000000f0, 0x000000f0, 0x000000f0 } }, ! 435: { 7, 0x989c, ! 436: { 0x00000022, 0x00000022, 0x00000022, 0x00000022, 0x00000022 } }, ! 437: { 7, 0x989c, ! 438: { 0x00000092, 0x00000092, 0x00000092, 0x00000092, 0x00000092 } }, ! 439: { 7, 0x989c, ! 440: { 0x000000d4, 0x000000d4, 0x000000d4, 0x000000d4, 0x000000d4 } }, ! 441: { 7, 0x989c, ! 442: { 0x000014cc, 0x000014cc, 0x000014cc, 0x000014cc, 0x000014cc } }, ! 443: { 7, 0x989c, ! 444: { 0x0000048c, 0x0000048c, 0x0000048c, 0x0000048c, 0x0000048c } }, ! 445: { 7, 0x98c4, ! 446: { 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003 } }, ! 447: }; ! 448: ! 449: /* RFX112A (Derby 2) */ ! 450: ! 451: /* BANK 6 len pos col */ ! 452: #define AR5K_RF5112A_OB_2GHZ { 3, 287, 0 } ! 453: #define AR5K_RF5112A_DB_2GHZ { 3, 290, 0 } ! 454: ! 455: #define AR5K_RF5112A_OB_5GHZ { 3, 279, 0 } ! 456: #define AR5K_RF5112A_DB_5GHZ { 3, 282, 0 } ! 457: ! 458: #define AR5K_RF5112A_FIXED_BIAS_A { 1, 278, 0 } ! 459: #define AR5K_RF5112A_FIXED_BIAS_B { 1, 277, 0 } ! 460: ! 461: #define AR5K_RF5112A_XPD_SEL { 1, 302, 0 } ! 462: #define AR5K_RF5112A_PDGAINLO { 2, 270, 0 } ! 463: #define AR5K_RF5112A_PDGAINHI { 2, 257, 0 } ! 464: ! 465: /* Access to PWD registers */ ! 466: #define AR5K_RF5112A_PWD(_n) { 1, (306 - _n), 3 } ! 467: ! 468: /* Voltage regulators */ ! 469: #define AR5K_RF5112A_HIGH_VC_CP { 2, 90, 2 } ! 470: #define AR5K_RF5112A_MID_VC_CP { 2, 92, 2 } ! 471: #define AR5K_RF5112A_LOW_VC_CP { 2, 94, 2 } ! 472: #define AR5K_RF5112A_PUSH_UP { 1, 254, 2 } ! 473: ! 474: /* Power consumption */ ! 475: #define AR5K_RF5112A_PAD2GND { 1, 281, 1 } ! 476: #define AR5K_RF5112A_XB2_LVL { 2, 1, 3 } ! 477: #define AR5K_RF5112A_XB5_LVL { 2, 3, 3 } ! 478: ! 479: static const struct ath5k_rf_reg rf_regs_5112a[] = { ! 480: {6, AR5K_RF_OB_2GHZ, AR5K_RF5112A_OB_2GHZ}, ! 481: {6, AR5K_RF_DB_2GHZ, AR5K_RF5112A_DB_2GHZ}, ! 482: {6, AR5K_RF_OB_5GHZ, AR5K_RF5112A_OB_5GHZ}, ! 483: {6, AR5K_RF_DB_5GHZ, AR5K_RF5112A_DB_5GHZ}, ! 484: {6, AR5K_RF_FIXED_BIAS_A, AR5K_RF5112A_FIXED_BIAS_A}, ! 485: {6, AR5K_RF_FIXED_BIAS_B, AR5K_RF5112A_FIXED_BIAS_B}, ! 486: {6, AR5K_RF_XPD_SEL, AR5K_RF5112A_XPD_SEL}, ! 487: {6, AR5K_RF_PD_GAIN_LO, AR5K_RF5112A_PDGAINLO}, ! 488: {6, AR5K_RF_PD_GAIN_HI, AR5K_RF5112A_PDGAINHI}, ! 489: {6, AR5K_RF_PWD_130, AR5K_RF5112A_PWD(130)}, ! 490: {6, AR5K_RF_PWD_131, AR5K_RF5112A_PWD(131)}, ! 491: {6, AR5K_RF_PWD_132, AR5K_RF5112A_PWD(132)}, ! 492: {6, AR5K_RF_PWD_136, AR5K_RF5112A_PWD(136)}, ! 493: {6, AR5K_RF_PWD_137, AR5K_RF5112A_PWD(137)}, ! 494: {6, AR5K_RF_PWD_138, AR5K_RF5112A_PWD(138)}, ! 495: {6, AR5K_RF_PWD_166, AR5K_RF5112A_PWD(166)}, ! 496: {6, AR5K_RF_PWD_167, AR5K_RF5112A_PWD(167)}, ! 497: {6, AR5K_RF_HIGH_VC_CP, AR5K_RF5112A_HIGH_VC_CP}, ! 498: {6, AR5K_RF_MID_VC_CP, AR5K_RF5112A_MID_VC_CP}, ! 499: {6, AR5K_RF_LOW_VC_CP, AR5K_RF5112A_LOW_VC_CP}, ! 500: {6, AR5K_RF_PUSH_UP, AR5K_RF5112A_PUSH_UP}, ! 501: {6, AR5K_RF_PAD2GND, AR5K_RF5112A_PAD2GND}, ! 502: {6, AR5K_RF_XB2_LVL, AR5K_RF5112A_XB2_LVL}, ! 503: {6, AR5K_RF_XB5_LVL, AR5K_RF5112A_XB5_LVL}, ! 504: {7, AR5K_RF_GAIN_I, AR5K_RF5112X_GAIN_I}, ! 505: {7, AR5K_RF_MIXVGA_OVR, AR5K_RF5112X_MIXVGA_OVR}, ! 506: {7, AR5K_RF_MIXGAIN_OVR, AR5K_RF5112X_MIXGAIN_OVR}, ! 507: {7, AR5K_RF_MIXGAIN_STEP, AR5K_RF5112X_MIXGAIN_STEP}, ! 508: {7, AR5K_RF_PD_DELAY_A, AR5K_RF5112X_PD_DELAY_A}, ! 509: {7, AR5K_RF_PD_DELAY_B, AR5K_RF5112X_PD_DELAY_B}, ! 510: {7, AR5K_RF_PD_DELAY_XR, AR5K_RF5112X_PD_DELAY_XR}, ! 511: {7, AR5K_RF_PD_PERIOD_A, AR5K_RF5112X_PD_PERIOD_A}, ! 512: {7, AR5K_RF_PD_PERIOD_B, AR5K_RF5112X_PD_PERIOD_B}, ! 513: {7, AR5K_RF_PD_PERIOD_XR, AR5K_RF5112X_PD_PERIOD_XR}, ! 514: }; ! 515: ! 516: /* Default mode specific settings */ ! 517: static const struct ath5k_ini_rfbuffer rfb_5112a[] = { ! 518: { 1, 0x98d4, ! 519: /* mode a/XR mode aTurbo mode b mode g mode gTurbo */ ! 520: { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } }, ! 521: { 2, 0x98d0, ! 522: { 0x03060408, 0x03070408, 0x03060408, 0x03060408, 0x03070408 } }, ! 523: { 3, 0x98dc, ! 524: { 0x00a020c0, 0x00a020c0, 0x00e020c0, 0x00e020c0, 0x00e020c0 } }, ! 525: { 6, 0x989c, ! 526: { 0x0f000000, 0x0f000000, 0x0f000000, 0x0f000000, 0x0f000000 } }, ! 527: { 6, 0x989c, ! 528: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 529: { 6, 0x989c, ! 530: { 0x00800000, 0x00800000, 0x00800000, 0x00800000, 0x00800000 } }, ! 531: { 6, 0x989c, ! 532: { 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000 } }, ! 533: { 6, 0x989c, ! 534: { 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000 } }, ! 535: { 6, 0x989c, ! 536: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 537: { 6, 0x989c, ! 538: { 0x00180000, 0x00180000, 0x00180000, 0x00180000, 0x00180000 } }, ! 539: { 6, 0x989c, ! 540: { 0x00600000, 0x00600000, 0x006e0000, 0x006e0000, 0x006e0000 } }, ! 541: { 6, 0x989c, ! 542: { 0x00c70000, 0x00c70000, 0x00c70000, 0x00c70000, 0x00c70000 } }, ! 543: { 6, 0x989c, ! 544: { 0x004b0000, 0x004b0000, 0x004b0000, 0x004b0000, 0x004b0000 } }, ! 545: { 6, 0x989c, ! 546: { 0x04480000, 0x04480000, 0x04480000, 0x04480000, 0x04480000 } }, ! 547: { 6, 0x989c, ! 548: { 0x004c0000, 0x004c0000, 0x004c0000, 0x004c0000, 0x004c0000 } }, ! 549: { 6, 0x989c, ! 550: { 0x00e40000, 0x00e40000, 0x00e40000, 0x00e40000, 0x00e40000 } }, ! 551: { 6, 0x989c, ! 552: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 553: { 6, 0x989c, ! 554: { 0x00fc0000, 0x00fc0000, 0x00fc0000, 0x00fc0000, 0x00fc0000 } }, ! 555: { 6, 0x989c, ! 556: { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } }, ! 557: { 6, 0x989c, ! 558: { 0x043f0000, 0x043f0000, 0x043f0000, 0x043f0000, 0x043f0000 } }, ! 559: { 6, 0x989c, ! 560: { 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000, 0x000c0000 } }, ! 561: { 6, 0x989c, ! 562: { 0x02190000, 0x02190000, 0x02190000, 0x02190000, 0x02190000 } }, ! 563: { 6, 0x989c, ! 564: { 0x00240000, 0x00240000, 0x00240000, 0x00240000, 0x00240000 } }, ! 565: { 6, 0x989c, ! 566: { 0x00b40000, 0x00b40000, 0x00b40000, 0x00b40000, 0x00b40000 } }, ! 567: { 6, 0x989c, ! 568: { 0x00990000, 0x00990000, 0x00990000, 0x00990000, 0x00990000 } }, ! 569: { 6, 0x989c, ! 570: { 0x00500000, 0x00500000, 0x00500000, 0x00500000, 0x00500000 } }, ! 571: { 6, 0x989c, ! 572: { 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000 } }, ! 573: { 6, 0x989c, ! 574: { 0x00120000, 0x00120000, 0x00120000, 0x00120000, 0x00120000 } }, ! 575: { 6, 0x989c, ! 576: { 0xc0320000, 0xc0320000, 0xc0320000, 0xc0320000, 0xc0320000 } }, ! 577: { 6, 0x989c, ! 578: { 0x01740000, 0x01740000, 0x01740000, 0x01740000, 0x01740000 } }, ! 579: { 6, 0x989c, ! 580: { 0x00110000, 0x00110000, 0x00110000, 0x00110000, 0x00110000 } }, ! 581: { 6, 0x989c, ! 582: { 0x86280000, 0x86280000, 0x86280000, 0x86280000, 0x86280000 } }, ! 583: { 6, 0x989c, ! 584: { 0x31840000, 0x31840000, 0x31840000, 0x31840000, 0x31840000 } }, ! 585: { 6, 0x989c, ! 586: { 0x00f20080, 0x00f20080, 0x00f20080, 0x00f20080, 0x00f20080 } }, ! 587: { 6, 0x989c, ! 588: { 0x00270019, 0x00270019, 0x00270019, 0x00270019, 0x00270019 } }, ! 589: { 6, 0x989c, ! 590: { 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003 } }, ! 591: { 6, 0x989c, ! 592: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 593: { 6, 0x989c, ! 594: { 0x000000b2, 0x000000b2, 0x000000b2, 0x000000b2, 0x000000b2 } }, ! 595: { 6, 0x989c, ! 596: { 0x00b02084, 0x00b02084, 0x00b02084, 0x00b02084, 0x00b02084 } }, ! 597: { 6, 0x989c, ! 598: { 0x004125a4, 0x004125a4, 0x004125a4, 0x004125a4, 0x004125a4 } }, ! 599: { 6, 0x989c, ! 600: { 0x00119220, 0x00119220, 0x00119220, 0x00119220, 0x00119220 } }, ! 601: { 6, 0x989c, ! 602: { 0x001a4800, 0x001a4800, 0x001a4800, 0x001a4800, 0x001a4800 } }, ! 603: { 6, 0x98d8, ! 604: { 0x000b0230, 0x000b0230, 0x000b0230, 0x000b0230, 0x000b0230 } }, ! 605: { 7, 0x989c, ! 606: { 0x00000094, 0x00000094, 0x00000094, 0x00000094, 0x00000094 } }, ! 607: { 7, 0x989c, ! 608: { 0x00000091, 0x00000091, 0x00000091, 0x00000091, 0x00000091 } }, ! 609: { 7, 0x989c, ! 610: { 0x00000012, 0x00000012, 0x00000012, 0x00000012, 0x00000012 } }, ! 611: { 7, 0x989c, ! 612: { 0x00000080, 0x00000080, 0x00000080, 0x00000080, 0x00000080 } }, ! 613: { 7, 0x989c, ! 614: { 0x000000d9, 0x000000d9, 0x000000d9, 0x000000d9, 0x000000d9 } }, ! 615: { 7, 0x989c, ! 616: { 0x00000060, 0x00000060, 0x00000060, 0x00000060, 0x00000060 } }, ! 617: { 7, 0x989c, ! 618: { 0x000000f0, 0x000000f0, 0x000000f0, 0x000000f0, 0x000000f0 } }, ! 619: { 7, 0x989c, ! 620: { 0x000000a2, 0x000000a2, 0x000000a2, 0x000000a2, 0x000000a2 } }, ! 621: { 7, 0x989c, ! 622: { 0x00000052, 0x00000052, 0x00000052, 0x00000052, 0x00000052 } }, ! 623: { 7, 0x989c, ! 624: { 0x000000d4, 0x000000d4, 0x000000d4, 0x000000d4, 0x000000d4 } }, ! 625: { 7, 0x989c, ! 626: { 0x000014cc, 0x000014cc, 0x000014cc, 0x000014cc, 0x000014cc } }, ! 627: { 7, 0x989c, ! 628: { 0x0000048c, 0x0000048c, 0x0000048c, 0x0000048c, 0x0000048c } }, ! 629: { 7, 0x98c4, ! 630: { 0x00000003, 0x00000003, 0x00000003, 0x00000003, 0x00000003 } }, ! 631: }; ! 632: ! 633: ! 634: ! 635: /******************\ ! 636: * RF2413 (Griffin) * ! 637: \******************/ ! 638: ! 639: /* BANK 6 len pos col */ ! 640: #define AR5K_RF2413_OB_2GHZ { 3, 168, 0 } ! 641: #define AR5K_RF2413_DB_2GHZ { 3, 165, 0 } ! 642: ! 643: static const struct ath5k_rf_reg rf_regs_2413[] = { ! 644: {6, AR5K_RF_OB_2GHZ, AR5K_RF2413_OB_2GHZ}, ! 645: {6, AR5K_RF_DB_2GHZ, AR5K_RF2413_DB_2GHZ}, ! 646: }; ! 647: ! 648: /* Default mode specific settings ! 649: * XXX: a/aTurbo ??? ! 650: */ ! 651: static const struct ath5k_ini_rfbuffer rfb_2413[] = { ! 652: { 1, 0x98d4, ! 653: /* mode a/XR mode aTurbo mode b mode g mode gTurbo */ ! 654: { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } }, ! 655: { 2, 0x98d0, ! 656: { 0x02001408, 0x02011408, 0x02001408, 0x02001408, 0x02011408 } }, ! 657: { 3, 0x98dc, ! 658: { 0x00a020c0, 0x00a020c0, 0x00e020c0, 0x00e020c0, 0x00e020c0 } }, ! 659: { 6, 0x989c, ! 660: { 0xf0000000, 0xf0000000, 0xf0000000, 0xf0000000, 0xf0000000 } }, ! 661: { 6, 0x989c, ! 662: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 663: { 6, 0x989c, ! 664: { 0x03000000, 0x03000000, 0x03000000, 0x03000000, 0x03000000 } }, ! 665: { 6, 0x989c, ! 666: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 667: { 6, 0x989c, ! 668: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 669: { 6, 0x989c, ! 670: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 671: { 6, 0x989c, ! 672: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 673: { 6, 0x989c, ! 674: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 675: { 6, 0x989c, ! 676: { 0x40400000, 0x40400000, 0x40400000, 0x40400000, 0x40400000 } }, ! 677: { 6, 0x989c, ! 678: { 0x65050000, 0x65050000, 0x65050000, 0x65050000, 0x65050000 } }, ! 679: { 6, 0x989c, ! 680: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 681: { 6, 0x989c, ! 682: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 683: { 6, 0x989c, ! 684: { 0x00420000, 0x00420000, 0x00420000, 0x00420000, 0x00420000 } }, ! 685: { 6, 0x989c, ! 686: { 0x00b50000, 0x00b50000, 0x00b50000, 0x00b50000, 0x00b50000 } }, ! 687: { 6, 0x989c, ! 688: { 0x00030000, 0x00030000, 0x00030000, 0x00030000, 0x00030000 } }, ! 689: { 6, 0x989c, ! 690: { 0x00f70000, 0x00f70000, 0x00f70000, 0x00f70000, 0x00f70000 } }, ! 691: { 6, 0x989c, ! 692: { 0x009d0000, 0x009d0000, 0x009d0000, 0x009d0000, 0x009d0000 } }, ! 693: { 6, 0x989c, ! 694: { 0x00220000, 0x00220000, 0x00220000, 0x00220000, 0x00220000 } }, ! 695: { 6, 0x989c, ! 696: { 0x04220000, 0x04220000, 0x04220000, 0x04220000, 0x04220000 } }, ! 697: { 6, 0x989c, ! 698: { 0x00230018, 0x00230018, 0x00230018, 0x00230018, 0x00230018 } }, ! 699: { 6, 0x989c, ! 700: { 0x00280000, 0x00280000, 0x00280060, 0x00280060, 0x00280060 } }, ! 701: { 6, 0x989c, ! 702: { 0x005000c0, 0x005000c0, 0x005000c3, 0x005000c3, 0x005000c3 } }, ! 703: { 6, 0x989c, ! 704: { 0x0004007f, 0x0004007f, 0x0004007f, 0x0004007f, 0x0004007f } }, ! 705: { 6, 0x989c, ! 706: { 0x00000458, 0x00000458, 0x00000458, 0x00000458, 0x00000458 } }, ! 707: { 6, 0x989c, ! 708: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 709: { 6, 0x989c, ! 710: { 0x0000c000, 0x0000c000, 0x0000c000, 0x0000c000, 0x0000c000 } }, ! 711: { 6, 0x98d8, ! 712: { 0x00400230, 0x00400230, 0x00400230, 0x00400230, 0x00400230 } }, ! 713: { 7, 0x989c, ! 714: { 0x00006400, 0x00006400, 0x00006400, 0x00006400, 0x00006400 } }, ! 715: { 7, 0x989c, ! 716: { 0x00000800, 0x00000800, 0x00000800, 0x00000800, 0x00000800 } }, ! 717: { 7, 0x98cc, ! 718: { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } }, ! 719: }; ! 720: ! 721: ! 722: ! 723: /***************************\ ! 724: * RF2315/RF2316 (Cobra SoC) * ! 725: \***************************/ ! 726: ! 727: /* BANK 6 len pos col */ ! 728: #define AR5K_RF2316_OB_2GHZ { 3, 178, 0 } ! 729: #define AR5K_RF2316_DB_2GHZ { 3, 175, 0 } ! 730: ! 731: static const struct ath5k_rf_reg rf_regs_2316[] = { ! 732: {6, AR5K_RF_OB_2GHZ, AR5K_RF2316_OB_2GHZ}, ! 733: {6, AR5K_RF_DB_2GHZ, AR5K_RF2316_DB_2GHZ}, ! 734: }; ! 735: ! 736: /* Default mode specific settings */ ! 737: static const struct ath5k_ini_rfbuffer rfb_2316[] = { ! 738: { 1, 0x98d4, ! 739: /* mode a/XR mode aTurbo mode b mode g mode gTurbo */ ! 740: { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } }, ! 741: { 2, 0x98d0, ! 742: { 0x02001408, 0x02011408, 0x02001408, 0x02001408, 0x02011408 } }, ! 743: { 3, 0x98dc, ! 744: { 0x00a020c0, 0x00a020c0, 0x00e020c0, 0x00e020c0, 0x00e020c0 } }, ! 745: { 6, 0x989c, ! 746: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 747: { 6, 0x989c, ! 748: { 0xc0000000, 0xc0000000, 0xc0000000, 0xc0000000, 0xc0000000 } }, ! 749: { 6, 0x989c, ! 750: { 0x0f000000, 0x0f000000, 0x0f000000, 0x0f000000, 0x0f000000 } }, ! 751: { 6, 0x989c, ! 752: { 0x02000000, 0x02000000, 0x02000000, 0x02000000, 0x02000000 } }, ! 753: { 6, 0x989c, ! 754: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 755: { 6, 0x989c, ! 756: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 757: { 6, 0x989c, ! 758: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 759: { 6, 0x989c, ! 760: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 761: { 6, 0x989c, ! 762: { 0xf8000000, 0xf8000000, 0xf8000000, 0xf8000000, 0xf8000000 } }, ! 763: { 6, 0x989c, ! 764: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 765: { 6, 0x989c, ! 766: { 0x95150000, 0x95150000, 0x95150000, 0x95150000, 0x95150000 } }, ! 767: { 6, 0x989c, ! 768: { 0xc1000000, 0xc1000000, 0xc1000000, 0xc1000000, 0xc1000000 } }, ! 769: { 6, 0x989c, ! 770: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 771: { 6, 0x989c, ! 772: { 0x00080000, 0x00080000, 0x00080000, 0x00080000, 0x00080000 } }, ! 773: { 6, 0x989c, ! 774: { 0x00d50000, 0x00d50000, 0x00d50000, 0x00d50000, 0x00d50000 } }, ! 775: { 6, 0x989c, ! 776: { 0x000e0000, 0x000e0000, 0x000e0000, 0x000e0000, 0x000e0000 } }, ! 777: { 6, 0x989c, ! 778: { 0x00dc0000, 0x00dc0000, 0x00dc0000, 0x00dc0000, 0x00dc0000 } }, ! 779: { 6, 0x989c, ! 780: { 0x00770000, 0x00770000, 0x00770000, 0x00770000, 0x00770000 } }, ! 781: { 6, 0x989c, ! 782: { 0x008a0000, 0x008a0000, 0x008a0000, 0x008a0000, 0x008a0000 } }, ! 783: { 6, 0x989c, ! 784: { 0x10880000, 0x10880000, 0x10880000, 0x10880000, 0x10880000 } }, ! 785: { 6, 0x989c, ! 786: { 0x008c0060, 0x008c0060, 0x008c0060, 0x008c0060, 0x008c0060 } }, ! 787: { 6, 0x989c, ! 788: { 0x00a00000, 0x00a00000, 0x00a00080, 0x00a00080, 0x00a00080 } }, ! 789: { 6, 0x989c, ! 790: { 0x00400000, 0x00400000, 0x0040000d, 0x0040000d, 0x0040000d } }, ! 791: { 6, 0x989c, ! 792: { 0x00110400, 0x00110400, 0x00110400, 0x00110400, 0x00110400 } }, ! 793: { 6, 0x989c, ! 794: { 0x00000060, 0x00000060, 0x00000060, 0x00000060, 0x00000060 } }, ! 795: { 6, 0x989c, ! 796: { 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001 } }, ! 797: { 6, 0x989c, ! 798: { 0x00000b00, 0x00000b00, 0x00000b00, 0x00000b00, 0x00000b00 } }, ! 799: { 6, 0x989c, ! 800: { 0x00000be8, 0x00000be8, 0x00000be8, 0x00000be8, 0x00000be8 } }, ! 801: { 6, 0x98c0, ! 802: { 0x00010000, 0x00010000, 0x00010000, 0x00010000, 0x00010000 } }, ! 803: { 7, 0x989c, ! 804: { 0x00006400, 0x00006400, 0x00006400, 0x00006400, 0x00006400 } }, ! 805: { 7, 0x989c, ! 806: { 0x00000800, 0x00000800, 0x00000800, 0x00000800, 0x00000800 } }, ! 807: { 7, 0x98cc, ! 808: { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } }, ! 809: }; ! 810: ! 811: ! 812: ! 813: /******************************\ ! 814: * RF5413/RF5424 (Eagle/Condor) * ! 815: \******************************/ ! 816: ! 817: /* BANK 6 len pos col */ ! 818: #define AR5K_RF5413_OB_2GHZ { 3, 241, 0 } ! 819: #define AR5K_RF5413_DB_2GHZ { 3, 238, 0 } ! 820: ! 821: #define AR5K_RF5413_OB_5GHZ { 3, 247, 0 } ! 822: #define AR5K_RF5413_DB_5GHZ { 3, 244, 0 } ! 823: ! 824: #define AR5K_RF5413_PWD_ICLOBUF2G { 3, 131, 3 } ! 825: #define AR5K_RF5413_DERBY_CHAN_SEL_MODE { 1, 291, 2 } ! 826: ! 827: static const struct ath5k_rf_reg rf_regs_5413[] = { ! 828: {6, AR5K_RF_OB_2GHZ, AR5K_RF5413_OB_2GHZ}, ! 829: {6, AR5K_RF_DB_2GHZ, AR5K_RF5413_DB_2GHZ}, ! 830: {6, AR5K_RF_OB_5GHZ, AR5K_RF5413_OB_5GHZ}, ! 831: {6, AR5K_RF_DB_5GHZ, AR5K_RF5413_DB_5GHZ}, ! 832: {6, AR5K_RF_PWD_ICLOBUF_2G, AR5K_RF5413_PWD_ICLOBUF2G}, ! 833: {6, AR5K_RF_DERBY_CHAN_SEL_MODE, AR5K_RF5413_DERBY_CHAN_SEL_MODE}, ! 834: }; ! 835: ! 836: /* Default mode specific settings */ ! 837: static const struct ath5k_ini_rfbuffer rfb_5413[] = { ! 838: { 1, 0x98d4, ! 839: /* mode a/XR mode aTurbo mode b mode g mode gTurbo */ ! 840: { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } }, ! 841: { 2, 0x98d0, ! 842: { 0x00000008, 0x00000008, 0x00000008, 0x00000008, 0x00000008 } }, ! 843: { 3, 0x98dc, ! 844: { 0x00a000c0, 0x00a000c0, 0x00e000c0, 0x00e000c0, 0x00e000c0 } }, ! 845: { 6, 0x989c, ! 846: { 0x33000000, 0x33000000, 0x33000000, 0x33000000, 0x33000000 } }, ! 847: { 6, 0x989c, ! 848: { 0x01000000, 0x01000000, 0x01000000, 0x01000000, 0x01000000 } }, ! 849: { 6, 0x989c, ! 850: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 851: { 6, 0x989c, ! 852: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 853: { 6, 0x989c, ! 854: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 855: { 6, 0x989c, ! 856: { 0x1f000000, 0x1f000000, 0x1f000000, 0x1f000000, 0x1f000000 } }, ! 857: { 6, 0x989c, ! 858: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 859: { 6, 0x989c, ! 860: { 0x00b80000, 0x00b80000, 0x00b80000, 0x00b80000, 0x00b80000 } }, ! 861: { 6, 0x989c, ! 862: { 0x00b70000, 0x00b70000, 0x00b70000, 0x00b70000, 0x00b70000 } }, ! 863: { 6, 0x989c, ! 864: { 0x00840000, 0x00840000, 0x00840000, 0x00840000, 0x00840000 } }, ! 865: { 6, 0x989c, ! 866: { 0x00980000, 0x00980000, 0x00980000, 0x00980000, 0x00980000 } }, ! 867: { 6, 0x989c, ! 868: { 0x00c00000, 0x00c00000, 0x00c00000, 0x00c00000, 0x00c00000 } }, ! 869: { 6, 0x989c, ! 870: { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } }, ! 871: { 6, 0x989c, ! 872: { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } }, ! 873: { 6, 0x989c, ! 874: { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } }, ! 875: { 6, 0x989c, ! 876: { 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000, 0x00ff0000 } }, ! 877: { 6, 0x989c, ! 878: { 0x00d70000, 0x00d70000, 0x00d70000, 0x00d70000, 0x00d70000 } }, ! 879: { 6, 0x989c, ! 880: { 0x00610000, 0x00610000, 0x00610000, 0x00610000, 0x00610000 } }, ! 881: { 6, 0x989c, ! 882: { 0x00fe0000, 0x00fe0000, 0x00fe0000, 0x00fe0000, 0x00fe0000 } }, ! 883: { 6, 0x989c, ! 884: { 0x00de0000, 0x00de0000, 0x00de0000, 0x00de0000, 0x00de0000 } }, ! 885: { 6, 0x989c, ! 886: { 0x007f0000, 0x007f0000, 0x007f0000, 0x007f0000, 0x007f0000 } }, ! 887: { 6, 0x989c, ! 888: { 0x043d0000, 0x043d0000, 0x043d0000, 0x043d0000, 0x043d0000 } }, ! 889: { 6, 0x989c, ! 890: { 0x00770000, 0x00770000, 0x00770000, 0x00770000, 0x00770000 } }, ! 891: { 6, 0x989c, ! 892: { 0x00440000, 0x00440000, 0x00440000, 0x00440000, 0x00440000 } }, ! 893: { 6, 0x989c, ! 894: { 0x00980000, 0x00980000, 0x00980000, 0x00980000, 0x00980000 } }, ! 895: { 6, 0x989c, ! 896: { 0x00100080, 0x00100080, 0x00100080, 0x00100080, 0x00100080 } }, ! 897: { 6, 0x989c, ! 898: { 0x0005c034, 0x0005c034, 0x0005c034, 0x0005c034, 0x0005c034 } }, ! 899: { 6, 0x989c, ! 900: { 0x003100f0, 0x003100f0, 0x003100f0, 0x003100f0, 0x003100f0 } }, ! 901: { 6, 0x989c, ! 902: { 0x000c011f, 0x000c011f, 0x000c011f, 0x000c011f, 0x000c011f } }, ! 903: { 6, 0x989c, ! 904: { 0x00510040, 0x00510040, 0x00510040, 0x00510040, 0x00510040 } }, ! 905: { 6, 0x989c, ! 906: { 0x005000da, 0x005000da, 0x005000da, 0x005000da, 0x005000da } }, ! 907: { 6, 0x989c, ! 908: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 909: { 6, 0x989c, ! 910: { 0x00004044, 0x00004044, 0x00004044, 0x00004044, 0x00004044 } }, ! 911: { 6, 0x989c, ! 912: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 913: { 6, 0x989c, ! 914: { 0x000060c0, 0x000060c0, 0x000060c0, 0x000060c0, 0x000060c0 } }, ! 915: { 6, 0x989c, ! 916: { 0x00002c00, 0x00002c00, 0x00003600, 0x00003600, 0x00002c00 } }, ! 917: { 6, 0x98c8, ! 918: { 0x00000403, 0x00000403, 0x00040403, 0x00040403, 0x00040403 } }, ! 919: { 7, 0x989c, ! 920: { 0x00006400, 0x00006400, 0x00006400, 0x00006400, 0x00006400 } }, ! 921: { 7, 0x989c, ! 922: { 0x00000800, 0x00000800, 0x00000800, 0x00000800, 0x00000800 } }, ! 923: { 7, 0x98cc, ! 924: { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } }, ! 925: }; ! 926: ! 927: ! 928: ! 929: /***************************\ ! 930: * RF2425/RF2417 (Swan/Nala) * ! 931: * AR2317 (Spider SoC) * ! 932: \***************************/ ! 933: ! 934: /* BANK 6 len pos col */ ! 935: #define AR5K_RF2425_OB_2GHZ { 3, 193, 0 } ! 936: #define AR5K_RF2425_DB_2GHZ { 3, 190, 0 } ! 937: ! 938: static const struct ath5k_rf_reg rf_regs_2425[] = { ! 939: {6, AR5K_RF_OB_2GHZ, AR5K_RF2425_OB_2GHZ}, ! 940: {6, AR5K_RF_DB_2GHZ, AR5K_RF2425_DB_2GHZ}, ! 941: }; ! 942: ! 943: /* Default mode specific settings ! 944: * XXX: a/aTurbo ? ! 945: */ ! 946: static const struct ath5k_ini_rfbuffer rfb_2425[] = { ! 947: { 1, 0x98d4, ! 948: /* mode a/XR mode aTurbo mode b mode g mode gTurbo */ ! 949: { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } }, ! 950: { 2, 0x98d0, ! 951: { 0x02001408, 0x02001408, 0x02001408, 0x02001408, 0x02001408 } }, ! 952: { 3, 0x98dc, ! 953: { 0x00a020c0, 0x00a020c0, 0x00e020c0, 0x00e020c0, 0x00e020c0 } }, ! 954: { 6, 0x989c, ! 955: { 0x10000000, 0x10000000, 0x10000000, 0x10000000, 0x10000000 } }, ! 956: { 6, 0x989c, ! 957: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 958: { 6, 0x989c, ! 959: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 960: { 6, 0x989c, ! 961: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 962: { 6, 0x989c, ! 963: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 964: { 6, 0x989c, ! 965: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 966: { 6, 0x989c, ! 967: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 968: { 6, 0x989c, ! 969: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 970: { 6, 0x989c, ! 971: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 972: { 6, 0x989c, ! 973: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 974: { 6, 0x989c, ! 975: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 976: { 6, 0x989c, ! 977: { 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000 } }, ! 978: { 6, 0x989c, ! 979: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 980: { 6, 0x989c, ! 981: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 982: { 6, 0x989c, ! 983: { 0x00100000, 0x00100000, 0x00100000, 0x00100000, 0x00100000 } }, ! 984: { 6, 0x989c, ! 985: { 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000 } }, ! 986: { 6, 0x989c, ! 987: { 0x00730000, 0x00730000, 0x00730000, 0x00730000, 0x00730000 } }, ! 988: { 6, 0x989c, ! 989: { 0x00f80000, 0x00f80000, 0x00f80000, 0x00f80000, 0x00f80000 } }, ! 990: { 6, 0x989c, ! 991: { 0x00e70000, 0x00e70000, 0x00e70000, 0x00e70000, 0x00e70000 } }, ! 992: { 6, 0x989c, ! 993: { 0x00140000, 0x00140000, 0x00140000, 0x00140000, 0x00140000 } }, ! 994: { 6, 0x989c, ! 995: { 0x00910040, 0x00910040, 0x00910040, 0x00910040, 0x00910040 } }, ! 996: { 6, 0x989c, ! 997: { 0x0007001a, 0x0007001a, 0x0007001a, 0x0007001a, 0x0007001a } }, ! 998: { 6, 0x989c, ! 999: { 0x00410000, 0x00410000, 0x00410000, 0x00410000, 0x00410000 } }, ! 1000: { 6, 0x989c, ! 1001: { 0x00810000, 0x00810000, 0x00810060, 0x00810060, 0x00810060 } }, ! 1002: { 6, 0x989c, ! 1003: { 0x00020800, 0x00020800, 0x00020803, 0x00020803, 0x00020803 } }, ! 1004: { 6, 0x989c, ! 1005: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 1006: { 6, 0x989c, ! 1007: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 1008: { 6, 0x989c, ! 1009: { 0x00001660, 0x00001660, 0x00001660, 0x00001660, 0x00001660 } }, ! 1010: { 6, 0x989c, ! 1011: { 0x00001688, 0x00001688, 0x00001688, 0x00001688, 0x00001688 } }, ! 1012: { 6, 0x98c4, ! 1013: { 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001 } }, ! 1014: { 7, 0x989c, ! 1015: { 0x00006400, 0x00006400, 0x00006400, 0x00006400, 0x00006400 } }, ! 1016: { 7, 0x989c, ! 1017: { 0x00000800, 0x00000800, 0x00000800, 0x00000800, 0x00000800 } }, ! 1018: { 7, 0x98cc, ! 1019: { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } }, ! 1020: }; ! 1021: ! 1022: /* ! 1023: * TODO: Handle the few differences with swan during ! 1024: * bank modification and get rid of this ! 1025: */ ! 1026: static const struct ath5k_ini_rfbuffer rfb_2317[] = { ! 1027: { 1, 0x98d4, ! 1028: /* mode a/XR mode aTurbo mode b mode g mode gTurbo */ ! 1029: { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } }, ! 1030: { 2, 0x98d0, ! 1031: { 0x02001408, 0x02011408, 0x02001408, 0x02001408, 0x02011408 } }, ! 1032: { 3, 0x98dc, ! 1033: { 0x00a020c0, 0x00a020c0, 0x00e020c0, 0x00e020c0, 0x00e020c0 } }, ! 1034: { 6, 0x989c, ! 1035: { 0x10000000, 0x10000000, 0x10000000, 0x10000000, 0x10000000 } }, ! 1036: { 6, 0x989c, ! 1037: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 1038: { 6, 0x989c, ! 1039: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 1040: { 6, 0x989c, ! 1041: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 1042: { 6, 0x989c, ! 1043: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 1044: { 6, 0x989c, ! 1045: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 1046: { 6, 0x989c, ! 1047: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 1048: { 6, 0x989c, ! 1049: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 1050: { 6, 0x989c, ! 1051: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 1052: { 6, 0x989c, ! 1053: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 1054: { 6, 0x989c, ! 1055: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 1056: { 6, 0x989c, ! 1057: { 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000 } }, ! 1058: { 6, 0x989c, ! 1059: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 1060: { 6, 0x989c, ! 1061: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 1062: { 6, 0x989c, ! 1063: { 0x00100000, 0x00100000, 0x00100000, 0x00100000, 0x00100000 } }, ! 1064: { 6, 0x989c, ! 1065: { 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000 } }, ! 1066: { 6, 0x989c, ! 1067: { 0x00730000, 0x00730000, 0x00730000, 0x00730000, 0x00730000 } }, ! 1068: { 6, 0x989c, ! 1069: { 0x00f80000, 0x00f80000, 0x00f80000, 0x00f80000, 0x00f80000 } }, ! 1070: { 6, 0x989c, ! 1071: { 0x00e70000, 0x00e70000, 0x00e70000, 0x00e70000, 0x00e70000 } }, ! 1072: { 6, 0x989c, ! 1073: { 0x00140100, 0x00140100, 0x00140100, 0x00140100, 0x00140100 } }, ! 1074: { 6, 0x989c, ! 1075: { 0x00910040, 0x00910040, 0x00910040, 0x00910040, 0x00910040 } }, ! 1076: { 6, 0x989c, ! 1077: { 0x0007001a, 0x0007001a, 0x0007001a, 0x0007001a, 0x0007001a } }, ! 1078: { 6, 0x989c, ! 1079: { 0x00410000, 0x00410000, 0x00410000, 0x00410000, 0x00410000 } }, ! 1080: { 6, 0x989c, ! 1081: { 0x00810000, 0x00810000, 0x00810060, 0x00810060, 0x00810060 } }, ! 1082: { 6, 0x989c, ! 1083: { 0x00020800, 0x00020800, 0x00020803, 0x00020803, 0x00020803 } }, ! 1084: { 6, 0x989c, ! 1085: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 1086: { 6, 0x989c, ! 1087: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 1088: { 6, 0x989c, ! 1089: { 0x00001660, 0x00001660, 0x00001660, 0x00001660, 0x00001660 } }, ! 1090: { 6, 0x989c, ! 1091: { 0x00009688, 0x00009688, 0x00009688, 0x00009688, 0x00009688 } }, ! 1092: { 6, 0x98c4, ! 1093: { 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001 } }, ! 1094: { 7, 0x989c, ! 1095: { 0x00006400, 0x00006400, 0x00006400, 0x00006400, 0x00006400 } }, ! 1096: { 7, 0x989c, ! 1097: { 0x00000800, 0x00000800, 0x00000800, 0x00000800, 0x00000800 } }, ! 1098: { 7, 0x98cc, ! 1099: { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } }, ! 1100: }; ! 1101: ! 1102: /* ! 1103: * TODO: Handle the few differences with swan during ! 1104: * bank modification and get rid of this ! 1105: * XXX: a/aTurbo ? ! 1106: */ ! 1107: static const struct ath5k_ini_rfbuffer rfb_2417[] = { ! 1108: { 1, 0x98d4, ! 1109: /* mode a/XR mode aTurbo mode b mode g mode gTurbo */ ! 1110: { 0x00000020, 0x00000020, 0x00000020, 0x00000020, 0x00000020 } }, ! 1111: { 2, 0x98d0, ! 1112: { 0x02001408, 0x02001408, 0x02001408, 0x02001408, 0x02001408 } }, ! 1113: { 3, 0x98dc, ! 1114: { 0x00a020c0, 0x00a020c0, 0x00e020c0, 0x00e020c0, 0x00e020c0 } }, ! 1115: { 6, 0x989c, ! 1116: { 0x10000000, 0x10000000, 0x10000000, 0x10000000, 0x10000000 } }, ! 1117: { 6, 0x989c, ! 1118: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 1119: { 6, 0x989c, ! 1120: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 1121: { 6, 0x989c, ! 1122: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 1123: { 6, 0x989c, ! 1124: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 1125: { 6, 0x989c, ! 1126: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 1127: { 6, 0x989c, ! 1128: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 1129: { 6, 0x989c, ! 1130: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 1131: { 6, 0x989c, ! 1132: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 1133: { 6, 0x989c, ! 1134: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 1135: { 6, 0x989c, ! 1136: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 1137: { 6, 0x989c, ! 1138: { 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000, 0x002a0000 } }, ! 1139: { 6, 0x989c, ! 1140: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 1141: { 6, 0x989c, ! 1142: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 1143: { 6, 0x989c, ! 1144: { 0x00100000, 0x00100000, 0x00100000, 0x00100000, 0x00100000 } }, ! 1145: { 6, 0x989c, ! 1146: { 0x00020000, 0x00020000, 0x00020000, 0x00020000, 0x00020000 } }, ! 1147: { 6, 0x989c, ! 1148: { 0x00730000, 0x00730000, 0x00730000, 0x00730000, 0x00730000 } }, ! 1149: { 6, 0x989c, ! 1150: { 0x00f80000, 0x00f80000, 0x00f80000, 0x00f80000, 0x00f80000 } }, ! 1151: { 6, 0x989c, ! 1152: { 0x00e70000, 0x00e70000, 0x80e70000, 0x80e70000, 0x00e70000 } }, ! 1153: { 6, 0x989c, ! 1154: { 0x00140000, 0x00140000, 0x00140000, 0x00140000, 0x00140000 } }, ! 1155: { 6, 0x989c, ! 1156: { 0x00910040, 0x00910040, 0x00910040, 0x00910040, 0x00910040 } }, ! 1157: { 6, 0x989c, ! 1158: { 0x0007001a, 0x0007001a, 0x0207001a, 0x0207001a, 0x0007001a } }, ! 1159: { 6, 0x989c, ! 1160: { 0x00410000, 0x00410000, 0x00410000, 0x00410000, 0x00410000 } }, ! 1161: { 6, 0x989c, ! 1162: { 0x00810000, 0x00810000, 0x00810060, 0x00810060, 0x00810060 } }, ! 1163: { 6, 0x989c, ! 1164: { 0x00020800, 0x00020800, 0x00020803, 0x00020803, 0x00020803 } }, ! 1165: { 6, 0x989c, ! 1166: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 1167: { 6, 0x989c, ! 1168: { 0x00000000, 0x00000000, 0x00000000, 0x00000000, 0x00000000 } }, ! 1169: { 6, 0x989c, ! 1170: { 0x00001660, 0x00001660, 0x00001660, 0x00001660, 0x00001660 } }, ! 1171: { 6, 0x989c, ! 1172: { 0x00001688, 0x00001688, 0x00001688, 0x00001688, 0x00001688 } }, ! 1173: { 6, 0x98c4, ! 1174: { 0x00000001, 0x00000001, 0x00000001, 0x00000001, 0x00000001 } }, ! 1175: { 7, 0x989c, ! 1176: { 0x00006400, 0x00006400, 0x00006400, 0x00006400, 0x00006400 } }, ! 1177: { 7, 0x989c, ! 1178: { 0x00000800, 0x00000800, 0x00000800, 0x00000800, 0x00000800 } }, ! 1179: { 7, 0x98cc, ! 1180: { 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e, 0x0000000e } }, ! 1181: };
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.