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1.1 root 1: /*******************************************************************************
2:
3: Intel PRO/1000 Linux driver
4: Copyright(c) 1999 - 2009 Intel Corporation.
5:
6: This program is free software; you can redistribute it and/or modify it
7: under the terms and conditions of the GNU General Public License,
8: version 2, as published by the Free Software Foundation.
9:
10: This program is distributed in the hope it will be useful, but WITHOUT
11: ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12: FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13: more details.
14:
15: You should have received a copy of the GNU General Public License along with
16: this program; if not, write to the Free Software Foundation, Inc.,
17: 51 Franklin St - Fifth Floor, Boston, MA 02110-1301 USA.
18:
19: The full GNU General Public License is included in this distribution in
20: the file called "COPYING".
21:
22: Contact Information:
23: Linux NICS <[email protected]>
24: e1000-devel Mailing List <[email protected]>
25: Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
26:
27: *******************************************************************************/
28:
29: FILE_LICENCE ( GPL2_OR_LATER );
30:
31: /* Linux PRO/1000 Ethernet Driver main header file */
32:
33: #ifndef _E1000E_H_
34: #define _E1000E_H_
35:
36: #include <stdint.h>
37: #include <stdlib.h>
38: #include <stdio.h>
39: #include <string.h>
40: #include <unistd.h>
41: #include <ipxe/io.h>
42: #include <errno.h>
43: #include <byteswap.h>
44: #include <ipxe/pci.h>
45: #include <ipxe/malloc.h>
46: #include <ipxe/if_ether.h>
47: #include <ipxe/ethernet.h>
48: #include <ipxe/iobuf.h>
49: #include <ipxe/netdevice.h>
50:
51: /* Begin OS Dependencies */
52:
53: #define u8 unsigned char
54: #define bool boolean_t
55: #define dma_addr_t unsigned long
56: #define __le16 uint16_t
57: #define __le32 uint32_t
58: #define __le64 uint64_t
59:
60: #define __iomem
61:
62: #define msleep(x) mdelay(x)
63:
64: #define ETH_FCS_LEN 4
65:
66: typedef int spinlock_t;
67: typedef enum {
68: false = 0,
69: true = 1
70: } boolean_t;
71:
72: /* End OS Dependencies */
73:
74: #include "e1000e_hw.h"
75:
76: #define E1000_TX_FLAGS_CSUM 0x00000001
77: #define E1000_TX_FLAGS_VLAN 0x00000002
78: #define E1000_TX_FLAGS_TSO 0x00000004
79: #define E1000_TX_FLAGS_IPV4 0x00000008
80: #define E1000_TX_FLAGS_VLAN_MASK 0xffff0000
81: #define E1000_TX_FLAGS_VLAN_SHIFT 16
82:
83: #define E1000_MAX_PER_TXD 8192
84: #define E1000_MAX_TXD_PWR 12
85:
86: #define MINIMUM_DHCP_PACKET_SIZE 282
87:
88: struct e1000_info;
89:
90: #define e_dbg(arg...) if (0) { printf (arg); };
91:
92: #ifdef CONFIG_E1000E_MSIX
93: /* Interrupt modes, as used by the IntMode paramter */
94: #define E1000E_INT_MODE_LEGACY 0
95: #define E1000E_INT_MODE_MSI 1
96: #define E1000E_INT_MODE_MSIX 2
97:
98: #endif /* CONFIG_E1000E_MSIX */
99: #ifndef CONFIG_E1000E_NAPI
100: #define E1000_MAX_INTR 10
101:
102: #endif /* CONFIG_E1000E_NAPI */
103: /* Tx/Rx descriptor defines */
104: #define E1000_DEFAULT_TXD 256
105: #define E1000_MAX_TXD 4096
106: #define E1000_MIN_TXD 64
107:
108: #define E1000_DEFAULT_RXD 256
109: #define E1000_MAX_RXD 4096
110: #define E1000_MIN_RXD 64
111:
112: #define E1000_MIN_ITR_USECS 10 /* 100000 irq/sec */
113: #define E1000_MAX_ITR_USECS 10000 /* 100 irq/sec */
114:
115: /* Early Receive defines */
116: #define E1000_ERT_2048 0x100
117:
118: #define E1000_FC_PAUSE_TIME 0x0680 /* 858 usec */
119:
120: /* How many Tx Descriptors do we need to call netif_wake_queue ? */
121: /* How many Rx Buffers do we bundle into one write to the hardware ? */
122: #define E1000_RX_BUFFER_WRITE 16 /* Must be power of 2 */
123:
124: #define AUTO_ALL_MODES 0
125: #define E1000_EEPROM_APME 0x0400
126:
127: #define E1000_MNG_VLAN_NONE (-1)
128:
129: /* Number of packet split data buffers (not including the header buffer) */
130: #define PS_PAGE_BUFFERS (MAX_PS_BUFFERS - 1)
131:
132: #define MAXIMUM_ETHERNET_VLAN_SIZE 1522
133:
134: #define DEFAULT_JUMBO 9234
135:
136: enum e1000_boards {
137: board_82571,
138: board_82572,
139: board_82573,
140: board_82574,
141: board_80003es2lan,
142: board_ich8lan,
143: board_ich9lan,
144: board_ich10lan,
145: board_pchlan,
146: board_82583,
147: };
148:
149: /* board specific private data structure */
150: struct e1000_adapter {
151: const struct e1000_info *ei;
152:
153: /* OS defined structs */
154: struct net_device *netdev;
155: struct pci_device *pdev;
156: struct net_device_stats net_stats;
157:
158: /* structs defined in e1000_hw.h */
159: struct e1000_hw hw;
160:
161: struct e1000_phy_info phy_info;
162:
163: u32 wol;
164: u32 pba;
165: u32 max_hw_frame_size;
166:
167: bool fc_autoneg;
168:
169: unsigned int flags;
170: unsigned int flags2;
171:
172: #define NUM_TX_DESC 8
173: #define NUM_RX_DESC 8
174:
175: struct io_buffer *tx_iobuf[NUM_TX_DESC];
176: struct io_buffer *rx_iobuf[NUM_RX_DESC];
177:
178: struct e1000_tx_desc *tx_base;
179: struct e1000_rx_desc *rx_base;
180:
181: uint32_t tx_ring_size;
182: uint32_t rx_ring_size;
183:
184: uint32_t tx_head;
185: uint32_t tx_tail;
186: uint32_t tx_fill_ctr;
187:
188: uint32_t rx_curr;
189:
190: uint32_t ioaddr;
191: uint32_t irqno;
192:
193: uint32_t tx_int_delay;
194: uint32_t tx_abs_int_delay;
195: uint32_t txd_cmd;
196: };
197:
198: struct e1000_info {
199: enum e1000_mac_type mac;
200: unsigned int flags;
201: unsigned int flags2;
202: u32 pba;
203: u32 max_hw_frame_size;
204: s32 (*get_variants)(struct e1000_adapter *);
205: void (*init_ops)(struct e1000_hw *);
206: };
207:
208: /* hardware capability, feature, and workaround flags */
209: #define FLAG_HAS_AMT (1 << 0)
210: #define FLAG_HAS_FLASH (1 << 1)
211: #define FLAG_HAS_HW_VLAN_FILTER (1 << 2)
212: #define FLAG_HAS_WOL (1 << 3)
213: #define FLAG_HAS_ERT (1 << 4)
214: #define FLAG_HAS_CTRLEXT_ON_LOAD (1 << 5)
215: #define FLAG_HAS_SWSM_ON_LOAD (1 << 6)
216: #define FLAG_HAS_JUMBO_FRAMES (1 << 7)
217: #define FLAG_IS_ICH (1 << 9)
218: #ifdef CONFIG_E1000E_MSIX
219: #define FLAG_HAS_MSIX (1 << 10)
220: #endif
221: #define FLAG_HAS_SMART_POWER_DOWN (1 << 11)
222: #define FLAG_IS_QUAD_PORT_A (1 << 12)
223: #define FLAG_IS_QUAD_PORT (1 << 13)
224: #define FLAG_TIPG_MEDIUM_FOR_80003ESLAN (1 << 14)
225: #define FLAG_APME_IN_WUC (1 << 15)
226: #define FLAG_APME_IN_CTRL3 (1 << 16)
227: #define FLAG_APME_CHECK_PORT_B (1 << 17)
228: #define FLAG_DISABLE_FC_PAUSE_TIME (1 << 18)
229: #define FLAG_NO_WAKE_UCAST (1 << 19)
230: #define FLAG_MNG_PT_ENABLED (1 << 20)
231: #define FLAG_RESET_OVERWRITES_LAA (1 << 21)
232: #define FLAG_TARC_SPEED_MODE_BIT (1 << 22)
233: #define FLAG_TARC_SET_BIT_ZERO (1 << 23)
234: #define FLAG_RX_NEEDS_RESTART (1 << 24)
235: #define FLAG_LSC_GIG_SPEED_DROP (1 << 25)
236: #define FLAG_SMART_POWER_DOWN (1 << 26)
237: #define FLAG_MSI_ENABLED (1 << 27)
238: #define FLAG_RX_CSUM_ENABLED (1 << 28)
239: #define FLAG_TSO_FORCE (1 << 29)
240: #define FLAG_RX_RESTART_NOW (1 << 30)
241: #define FLAG_MSI_TEST_FAILED (1 << 31)
242:
243: /* CRC Stripping defines */
244: #define FLAG2_CRC_STRIPPING (1 << 0)
245: #define FLAG2_HAS_PHY_WAKEUP (1 << 1)
246:
247: #define E1000_RX_DESC_PS(R, i) \
248: (&(((union e1000_rx_desc_packet_split *)((R).desc))[i]))
249: #define E1000_GET_DESC(R, i, type) (&(((struct type *)((R).desc))[i]))
250: #define E1000_RX_DESC(R, i) E1000_GET_DESC(R, i, e1000_rx_desc)
251: #define E1000_TX_DESC(R, i) E1000_GET_DESC(R, i, e1000_tx_desc)
252: #define E1000_CONTEXT_DESC(R, i) E1000_GET_DESC(R, i, e1000_context_desc)
253:
254: enum e1000_state_t {
255: __E1000E_TESTING,
256: __E1000E_RESETTING,
257: __E1000E_DOWN
258: };
259:
260: enum latency_range {
261: lowest_latency = 0,
262: low_latency = 1,
263: bulk_latency = 2,
264: latency_invalid = 255
265: };
266:
267: extern void e1000e_check_options(struct e1000_adapter *adapter);
268:
269: extern void e1000e_reset(struct e1000_adapter *adapter);
270: extern void e1000e_power_up_phy(struct e1000_adapter *adapter);
271:
272: extern void e1000e_init_function_pointers_82571(struct e1000_hw *hw)
273: __attribute__((weak));
274: extern void e1000e_init_function_pointers_80003es2lan(struct e1000_hw *hw)
275: __attribute__((weak));
276: extern void e1000e_init_function_pointers_ich8lan(struct e1000_hw *hw)
277: __attribute__((weak));
278:
279: extern int e1000e_probe(struct pci_device *pdev);
280:
281: extern void e1000e_remove(struct pci_device *pdev);
282:
283: extern s32 e1000e_read_pba_num(struct e1000_hw *hw, u32 *pba_num);
284:
285: static inline s32 e1000e_commit_phy(struct e1000_hw *hw)
286: {
287: if (hw->phy.ops.commit)
288: return hw->phy.ops.commit(hw);
289:
290: return 0;
291: }
292:
293: extern bool e1000e_enable_mng_pass_thru(struct e1000_hw *hw);
294:
295: extern bool e1000e_get_laa_state_82571(struct e1000_hw *hw);
296: extern void e1000e_set_laa_state_82571(struct e1000_hw *hw, bool state);
297:
298: extern void e1000e_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw,
299: bool state);
300: extern void e1000e_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw);
301: extern void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw);
302: extern void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw);
303:
304: extern s32 e1000e_check_for_copper_link(struct e1000_hw *hw);
305: extern s32 e1000e_check_for_fiber_link(struct e1000_hw *hw);
306: extern s32 e1000e_check_for_serdes_link(struct e1000_hw *hw);
307: extern s32 e1000e_cleanup_led_generic(struct e1000_hw *hw);
308: extern s32 e1000e_led_on_generic(struct e1000_hw *hw);
309: extern s32 e1000e_led_off_generic(struct e1000_hw *hw);
310: extern s32 e1000e_get_bus_info_pcie(struct e1000_hw *hw);
311: extern s32 e1000e_get_speed_and_duplex_copper(struct e1000_hw *hw, u16 *speed, u16 *duplex);
312: extern s32 e1000e_get_speed_and_duplex_fiber_serdes(struct e1000_hw *hw, u16 *speed, u16 *duplex);
313: extern s32 e1000e_disable_pcie_master(struct e1000_hw *hw);
314: extern s32 e1000e_get_auto_rd_done(struct e1000_hw *hw);
315: extern s32 e1000e_id_led_init(struct e1000_hw *hw);
316: extern void e1000e_clear_hw_cntrs_base(struct e1000_hw *hw);
317: extern s32 e1000e_setup_fiber_serdes_link(struct e1000_hw *hw);
318: extern s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw);
319: extern s32 e1000e_copper_link_setup_igp(struct e1000_hw *hw);
320: extern s32 e1000e_setup_link(struct e1000_hw *hw);
321: static inline void e1000e_clear_vfta(struct e1000_hw *hw)
322: {
323: hw->mac.ops.clear_vfta(hw);
324: }
325: extern void e1000e_init_rx_addrs(struct e1000_hw *hw, u16 rar_count);
326: extern void e1000e_update_mc_addr_list_generic(struct e1000_hw *hw,
327: u8 *mc_addr_list,
328: u32 mc_addr_count);
329: extern void e1000e_rar_set(struct e1000_hw *hw, u8 *addr, u32 index);
330: extern s32 e1000e_set_fc_watermarks(struct e1000_hw *hw);
331: extern void e1000e_set_pcie_no_snoop(struct e1000_hw *hw, u32 no_snoop);
332: extern s32 e1000e_get_hw_semaphore(struct e1000_hw *hw);
333: extern s32 e1000e_valid_led_default(struct e1000_hw *hw, u16 *data);
334: extern void e1000e_config_collision_dist(struct e1000_hw *hw);
335: extern s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw);
336: extern s32 e1000e_force_mac_fc(struct e1000_hw *hw);
337: extern s32 e1000e_blink_led(struct e1000_hw *hw);
338: extern void e1000e_write_vfta_generic(struct e1000_hw *hw, u32 offset, u32 value);
339: static inline void e1000e_write_vfta(struct e1000_hw *hw, u32 offset, u32 value)
340: {
341: if (hw->mac.ops.write_vfta)
342: hw->mac.ops.write_vfta(hw, offset, value);
343: }
344: extern void e1000e_reset_adaptive(struct e1000_hw *hw);
345: extern void e1000e_update_adaptive(struct e1000_hw *hw);
346:
347: extern s32 e1000e_setup_copper_link(struct e1000_hw *hw);
348: extern void e1000e_put_hw_semaphore(struct e1000_hw *hw);
349: extern s32 e1000e_check_reset_block_generic(struct e1000_hw *hw);
350: #if 0
351: extern s32 e1000e_phy_force_speed_duplex_igp(struct e1000_hw *hw);
352: #endif
353: #if 0
354: extern s32 e1000e_get_cable_length_igp_2(struct e1000_hw *hw);
355: #endif
356: extern s32 e1000e_get_phy_info_igp(struct e1000_hw *hw);
357: extern s32 e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data);
358: extern s32 e1000e_phy_hw_reset_generic(struct e1000_hw *hw);
359: extern s32 e1000e_set_d3_lplu_state(struct e1000_hw *hw, bool active);
360: extern s32 e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data);
361: extern s32 e1000e_phy_sw_reset(struct e1000_hw *hw);
362: #if 0
363: extern s32 e1000e_phy_force_speed_duplex_m88(struct e1000_hw *hw);
364: #endif
365: extern s32 e1000e_get_cfg_done(struct e1000_hw *hw);
366: #if 0
367: extern s32 e1000e_get_cable_length_m88(struct e1000_hw *hw);
368: #endif
369: extern s32 e1000e_get_phy_info_m88(struct e1000_hw *hw);
370: extern s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data);
371: extern s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data);
372: extern enum e1000_phy_type e1000e_get_phy_type_from_id(u32 phy_id);
373: extern s32 e1000e_determine_phy_address(struct e1000_hw *hw);
374: extern s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data);
375: extern s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data);
376: #if 0
377: extern void e1000e_phy_force_speed_duplex_setup(struct e1000_hw *hw, u16 *phy_ctrl);
378: #endif
379: extern s32 e1000e_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data);
380: extern s32 e1000e_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data);
381: extern s32 e1000e_phy_has_link_generic(struct e1000_hw *hw, u32 iterations,
382: u32 usec_interval, bool *success);
383: extern s32 e1000e_phy_reset_dsp(struct e1000_hw *hw);
384: extern s32 e1000e_read_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 *data);
385: extern s32 e1000e_write_phy_reg_mdic(struct e1000_hw *hw, u32 offset, u16 data);
386: extern s32 e1000e_check_downshift(struct e1000_hw *hw);
387:
388: static inline s32 e1000e_phy_hw_reset(struct e1000_hw *hw)
389: {
390: if (hw->phy.ops.reset)
391: return hw->phy.ops.reset(hw);
392:
393: return 0;
394: }
395:
396: static inline s32 e1000e_check_reset_block(struct e1000_hw *hw)
397: {
398: if (hw->phy.ops.check_reset_block)
399: return hw->phy.ops.check_reset_block(hw);
400:
401: return 0;
402: }
403:
404: static inline s32 e1e_rphy(struct e1000_hw *hw, u32 offset, u16 *data)
405: {
406: if (hw->phy.ops.read_reg)
407: return hw->phy.ops.read_reg(hw, offset, data);
408:
409: return 0;
410: }
411:
412: static inline s32 e1e_wphy(struct e1000_hw *hw, u32 offset, u16 data)
413: {
414: if (hw->phy.ops.write_reg)
415: return hw->phy.ops.write_reg(hw, offset, data);
416:
417: return 0;
418: }
419:
420: #if 0
421: static inline s32 e1000e_get_cable_length(struct e1000_hw *hw)
422: {
423: if (hw->phy.ops.get_cable_length)
424: return hw->phy.ops.get_cable_length(hw);
425:
426: return 0;
427: }
428: #endif
429:
430: extern s32 e1000e_acquire_nvm(struct e1000_hw *hw);
431: extern s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
432: extern s32 e1000e_update_nvm_checksum_generic(struct e1000_hw *hw);
433: extern s32 e1000e_poll_eerd_eewr_done(struct e1000_hw *hw, int ee_reg);
434: extern s32 e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data);
435: extern s32 e1000e_validate_nvm_checksum_generic(struct e1000_hw *hw);
436: extern void e1000e_release_nvm(struct e1000_hw *hw);
437:
438: static inline s32 e1000e_read_mac_addr(struct e1000_hw *hw)
439: {
440: if (hw->mac.ops.read_mac_addr)
441: return hw->mac.ops.read_mac_addr(hw);
442:
443: return e1000e_read_mac_addr_generic(hw);
444: }
445:
446: static inline s32 e1000e_validate_nvm_checksum(struct e1000_hw *hw)
447: {
448: return hw->nvm.ops.validate(hw);
449: }
450:
451: static inline s32 e1000e_update_nvm_checksum(struct e1000_hw *hw)
452: {
453: return hw->nvm.ops.update(hw);
454: }
455:
456: static inline s32 e1000e_read_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
457: {
458: return hw->nvm.ops.read(hw, offset, words, data);
459: }
460:
461: static inline s32 e1000e_write_nvm(struct e1000_hw *hw, u16 offset, u16 words, u16 *data)
462: {
463: return hw->nvm.ops.write(hw, offset, words, data);
464: }
465:
466: static inline s32 e1000e_get_phy_info(struct e1000_hw *hw)
467: {
468: if (hw->phy.ops.get_info)
469: return hw->phy.ops.get_info(hw);
470:
471: return 0;
472: }
473:
474: extern bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw);
475: #if 0
476: extern s32 e1000e_mng_write_dhcp_info(struct e1000_hw *hw, u8 *buffer, u16 length);
477: #endif
478:
479: static inline u32 __er32(struct e1000_hw *hw, unsigned long reg)
480: {
481: return readl(hw->hw_addr + reg);
482: }
483:
484: static inline void __ew32(struct e1000_hw *hw, unsigned long reg, u32 val)
485: {
486: writel(val, hw->hw_addr + reg);
487: }
488:
489: #define er32(reg) __er32(hw, E1000_##reg)
490: #define ew32(reg, val) __ew32(hw, E1000_##reg, (val))
491: #define e1e_flush() er32(STATUS)
492:
493: #define E1000_WRITE_REG(a, reg, value) \
494: writel((value), ((a)->hw_addr + reg))
495:
496: #define E1000_READ_REG(a, reg) (readl((a)->hw_addr + reg))
497:
498: #define E1000_WRITE_REG_ARRAY(a, reg, offset, value) \
499: writel((value), ((a)->hw_addr + reg + ((offset) << 2)))
500:
501: #define E1000_READ_REG_ARRAY(a, reg, offset) ( \
502: readl((a)->hw_addr + reg + ((offset) << 2)))
503:
504: #define E1000_READ_REG_ARRAY_DWORD E1000_READ_REG_ARRAY
505: #define E1000_WRITE_REG_ARRAY_DWORD E1000_WRITE_REG_ARRAY
506:
507: static inline u16 __er16flash(struct e1000_hw *hw, unsigned long reg)
508: {
509: return readw(hw->flash_address + reg);
510: }
511:
512: static inline u32 __er32flash(struct e1000_hw *hw, unsigned long reg)
513: {
514: return readl(hw->flash_address + reg);
515: }
516:
517: static inline void __ew16flash(struct e1000_hw *hw, unsigned long reg, u16 val)
518: {
519: writew(val, hw->flash_address + reg);
520: }
521:
522: static inline void __ew32flash(struct e1000_hw *hw, unsigned long reg, u32 val)
523: {
524: writel(val, hw->flash_address + reg);
525: }
526:
527: #define er16flash(reg) __er16flash(hw, (reg))
528: #define er32flash(reg) __er32flash(hw, (reg))
529: #define ew16flash(reg, val) __ew16flash(hw, (reg), (val))
530: #define ew32flash(reg, val) __ew32flash(hw, (reg), (val))
531:
532: #endif /* _E1000E_H_ */
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