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1.1 root 1: /**************************************************************************
2: *
3: * Etherboot driver for Level 5 Etherfabric network cards
4: *
5: * Written by Michael Brown <[email protected]>
6: *
7: * Copyright Fen Systems Ltd. 2005
8: * Copyright Level 5 Networks Inc. 2005
9: *
10: * This software may be used and distributed according to the terms of
11: * the GNU General Public License (GPL), incorporated herein by
12: * reference. Drivers based on or derived from this code fall under
13: * the GPL and must retain the authorship, copyright and license
14: * notice.
15: *
16: **************************************************************************
17: */
18:
19: FILE_LICENCE ( GPL_ANY );
20:
21: #ifndef EFAB_NIC_H
22: #define EFAB_NIC_H
23: #include <ipxe/bitbash.h>
24: #include <ipxe/i2c.h>
25: #include <ipxe/spi.h>
26: #include <ipxe/nvo.h>
27: #include <ipxe/if_ether.h>
28: /**************************************************************************
29: *
30: * Constants and macros
31: *
32: **************************************************************************
33: */
34: /* Board IDs. Early boards have no board_type, (e.g. EF1002 and 401/403)
35: * But newer boards are getting bigger...
36: */
37: typedef enum {
38: EFAB_BOARD_INVALID = 0, /* Early boards do not have board rev. info. */
39: EFAB_BOARD_SFE4001 = 1,
40: EFAB_BOARD_SFE4002 = 2,
41: EFAB_BOARD_SFE4003 = 3,
42: /* Insert new types before here */
43: EFAB_BOARD_MAX
44: } efab_board_type;
45:
46: /* PHY types. */
47: typedef enum {
48: PHY_TYPE_AUTO = 0, /* on development board detect between CX4 & alaska */
49: PHY_TYPE_CX4_RTMR = 1,
50: PHY_TYPE_1GIG_ALASKA = 2,
51: PHY_TYPE_10XPRESS = 3,
52: PHY_TYPE_XFP = 4,
53: PHY_TYPE_CX4 = 5,
54: PHY_TYPE_PM8358 = 6,
55: } phy_type_t;
56:
57: /**************************************************************************
58: *
59: * Hardware data structures and sizing
60: *
61: **************************************************************************
62: */
63:
64: #define dma_addr_t unsigned long
65: typedef efab_qword_t falcon_rx_desc_t;
66: typedef efab_qword_t falcon_tx_desc_t;
67: typedef efab_qword_t falcon_event_t;
68:
69: #define EFAB_BUF_ALIGN 4096
70: #define EFAB_RXD_SIZE 512
71: #define EFAB_TXD_SIZE 512
72: #define EFAB_EVQ_SIZE 512
73:
74: #define EFAB_NUM_RX_DESC 16
75: #define EFAB_RX_BUF_SIZE 1600
76:
77: /**************************************************************************
78: *
79: * Data structures
80: *
81: **************************************************************************
82: */
83:
84: struct efab_nic;
85:
86: /* A buffer table allocation backing a tx dma, rx dma or eventq */
87: struct efab_special_buffer {
88: dma_addr_t dma_addr;
89: int id;
90: };
91:
92: /* A TX queue */
93: struct efab_tx_queue {
94: /* The hardware ring */
95: falcon_tx_desc_t *ring;
96:
97: /* The software ring storing io_buffers. */
98: struct io_buffer *buf[EFAB_TXD_SIZE];
99:
100: /* The buffer table reservation pushed to hardware */
101: struct efab_special_buffer entry;
102:
103: /* Software descriptor write ptr */
104: unsigned int write_ptr;
105:
106: /* Hardware descriptor read ptr */
107: unsigned int read_ptr;
108: };
109:
110: /* An RX queue */
111: struct efab_rx_queue {
112: /* The hardware ring */
113: falcon_rx_desc_t *ring;
114:
115: /* The software ring storing io_buffers */
116: struct io_buffer *buf[EFAB_NUM_RX_DESC];
117:
118: /* The buffer table reservation pushed to hardware */
119: struct efab_special_buffer entry;
120:
121: /* Descriptor write ptr, into both the hardware and software rings */
122: unsigned int write_ptr;
123:
124: /* Hardware completion ptr */
125: unsigned int read_ptr;
126: };
127:
128: /* An event queue */
129: struct efab_ev_queue {
130: /* The hardware ring to push to hardware.
131: * Must be the first entry in the structure */
132: falcon_event_t *ring;
133:
134: /* The buffer table reservation pushed to hardware */
135: struct efab_special_buffer entry;
136:
137: /* Pointers into the ring */
138: unsigned int read_ptr;
139: };
140:
141: struct efab_mac_operations {
142: int ( * init ) ( struct efab_nic *efab );
143: };
144:
145: struct efab_phy_operations {
146: int ( * init ) ( struct efab_nic *efab );
147: unsigned int mmds;
148: };
149:
150: struct efab_board_operations {
151: int ( * init ) ( struct efab_nic *efab );
152: void ( * fini ) ( struct efab_nic *efab );
153: };
154:
155: struct efab_nic {
156: struct net_device *netdev;
157: int pci_revision;
158: int is_asic;
159:
160: /* I2C bit-bashed interface */
161: struct i2c_bit_basher i2c_bb;
162:
163: /** SPI bus and devices, and the user visible NVO area */
164: struct spi_bus spi_bus;
165: struct spi_device spi_flash;
166: struct spi_device spi_eeprom;
167: struct spi_device *spi;
168: struct nvo_block nvo;
169:
170: /** Board, MAC, and PHY operations tables */
171: struct efab_board_operations *board_op;
172: struct efab_mac_operations *mac_op;
173: struct efab_phy_operations *phy_op;
174:
175: /* PHY and board types */
176: int phy_addr;
177: int phy_type;
178: int phy_10g;
179: int board_type;
180:
181: /** Memory and IO base */
182: void *membase;
183: unsigned int iobase;
184:
185: /* Buffer table allocation head */
186: int buffer_head;
187:
188: /* Queues */
189: struct efab_rx_queue rx_queue;
190: struct efab_tx_queue tx_queue;
191: struct efab_ev_queue ev_queue;
192:
193: /** MAC address */
194: uint8_t mac_addr[ETH_ALEN];
195: /** GMII link options */
196: unsigned int link_options;
197: /** Link status */
198: int link_up;
199:
200: /** INT_REG_KER */
201: efab_oword_t int_ker __attribute__ (( aligned ( 16 ) ));
202: };
203: #endif /* EFAB_NIC_H */
204:
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