--- qemu/roms/openbios/arch/sparc64/lib.c 2018/04/24 19:19:39 1.1 +++ qemu/roms/openbios/arch/sparc64/lib.c 2018/04/24 19:37:59 1.1.1.2 @@ -14,9 +14,7 @@ #include "libopenbios/sys_info.h" #include "boot.h" -#include "ofmem_sparc64.h" - -static ucell *va2ttedata = 0; +#include "arch/sparc64/ofmem_sparc64.h" /* Format a string and print it on the screen, just like the libc * function printf. @@ -72,15 +70,6 @@ void free(void *ptr) ofmem_free(ptr); } -#define PAGE_SIZE_4M (4 * 1024 * 1024) -#define PAGE_SIZE_512K (512 * 1024) -#define PAGE_SIZE_64K (64 * 1024) -#define PAGE_SIZE_8K (8 * 1024) -#define PAGE_MASK_4M (4 * 1024 * 1024 - 1) -#define PAGE_MASK_512K (512 * 1024 - 1) -#define PAGE_MASK_64K (64 * 1024 - 1) -#define PAGE_MASK_8K (8 * 1024 - 1) - static void mmu_open(void) { @@ -165,66 +154,21 @@ mmu_translate(void) static void pgmap_fetch(void) { - translation_t *t = *g_ofmem_translations; - unsigned long va, tte_data; - - va = POP(); - - /* Search the ofmem linked list for this virtual address */ - while (t != NULL) { - /* Find the correct range */ - if (va >= t->virt && va < (t->virt + t->size)) { - - /* valid tte, 8k size */ - tte_data = SPITFIRE_TTE_VALID; + unsigned long va, tte_data; - /* mix in phys address mode */ - tte_data |= t->mode; + va = POP(); - /* mix in page physical address = t->phys + offset */ - tte_data |= t->phys + (va - t->virt); + tte_data = find_tte(va); + if (tte_data == -1) + goto error; - /* return tte_data */ - PUSH(tte_data); + /* return tte_data */ + PUSH(tte_data); + return; - return; - } - t = t->next; - } - - /* If we get here, there was no entry */ - PUSH(0); -} - -static void -dtlb_load2(unsigned long vaddr, unsigned long tte_data) -{ - asm("stxa %0, [%1] %2\n" - "stxa %3, [%%g0] %4\n" - : : "r" (vaddr), "r" (48), "i" (ASI_DMMU), - "r" (tte_data), "i" (ASI_DTLB_DATA_IN)); -} - -static void -dtlb_load3(unsigned long vaddr, unsigned long tte_data, - unsigned long tte_index) -{ - asm("stxa %0, [%1] %2\n" - "stxa %3, [%4] %5\n" - : : "r" (vaddr), "r" (48), "i" (ASI_DMMU), - "r" (tte_data), "r" (tte_index << 3), "i" (ASI_DTLB_DATA_ACCESS)); -} - -static unsigned long -dtlb_faultva(void) -{ - unsigned long faultva; - - asm("ldxa [%1] %2, %0\n" - : "=r" (faultva) - : "r" (48), "i" (ASI_DMMU)); - - return faultva; +error: + /* If we get here, there was no entry */ + PUSH(0); } /* @@ -270,9 +214,7 @@ dtlb_miss_handler(void) } } else { /* Search the ofmem linked list for this virtual address */ - PUSH(faultva); - pgmap_fetch(); - tte_data = POP(); + tte_data = find_tte(faultva); } if (tte_data) { @@ -285,25 +227,6 @@ dtlb_miss_handler(void) } -static void -itlb_load2(unsigned long vaddr, unsigned long tte_data) -{ - asm("stxa %0, [%1] %2\n" - "stxa %3, [%%g0] %4\n" - : : "r" (vaddr), "r" (48), "i" (ASI_IMMU), - "r" (tte_data), "i" (ASI_ITLB_DATA_IN)); -} - -static void -itlb_load3(unsigned long vaddr, unsigned long tte_data, - unsigned long tte_index) -{ - asm("stxa %0, [%1] %2\n" - "stxa %3, [%4] %5\n" - : : "r" (vaddr), "r" (48), "i" (ASI_IMMU), - "r" (tte_data), "r" (tte_index << 3), "i" (ASI_ITLB_DATA_ACCESS)); -} - /* ( index tte_data vaddr -- ? ) */ @@ -318,18 +241,6 @@ itlb_load(void) itlb_load3(vaddr, tte_data, idx); } -static unsigned long -itlb_faultva(void) -{ - unsigned long faultva; - - asm("ldxa [%1] %2, %0\n" - : "=r" (faultva) - : "r" (48), "i" (ASI_IMMU)); - - return faultva; -} - /* MMU I-TLB miss handler */ void itlb_miss_handler(void) @@ -359,9 +270,7 @@ itlb_miss_handler(void) } } else { /* Search the ofmem linked list for this virtual address */ - PUSH(faultva); - pgmap_fetch(); - tte_data = POP(); + tte_data = find_tte(faultva); } if (tte_data) { @@ -373,53 +282,6 @@ itlb_miss_handler(void) } } -static void -map_pages(phys_addr_t phys, unsigned long virt, - unsigned long size, unsigned long mode) -{ - unsigned long tte_data, currsize; - - /* aligned to 8k page */ - size = (size + PAGE_MASK_8K) & ~PAGE_MASK_8K; - - while (size > 0) { - currsize = size; - if (currsize >= PAGE_SIZE_4M && - (virt & PAGE_MASK_4M) == 0 && - (phys & PAGE_MASK_4M) == 0) { - currsize = PAGE_SIZE_4M; - tte_data = 6ULL << 60; - } else if (currsize >= PAGE_SIZE_512K && - (virt & PAGE_MASK_512K) == 0 && - (phys & PAGE_MASK_512K) == 0) { - currsize = PAGE_SIZE_512K; - tte_data = 4ULL << 60; - } else if (currsize >= PAGE_SIZE_64K && - (virt & PAGE_MASK_64K) == 0 && - (phys & PAGE_MASK_64K) == 0) { - currsize = PAGE_SIZE_64K; - tte_data = 2ULL << 60; - } else { - currsize = PAGE_SIZE_8K; - tte_data = 0; - } - - tte_data |= phys | mode | SPITFIRE_TTE_VALID; - - itlb_load2(virt, tte_data); - dtlb_load2(virt, tte_data); - - size -= currsize; - phys += currsize; - virt += currsize; - } -} - -void ofmem_map_pages(phys_addr_t phys, ucell virt, ucell size, ucell mode) -{ - return map_pages(phys, virt, size, mode); -} - /* 3.6.5 map ( phys.lo ... phys.hi virt size mode -- ) @@ -440,50 +302,6 @@ mmu_map(void) ofmem_map(phys, virt, size, mode); } -static void -itlb_demap(unsigned long vaddr) -{ - asm("stxa %0, [%0] %1\n" - : : "r" (vaddr), "i" (ASI_IMMU_DEMAP)); -} - -static void -dtlb_demap(unsigned long vaddr) -{ - asm("stxa %0, [%0] %1\n" - : : "r" (vaddr), "i" (ASI_DMMU_DEMAP)); -} - -static void -unmap_pages(ucell virt, ucell size) -{ - ucell va; - - /* align address to 8k */ - virt &= ~PAGE_MASK_8K; - - /* align size to 8k */ - size = (size + PAGE_MASK_8K) & ~PAGE_MASK_8K; - - for (va = virt; va < virt + size; va += PAGE_SIZE_8K) { - itlb_demap(va); - dtlb_demap(va); - } -} - -void ofmem_arch_unmap_pages(ucell virt, ucell size) -{ - unmap_pages(virt, size); -} - -void ofmem_arch_early_map_pages(phys_addr_t phys, ucell virt, ucell size, ucell mode) -{ - if (mode & SPITFIRE_TTE_LOCKED) { - // install locked tlb entries now - ofmem_map_pages(phys, virt, size, mode); - } -} - /* 3.6.5 unmap ( virt size -- )