|
|
1.1 root 1: /* Taken from Etherboot */
2: /* Defines for routines to implement a low-overhead timer for drivers */
3:
4: /*
5: * This program is free software; you can redistribute it and/or
6: * modify it under the terms of the GNU General Public License as
7: * published by the Free Software Foundation; either version 2, or (at
8: * your option) any later version.
9: */
10:
11: #ifndef TIMER_H
12: #define TIMER_H
13:
14: /* Ports for the 8254 timer chip */
15: #define TIMER2_PORT 0x42
16: #define TIMER_MODE_PORT 0x43
17:
18: /* Meaning of the mode bits */
19: #define TIMER0_SEL 0x00
20: #define TIMER1_SEL 0x40
21: #define TIMER2_SEL 0x80
22: #define READBACK_SEL 0xC0
23:
24: #define LATCH_COUNT 0x00
25: #define LOBYTE_ACCESS 0x10
26: #define HIBYTE_ACCESS 0x20
27: #define WORD_ACCESS 0x30
28:
29: #define MODE0 0x00
30: #define MODE1 0x02
31: #define MODE2 0x04
32: #define MODE3 0x06
33: #define MODE4 0x08
34: #define MODE5 0x0A
35:
36: #define BINARY_COUNT 0x00
37: #define BCD_COUNT 0x01
38:
39: /* Timers tick over at this rate */
40: #define CLOCK_TICK_RATE 1193180U
41: #define TICKS_PER_MS (CLOCK_TICK_RATE/1000)
42:
43: /* Parallel Peripheral Controller Port B */
44: #define PPC_PORTB 0x61
45:
46: /* Meaning of the port bits */
47: #define PPCB_T2OUT 0x20 /* Bit 5 */
48: #define PPCB_SPKR 0x02 /* Bit 1 */
49: #define PPCB_T2GATE 0x01 /* Bit 0 */
50:
51: extern void ndelay(unsigned int nsecs);
52: extern void udelay(unsigned int usecs);
53: extern void mdelay(unsigned int msecs);
54: extern unsigned long currticks(void);
55: extern unsigned long get_timer_freq(void);
56:
57: /* arch/ppc/timebase.S */
58: void _wait_ticks(unsigned long nticks);
59:
60: #define TICKS_PER_SEC 1000
61:
62: #endif /* TIMER_H */
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.