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1.1 ! root 1: #ifndef AMD64_PCI_H ! 2: #define AMD64_PCI_H ! 3: ! 4: #include "asm/io.h" ! 5: ! 6: #if !(defined(PCI_CONFIG_1) || defined(PCI_CONFIG_2)) ! 7: #define PCI_CONFIG_1 1 /* default */ ! 8: #endif ! 9: ! 10: #ifdef PCI_CONFIG_1 ! 11: ! 12: /* PCI Configuration Mechanism #1 */ ! 13: ! 14: /* Have pci_addr in the same format as the values written to 0xcf8 ! 15: * so register accesses can be made easy. */ ! 16: #define PCI_ADDR(bus, dev, fn) \ ! 17: ((pci_addr) (0x80000000u \ ! 18: | (uint32_t) (bus) << 16 \ ! 19: | (uint32_t) (dev) << 11 \ ! 20: | (uint32_t) (fn) << 8)) ! 21: ! 22: #define PCI_BUS(pcidev) ((uint8_t) ((pcidev) >> 16)) ! 23: #define PCI_DEV(pcidev) ((uint8_t) ((pcidev) >> 11) & 0x1f) ! 24: #define PCI_FN(pcidev) ((uint8_t) ((pcidev) >> 8) & 7) ! 25: ! 26: static inline uint8_t pci_config_read8(pci_addr dev, uint8_t reg) ! 27: { ! 28: outl(dev | (reg & ~3), 0xcf8); ! 29: return inb(0xcfc | (reg & 3)); ! 30: } ! 31: ! 32: static inline uint16_t pci_config_read16(pci_addr dev, uint8_t reg) ! 33: { ! 34: outl(dev | (reg & ~3), 0xcf8); ! 35: return inw(0xcfc | (reg & 2)); ! 36: } ! 37: ! 38: static inline uint32_t pci_config_read32(pci_addr dev, uint8_t reg) ! 39: { ! 40: outl(dev | reg, 0xcf8); ! 41: return inl(0xcfc | reg); ! 42: } ! 43: ! 44: static inline void pci_config_write8(pci_addr dev, uint8_t reg, uint8_t val) ! 45: { ! 46: outl(dev | (reg & ~3), 0xcf8); ! 47: outb(val, 0xcfc | (reg & 3)); ! 48: } ! 49: ! 50: static inline void pci_config_write16(pci_addr dev, uint8_t reg, uint16_t val) ! 51: { ! 52: outl(dev | (reg & ~3), 0xcf8); ! 53: outw(val, 0xcfc | (reg & 2)); ! 54: } ! 55: ! 56: static inline void pci_config_write32(pci_addr dev, uint8_t reg, uint32_t val) ! 57: { ! 58: outl(dev | reg, 0xcf8); ! 59: outl(val, 0xcfc); ! 60: } ! 61: ! 62: #else /* !PCI_CONFIG_1 */ ! 63: #error PCI Configuration Mechanism is not specified or implemented ! 64: #endif ! 65: ! 66: #endif /* AMD64_PCI_H */
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