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1.1 root 1: #ifndef _ASM_IO_H
2: #define _ASM_IO_H
3:
4: #include "asm/types.h"
5: #include "asi.h"
6:
7: #define NO_QEMU_PROTOS
8: #include "arch/common/fw_cfg.h"
9:
10: extern unsigned long va_shift; // Set in entry.S
11: // Defined in ldscript
12: extern char _start, _data, _stack, _estack, _end, _vmem, _evmem, _iomem;
13:
14: // XXX check use and merge
15: #define phys_to_virt(phys) ((void *) ((unsigned long) (phys)))
16: #define virt_to_phys(virt) ((unsigned long) (virt))
17:
18: #ifndef BOOTSTRAP
19:
20: extern unsigned long isa_io_base;
21:
22: /*
23: * The insw/outsw/insl/outsl macros don't do byte-swapping.
24: * They are only used in practice for transferring buffers which
25: * are arrays of bytes, and byte-swapping is not appropriate in
26: * that case. - paulus
27: */
28: #define insw(port, buf, ns) _insw_ns((uint16_t *)((port)+isa_io_base), (buf), (ns))
29: #define outsw(port, buf, ns) _outsw_ns((uint16_t *)((port)+isa_io_base), (buf), (ns))
30:
31: #define inb(port) in_8((uint8_t *)((port)+isa_io_base))
32: #define outb(val, port) out_8((uint8_t *)((port)+isa_io_base), (val))
33: #define inw(port) in_be16((uint16_t *)((port)+isa_io_base))
34: #define outw(val, port) out_be16((uint16_t *)((port)+isa_io_base), (val))
35: #define inl(port) in_be32((uint32_t *)((port)+isa_io_base))
36: #define outl(val, port) out_be32((uint32_t *)((port)+isa_io_base), (val))
37:
38: /*
39: * 8, 16 and 32 bit, big and little endian I/O operations, with barrier.
40: * On Sparc64, BE versions must swap bytes using LE access ASI.
41: */
42: static inline int in_8(volatile unsigned char *addr)
43: {
44: int ret;
45:
46: __asm__ __volatile__("lduba [%1] %2, %0\n\t"
47: : "=r"(ret)
48: : "r"(addr), "i" (ASI_PHYS_BYPASS_EC_E)
49: : "memory");
50:
51: return ret;
52: }
53:
54: static inline void out_8(volatile unsigned char *addr, int val)
55: {
56: __asm__ __volatile__("stba %0, [%1] %2\n\t"
57: :
58: : "r"(val), "r"(addr), "i" (ASI_PHYS_BYPASS_EC_E)
59: : "memory");
60: }
61:
62: static inline int in_le16(volatile unsigned short *addr)
63: {
64: int ret;
65:
66: __asm__ __volatile__("lduha [%1] %2, %0\n\t"
67: : "=r"(ret)
68: : "r"(addr), "i" (ASI_PHYS_BYPASS_EC_E)
69: : "memory");
70:
71: return ret;
72: }
73:
74: static inline int in_be16(volatile unsigned short *addr)
75: {
76: int ret;
77:
78: __asm__ __volatile__("lduha [%1] %2, %0\n\t"
79: : "=r"(ret)
80: : "r"(addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
81: : "memory");
82:
83: return ret;
84: }
85:
86: static inline void out_le16(volatile unsigned short *addr, int val)
87: {
88:
89: __asm__ __volatile__("stha %0, [%1] %2\n\t"
90: :
91: : "r"(val), "r"(addr), "i" (ASI_PHYS_BYPASS_EC_E)
92: : "memory");
93: }
94:
95: static inline void out_be16(volatile unsigned short *addr, int val)
96: {
97: __asm__ __volatile__("stha %0, [%1] %2\n\t"
98: :
99: : "r"(val), "r"(addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
100: : "memory");
101: }
102:
103: static inline unsigned in_le32(volatile unsigned *addr)
104: {
105: unsigned ret;
106:
107: __asm__ __volatile__("lduwa [%1] %2, %0\n\t"
108: : "=r"(ret)
109: : "r"(addr), "i" (ASI_PHYS_BYPASS_EC_E)
110: : "memory");
111:
112: return ret;
113: }
114:
115: static inline unsigned in_be32(volatile unsigned *addr)
116: {
117: unsigned ret;
118:
119: __asm__ __volatile__("lduwa [%1] %2, %0\n\t"
120: : "=r"(ret)
121: : "r"(addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
122: : "memory");
123: return ret;
124: }
125:
126: static inline void out_le32(volatile unsigned *addr, int val)
127: {
128: __asm__ __volatile__("stwa %0, [%1] %2\n\t"
129: :
130: : "r"(val), "r"(addr), "i" (ASI_PHYS_BYPASS_EC_E)
131: : "memory");
132: }
133:
134: static inline void out_be32(volatile unsigned *addr, int val)
135: {
136: __asm__ __volatile__("stwa %0, [%1] %2\n\t"
137: :
138: : "r"(val), "r"(addr), "i" (ASI_PHYS_BYPASS_EC_E_L)
139: : "memory");
140: }
141:
142: static inline void _insw_ns(volatile uint16_t * port, void *buf, int ns)
143: {
144: uint16_t *b = (uint16_t *) buf;
145:
146: while (ns > 0) {
147: *b++ = in_le16(port);
148: ns--;
149: }
150: }
151:
152: static inline void _outsw_ns(volatile uint16_t * port, const void *buf,
153: int ns)
154: {
155: uint16_t *b = (uint16_t *) buf;
156:
157: while (ns > 0) {
158: out_le16(port, *b++);
159: ns--;
160: }
161: }
162:
163: static inline void _insw(volatile uint16_t * port, void *buf, int ns)
164: {
165: uint16_t *b = (uint16_t *) buf;
166:
167: while (ns > 0) {
168: *b++ = in_be16(port);
169: ns--;
170: }
171: }
172:
173: static inline void _outsw(volatile uint16_t * port, const void *buf,
174: int ns)
175: {
176: uint16_t *b = (uint16_t *) buf;
177:
178: while (ns > 0) {
179: out_be16(port, *b++);
180: ns--;
181: }
182: }
183: #else /* BOOTSTRAP */
184: #ifdef FCOMPILER
185: #define inb(reg) ((u8)0xff)
186: #define inw(reg) ((u16)0xffff)
187: #define inl(reg) ((u32)0xffffffff)
188: #define outb(reg, val) do{} while(0)
189: #define outw(reg, val) do{} while(0)
190: #define outl(reg, val) do{} while(0)
191: #else
192: extern u8 inb(u32 reg);
193: extern u16 inw(u32 reg);
194: extern u32 inl(u32 reg);
195: extern void insw(u32 reg, void *addr, unsigned long count);
196: extern void outb(u32 reg, u8 val);
197: extern void outw(u32 reg, u16 val);
198: extern void outl(u32 reg, u32 val);
199: extern void outsw(u32 reg, const void *addr, unsigned long count);
200: #endif
201: #endif
202:
203: #if defined(CONFIG_QEMU)
204: #define FW_CFG_ARCH_WIDTH (FW_CFG_ARCH_LOCAL + 0x00)
205: #define FW_CFG_ARCH_HEIGHT (FW_CFG_ARCH_LOCAL + 0x01)
206: #define FW_CFG_ARCH_DEPTH (FW_CFG_ARCH_LOCAL + 0x02)
207: #endif
208:
209: #endif /* _ASM_IO_H */
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