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Annotation of qemu/roms/openbios/include/arch/sparc64/pci.h, revision 1.1

1.1     ! root        1: #ifndef SPARC64_PCI_H
        !             2: #define SPARC64_PCI_H
        !             3: 
        !             4: #include "asm/io.h"
        !             5: 
        !             6: #if !(defined(PCI_CONFIG_1) || defined(PCI_CONFIG_2))
        !             7: #define PCI_CONFIG_1 1 /* default */
        !             8: #endif
        !             9: 
        !            10: #ifdef PCI_CONFIG_1
        !            11: 
        !            12: /* PCI Configuration Mechanism #1 */
        !            13: 
        !            14: #define PCI_ADDR(bus, dev, fn) \
        !            15:     (((pci_addr) (uint32_t) (bus) << 16  \
        !            16:                | (uint32_t) (dev) << 11 \
        !            17:                | (uint32_t) (fn) << 8))
        !            18: 
        !            19: #define PCI_BUS(pcidev) ((uint8_t) ((pcidev) >> 16) & 0xff)
        !            20: #define PCI_DEV(pcidev) ((uint8_t) ((pcidev) >> 11) & 0x1f)
        !            21: #define PCI_FN(pcidev) ((uint8_t) ((pcidev) >> 8) & 7)
        !            22: 
        !            23: #define PCI_CONFIG(dev) (arch->cfg_addr                                 \
        !            24:                          + (unsigned long)PCI_ADDR(PCI_BUS(dev),        \
        !            25:                                                    PCI_DEV(dev),        \
        !            26:                                                    PCI_FN(dev)))
        !            27: 
        !            28: static inline uint8_t pci_config_read8(pci_addr dev, uint8_t reg)
        !            29: {
        !            30:        uint8_t res;
        !            31:         res = in_8((unsigned char*)(PCI_CONFIG(dev) + reg));
        !            32:        return res;
        !            33: }
        !            34: 
        !            35: static inline uint16_t pci_config_read16(pci_addr dev, uint8_t reg)
        !            36: {
        !            37:        uint16_t res;
        !            38:         res = in_be16((uint16_t *)(PCI_CONFIG(dev) + reg));
        !            39:        return res;
        !            40: }
        !            41: 
        !            42: static inline uint32_t pci_config_read32(pci_addr dev, uint8_t reg)
        !            43: {
        !            44:        uint32_t res;
        !            45:         res = in_be32((uint32_t *)(PCI_CONFIG(dev) + reg));
        !            46:        return res;
        !            47: }
        !            48: 
        !            49: static inline void pci_config_write8(pci_addr dev, uint8_t reg, uint8_t val)
        !            50: {
        !            51:         out_8((unsigned char*)(PCI_CONFIG(dev) + reg), val);
        !            52: }
        !            53: 
        !            54: static inline void pci_config_write16(pci_addr dev, uint8_t reg, uint16_t val)
        !            55: {
        !            56:         out_be16((uint16_t *)(PCI_CONFIG(dev) + reg), val);
        !            57: }
        !            58: 
        !            59: static inline void pci_config_write32(pci_addr dev, uint8_t reg, uint32_t val)
        !            60: {
        !            61:         out_be32((uint32_t *)(PCI_CONFIG(dev) + reg), val);
        !            62: }
        !            63: #else /* !PCI_CONFIG_1 */
        !            64: #error PCI Configuration Mechanism is not specified or implemented
        !            65: #endif
        !            66: 
        !            67: #endif /* SPARC64_PCI_H */

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