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1.1 root 1: NOTE! NOTE! NOTE! NOTE! NOTE! NOTE! NOTE! NOTE! NOTE! NOTE! NOTE! NOTE!
2:
3: /dev/bios is obsolete and no longer under development. Please adapt all
4: changes to the "flashrom" utility of LinuxBIOS. This utility can be found
5: at LinuxBIOSv2/utils/flashrom in the LinuxBIOS v2 repository. LinuxBIOS
6: is available at http://www.linuxbios.org/
7:
8: I'm also looking for volunteers to port all features available in /dev/bios
9: to flashrom so /dev/bios can be dropped from the OpenBIOS tree. These features
10: include
11:
12: - block information about flash chips
13: - block wise writing of flash chips
14: - lots of supported flash chips and vendors.
15:
16: If you have questions, contact Stefan Reinauer <[email protected]>
17:
18: NOTE! NOTE! NOTE! NOTE! NOTE! NOTE! NOTE! NOTE! NOTE! NOTE! NOTE! NOTE!
19:
20:
21: ChangeLog for /dev/bios
22:
23: ** 2004/03/31 ********************************************************
24:
25: * Added fix from Alex Beregszaszi to remove global *bios
26:
27: ** 2004/03/05 ********************************************************
28:
29: * fix compiling for 2.6 kernels.
30:
31: ** 03/06/04 **********************************************************
32:
33: * add SST49LF080A
34: * small 2.5 fix.
35:
36: ** 02/06/10 **********************************************************
37:
38: * some changes to detect pci cards firmware.
39: * pci cards firmware can be read even if flashing is not possible.
40: This is a new feature and might cause problems on some systems.
41:
42: ** 02/04/16 **********************************************************
43:
44: * reorganize Makefile, include .config from kernel.
45: * platform fixes for clean compilation.
46:
47: ** 02/04/12 **********************************************************
48:
49: * proprietary x86-64 support.
50: * change ruffian probe address
51:
52: ** 02/03/28 **********************************************************
53:
54: * proper implementation of system firmware detection on LX164 Alphas
55: * partly include jedec command cleanup patch from Pierrick Hascoet
56: <[email protected]>
57:
58: ** 02/03/11 **********************************************************
59:
60: * only probe 512k on CS5530(A)
61: * add EON EN29F002 chips.
62:
63: ** 02/02/22 **********************************************************
64:
65: * rewrite major parts of bridge probing to make driver more generic.
66: * add Ali chipset support
67: * Saner iounmap() of flash devices.
68:
69: ** 02/02/18 * 0.3.2 **************************************************
70:
71: * change cs5530 driver to map high rom range instead of low one
72: and don't use positive decode.
73: * remove ruffian flag. Alpha (164LX/UX) almost works with pc code.
74: * don't rely on register defaults in intel 8xx driver.
75: * updated pci device list. more entries, join amd and via entry.
76: * fix error handling in chipset detection.
77: * add support for Reliance/ServerWorks chipsets
78: * enable 1M 512k on intel 4x0 chips where it's possible
79: * cleanup proc file handling
80:
81: ** 02/02/17 **********************************************************
82:
83: * rewrote chipset initialisation skeleton.
84: * fix pci bios (un)mapping.
85: * experimental support for AlphaPC 164UX (Ruffian)
86: (probes at 0xfffffffffffc0000 instead of 0xfffffc87C0000000
87: * initial code for FWH mode chips
88: * Fix Toggle-Until-Ready code.
89:
90: ** 02/02/16 **********************************************************
91:
92: * iounmapping fixed. no more address space wasted.
93: * /proc/bios shows physical address now. dmesg shows
94: physical address and virtual memory area and offset.
95:
96: ** 02/02/13 **********************************************************
97:
98: * added i820/i830 chipset support
99: * added AMD 751/760MP(X) support
100: * added support for Itanium and 84460GX chipset
101: * added experimental support for some flash chips (ST, Intel,
102: Winbond)
103: * use spinlocks instead of hard cli()
104:
105: ** 02/02/11 **********************************************************
106:
107: * added GPL licence tag
108: * remove low bios area access tweaking for intel drivers
109: * speed up SST 39SF020 write
110: * fix compilation for 2.5 kernels
111:
112: ** 02/02/05 **********************************************************
113:
114: * added support for cs5530 (nsc/cyrix mediagx) chipset
115: * reorganized shadow/wp handling
116: * probe for 2mb high memory area instead of 256k only
117:
118: ** 01/08/01 * 0.3.1 **************************************************
119:
120: * compiles and works with Linux kernel 2.4
121: * rewrote flash chip probing
122: * always use ioremap now
123: * flash chips above 128k should work transparent
124: * Support for newer VIA chipsets
125:
126: ** 00/10/15 * 0.3.0pre1 **********************************************
127:
128: * added patch from Eric Estabrook
129: * support for 256k flash chips on intel 430/440 chipsets and via vp3
130: * split up source into several files
131: * Changes for Ruffian AXP machines. Does not work (yet).
132:
133: ** 99/07/29 * 0.2.101 ************************************************
134:
135: * Oh well.. 11 months? Impossible. I am a lazy guy. Implemented
136: some support for VIA Apollo VP3. Don't know whether it works, since
137: I don't have one.
138:
139: ** 98/09/06 **********************************************************
140:
141: patches by [email protected]:
142: * The pointer to bios_release in bios.c was on the flush pointer's
143: position. This caused Oopses.
144: * When bios_read was called with a file position after the actual end
145: of bios, it tried to read non-existant memory positions due to size
146: being unsigned (it isn't anymore) , causing spontaneous reboots on
147: my system
148:
149: ** 98/08/22 **********************************************************
150:
151: * Well,.. The diskless spectacle (0.2.100) was caused by a little bug
152: in in handling Intel PCI chipsets. Works now.
153: * Threw out the chipset_backout stuff. the PCI chipset handling should
154: always leave the machine in the same state it was before. ALWAYS.
155:
156: ** 98/08/18 * 0.2.100 ************************************************
157:
158: * Threw out the mem_type stuff. There are more important things than
159: this.
160: * Argh! After flashing fine on an Intel 28F001BT, the computer kept
161: hanging in an endless loop and refused writing the emergency boot
162: block to the end :-( There's some work until 0.3 is ready.
163: Implemented a timeout so that the system will not hang forever if
164: the flashchip behaves unexpected.
165: * Removed x86 probing in a loop. I think it never found anything else
166: but the system bios and *maybe* the graphics adapter bios. On the
167: other hand, it reconfigures some networking cards to silence.
168: Bad thing on diskless Linux boxes :)
169:
170: ** 98/08/15 **********************************************************
171:
172: * added some changes for intel to compile without warnings..
173:
174: ** 98/08/02 **********************************************************
175:
176: * What a boring job! Checked some dozen of flash chip entries today
177: and added a lot of new ones. I bet it gets hard to find anything
178: this driver does not know.
179:
180: ** 98/07/28 **********************************************************
181:
182: * Yeah! Atmel Chips finally work.. These Atmel guys are really weird.
183: * Testing last instead of first written byte now, when polling for the
184: end of a write access.
185:
186: ** 98/07/28 **********************************************************
187:
188: * Well, I am definitely spending too much time in IRC, but detecting
189: PCI cards' bioses works now (at least for me)
190: * Thrown out some obsolete stuff.
191: * Declared PCI and Flash reading/writing __inline__. Don't know,
192: whether this is a good idea. But let's try it for a while.
193: * Aaaargh! Some major mistakes in handling whether a flash has to
194: be erased before programming. FIXED!
195: * Even worse. An endless loop made it into writing in 0.2.99. Sorry!
196: I had no chance to test writing on an intel board with that release.
197: At least my warning, not to write, made sense.
198: * Intel flashchips are supported now!! It's at least tested on my
199: Alpha AXP LX164 Board (1MByte i28f008 chip) But all Intel flash chips
200: seem to work in the same way.
201: * Atmel 64kByte flash chips supported.
202:
203: ** 98/07/27 **********************************************************
204:
205: * Split up flash_probe in 2 parts to be able to expand probing on
206: PCI bioses and others correctly.
207: * Turned around 1st and 2nd probing codes. This is funny, Atmel
208: Flashroms give some wrong numbers if they are probed with the
209: 0x80/0x60 way. I only hope that no flashchips react on the
210: 0x90 method with wrong values.
211:
212: ** 98/07/19 * V0.2.99 ************************************************
213:
214: * Reading the flashchip works now on Alpha AXP (at least on my LX164
215: Board)
216: Writing ought to work, too, but Intel Flashchips are not supported
217: yet. This should be done until 0.3.0.
218: NOTE: I have no idea whether this driver still works on intel
219: boards or not. There have been too many changes. Please try, but
220: do not flash with this release of the driver.
221: * Minor Changes and fixes. Naming scheme changed a bit. This version
222: might work on James Mastros' machine again ?!?
223:
224: ** 98/07/11 **********************************************************
225:
226: * Started porting stuff to Alpha AXP architecture to continue testing
227: the flashing routines. We have a lot of tests next week, so I
228: won't get much stuff done..
229: Porting to AXP seems to be much more work than I thought. It may
230: take some time until the next version is released.
231: * Moved major number again. This time we have an official major
232: number for /dev/bios. Thanks to Hans Peter Anvin.
233: (Well, we have this one since May 1st, sorry for the delay)
234:
235: ** 98/06/26 * V0.2.95 ************************************************
236:
237: * added all Manufacturer IDs from the JEDEC standards publication.
238: * sorry for not having released a new version since months, but
239: my x86 machine died and I have no chance to do any testing right
240: now. I guess I must get a new Intel box, as Alpha AXP are all
241: delivered with the same Intel flash chips.
242:
243: ** 98/04/30 * V0.2.9 *************************************************
244:
245: * removed ioctls. They have been really unneccesary and did not fit
246: into the new driver layout.
247: * cleaned up the code. Hey, it should be readable again.
248: * Moved device minors from 10+ to 0+
249: * Rewrote most of the documentation
250: * changed intel shadowing routines. Now original values are saved
251: and shadowing is turned off for 0xc0000 to 0xdffff, too (This
252: was needed to support 2MBit system bios flash chips. Thanks again
253: to Matthew Harrell for intensive testing.
254: * Removed dirty hacks from bios_read_proc()
255: * Added some fields to struct flashdevice to support all ROM types,
256: not only flash roms. Probing for other types still missing.
257: * Implemented probing for some strange Winbond chips (0x80/0x20).
258:
259: ** 98/04/27 * V0.2.8 *************************************************
260:
261: *** Attention *** This version has a lot of changes since
262: 0.2.7, so be very careful, when testing. Things may
263: be broken that used to work.
264:
265: * Rewrote big parts of the driver to (theoretically) support
266: multiple flash chips and/or ROM areas.
267: * Tried to implement support for 2MBit System BIOS chips, but
268: I have no idea, whether it works. I don't have one.
269: * added some more OPTi, SiS and VIA PCI chipsets to chipset list.
270: They have no function yet, though.
271: * Some weird computers have an ISA bridge, but don't have it declared
272: as one. Now probing for known ISA bridge IDs. (Thanks to Matthew
273: Harrell for reporting this.)
274: * Added some new flashchip IDs and made some old ones work.
275:
276: ** 98/04/24 * V0.2.7 *************************************************
277:
278: * rewrote shadowing and wp functions to use a pci_functions structure
279: This makes it very easy to include new PCI chipsets.
280: * function chipset_init() detects PCI chipset.
281: * modversions support. Thanks to Matthew Harrell.
282: * moved PCI bridge detection to chipset_init()
283:
284: ** 98/04/23 * V0.2.6 *************************************************
285:
286: * repaired flashchip_ready_toggle and flashchip_ready_poll.
287: * Set WRITE_DELAY to 300 as it should be (works now)
288: * NOTE: These two changes make the operation of /dev/bios
289: theoretically correct, and by that quite secure.
290:
291: **********************************************************************
292:
293: There was no ChangeLog for versions prior to 0.2.6
294:
295: Stefan Reinauer, <[email protected]>
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