Return to sys-clipper.S CVS log

Up to [Qemu by Fabrice Bellard] / qemu / roms / qemu-palcode

Annotation of qemu/roms/qemu-palcode/sys-clipper.S, revision 1.1

1.1     ! root        1: /* PALcode and C runtime functions for the CLIPPER system emulation.
        !             2: 
        !             3:    Copyright (C) 2011 Richard Henderson
        !             4: 
        !             5:    This file is part of QEMU PALcode.
        !             6: 
        !             7:    This program is free software; you can redistribute it and/or modify
        !             8:    it under the terms of the GNU General Public License as published by
        !             9:    the Free Software Foundation; either version 2 of the License or
        !            10:    (at your option) any later version.
        !            11: 
        !            12:    This program is distributed in the hope that it will be useful,
        !            13:    but WITHOUT ANY WARRANTY; without even the implied warranty of
        !            14:    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the text
        !            15:    of the GNU General Public License for more details.
        !            16: 
        !            17:    You should have received a copy of the GNU General Public License
        !            18:    along with this program; see the file COPYING.  If not see
        !            19:    <http://www.gnu.org/licenses/>.  */
        !            20: 
        !            21: #include "pal.h"
        !            22: #include SYSTEM_H
        !            23: 
        !            24: /*
        !            25:  * Sys_Setup
        !            26:  *
        !            27:  * Do any system specific setup necessary.
        !            28:  *
        !            29:  * INPUT PARAMETERS
        !            30:  *
        !            31:  *     a0 = whami
        !            32:  *     p7 = return address
        !            33:  */
        !            34:        .globl  Sys_Setup
        !            35:        .ent    Sys_Setup
        !            36: Sys_Setup:
        !            37:        .frame  $sp, 0, p7, 0
        !            38:        lda             t0, TYPHOON_CCHIP_DIR0
        !            39:        lda             t1, TYPHOON_CCHIP_DIR2
        !            40:        lda             t2, TYPHOON_CCHIP_IIC0
        !            41:        lda             t3, TYPHOON_CCHIP_IIC2
        !            42:        and             a0, 2, t4
        !            43:        cmovne          t4, t1, t0
        !            44:        cmovne          t4, t3, t2
        !            45:        and             a0, 1, t4
        !            46:        sll             t4, 6, t4
        !            47:        addq            t0, t4, t0
        !            48:        addq            t2, t4, t2
        !            49:        LOAD_PHYS_CCHIP t4
        !            50:        addq            t0, t4, t0
        !            51:        addq            t2, t4, t2
        !            52:        mtpr            t0, ptCpuDIR
        !            53:        mtpr            t2, ptCpuIIC
        !            54:        ret
        !            55:        .end    Sys_Setup
        !            56: 
        !            57: /*
        !            58:  * Sys_Dev_Vector
        !            59:  *
        !            60:  * Load the SRM interrupt vector for the system.
        !            61:  *
        !            62:  * INPUT PARAMETERS
        !            63:  *
        !            64:  *     p7 = return address
        !            65:  *
        !            66:  * OUTPUT PARAMETERS
        !            67:  *
        !            68:  *     a1 = interrupt vector
        !            69:  */
        !            70: 
        !            71:        .globl  Sys_Dev_Vector
        !            72:        .ent    Sys_Dev_Vector
        !            73: Sys_Dev_Vector:
        !            74:        .frame  $sp, 0, p7, 0
        !            75:        mfpr    a1, ptCpuDIR            // Load int mask for this CPU
        !            76:        ldq_p   a1, 0(a1)
        !            77:        beq     a1, CallPal_Rti         // No interrupts asserted?
        !            78: 
        !            79:        cttz    a1, a1                  // Find the first asserted interrupt.
        !            80: 
        !            81:        cmpeq   a1, 55, a0              // Is this an ISA interrupt?
        !            82:        addq    a1, 16, a1              // PCI interrupt numbers start at 16
        !            83:        beq     a0, 1f
        !            84: 
        !            85:        LOAD_PHYS_PCHIP0_IACK a1        // IACK results in the ISA irq
        !            86:        ldl_p   a1, 0(a1)
        !            87: 
        !            88: 1:     sll     a1, 4, a1
        !            89:        lda     a1, 0x800(a1)
        !            90:        ret     $31, (p7), 0
        !            91:        .end Sys_Dev_Vector
        !            92: 
        !            93: /*
        !            94:  * Cserve_Ena
        !            95:  *
        !            96:  * Unmask a PCI interrupt
        !            97:  */
        !            98:        .globl  Cserve_Ena
        !            99: Cserve_Ena:
        !           100:        // FIXME
        !           101:        hw_rei
        !           102: ENDFN  Cserve_Ena
        !           103: 
        !           104: /*
        !           105:  * Cserve_Dis
        !           106:  *
        !           107:  * Mask a PCI interrupt
        !           108:  */
        !           109:        .globl  Cserve_Dis
        !           110: Cserve_Dis:
        !           111:        // FIXME
        !           112:        hw_rei
        !           113: ENDFN  Cserve_Dis
        !           114: 
        !           115: /*
        !           116:  * PCI parameters
        !           117:  */
        !           118: 
        !           119:        .section .sdata
        !           120: 
        !           121:        .align  3
        !           122:        .globl  pci_io_base
        !           123:        .type   pci_io_base, @object
        !           124:        .size   pci_io_base, 8
        !           125: pci_io_base:
        !           126:        .quad   PIO_KSEG_ADDR + TYPHOON_PCHIP0_PCI_IO
        !           127: 
        !           128:        .globl  pci_conf_base
        !           129:        .type   pci_conf_base, @object
        !           130:        .size   pci_conf_base, 8
        !           131: pci_conf_base:
        !           132:        .quad   PIO_KSEG_ADDR + TYPHOON_PCHIP0_PCI_CONF
        !           133: 
        !           134:        .align  3
        !           135:        .globl  pci_mem_base
        !           136:        .type   pci_mem_base, @object
        !           137:        .size   pci_mem_base, 8
        !           138: pci_mem_base:
        !           139:        .quad   PIO_KSEG_ADDR + TYPHOON_PCHIP0_PCI_MEM
        !           140: 

This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.