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Annotation of qemu/roms/seabios/TODO, revision 1.1.1.2

1.1       root        1: If POST is rerun, try to do a machine reboot.
                      2: 
                      3: Review changes committed to coreboot, virtualbox, qemu, kvm, and bochs
                      4: cvs tip.
1.1.1.2 ! root        5:   * bochs cvs (20100104):
        !             6:     -- changes synched
1.1       root        7:   * coreboot (r3348):    (bochs 20060708)
                      8:     -- no noteworthy enhancements
1.1.1.2 ! root        9:   * qemu - now uses SeaBIOS
        !            10:   * kvm - now uses SeaBIOS
1.1       root       11:   * virtualbox (r13560): (bochs 20061231)
1.1.1.2 ! root       12:     -- lots of mouse changes, logo, scsi/etherboot hooks,
1.1       root       13:        floppy data rate?, int19 calls post
                     14: 
1.1.1.2 ! root       15: Possibly move code from entry_post in romlayout.S to C code in
        !            16: handle_resume and always call 16bit C code on post.
        !            17: 
1.1       root       18: Audit all sti/cli calls.  Audit all call16 calls to make sure flags is
                     19: setup properly with respect to irqs.
                     20: 
                     21: The __call16 code does a long jump to the interrupt trampolines - this
                     22: is unnecessary.
                     23: 
                     24: Support PCIv3 roms?  Add support for PCI "configuration code"
                     25: extensions?
                     26: 
                     27: Possibly add option to eliminate tsc based delays on emulators.
                     28: 
                     29: Add a kconfig style configuration program instead of requiring users
                     30: to modify config.h.
                     31: 
                     32: Support usb booting?  Support usb mice?
                     33: 
                     34: Add a graphical boot splash screen?
                     35: 
                     36: Possibly support sending debug information over EHCI debug port.

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