![[BACK]](/cvsweb/icons/back.gif){kind=icon}
Return to ata.c CVS log ![[TXT]](/cvsweb/icons/text.gif){kind=icon}
![[DIR]](/cvsweb/icons/dir.gif){kind=icon}
Up to [Qemu by Fabrice Bellard] / qemu / roms / seabios / src|
Return to ata.c CVS log | Up to [Qemu by Fabrice Bellard] / qemu / roms / seabios / src |
1.1 root 1: // Low level ATA disk access
2: //
3: // Copyright (C) 2008,2009 Kevin O'Connor <[email protected]>
4: // Copyright (C) 2002 MandrakeSoft S.A.
5: //
6: // This file may be distributed under the terms of the GNU LGPLv3 license.
7:
8: #include "types.h" // u8
9: #include "ioport.h" // inb
10: #include "util.h" // dprintf
11: #include "cmos.h" // inb_cmos
12: #include "pic.h" // enable_hwirq
13: #include "biosvar.h" // GET_EBDA
14: #include "pci.h" // foreachpci
15: #include "pci_ids.h" // PCI_CLASS_STORAGE_OTHER
16: #include "pci_regs.h" // PCI_INTERRUPT_LINE
1.1.1.5 root 17: #include "boot.h" // boot_add_hd
1.1 root 18: #include "disk.h" // struct ata_s
19: #include "ata.h" // ATA_CB_STAT
1.1.1.3 root 20: #include "blockcmd.h" // CDB_CMD_READ_10
1.1 root 21:
22: #define IDE_TIMEOUT 32000 //32 seconds max for IDE ops
23:
24:
25: /****************************************************************
26: * Helper functions
27: ****************************************************************/
28:
29: // Wait for the specified ide state
30: static inline int
31: await_ide(u8 mask, u8 flags, u16 base, u16 timeout)
32: {
33: u64 end = calc_future_tsc(timeout);
34: for (;;) {
35: u8 status = inb(base+ATA_CB_STAT);
36: if ((status & mask) == flags)
37: return status;
1.1.1.3 root 38: if (check_tsc(end)) {
39: warn_timeout();
1.1 root 40: return -1;
41: }
42: yield();
43: }
44: }
45:
46: // Wait for the device to be not-busy.
47: static int
48: await_not_bsy(u16 base)
49: {
50: return await_ide(ATA_CB_STAT_BSY, 0, base, IDE_TIMEOUT);
51: }
52:
53: // Wait for the device to be ready.
54: static int
55: await_rdy(u16 base)
56: {
57: return await_ide(ATA_CB_STAT_RDY, ATA_CB_STAT_RDY, base, IDE_TIMEOUT);
58: }
59:
60: // Wait for ide state - pauses for one ata cycle first.
61: static inline int
62: pause_await_not_bsy(u16 iobase1, u16 iobase2)
63: {
64: // Wait one PIO transfer cycle.
65: inb(iobase2 + ATA_CB_ASTAT);
66:
67: return await_not_bsy(iobase1);
68: }
69:
70: // Wait for ide state - pause for 400ns first.
71: static inline int
72: ndelay_await_not_bsy(u16 iobase1)
73: {
74: ndelay(400);
75: return await_not_bsy(iobase1);
76: }
77:
78: // Reset a drive
79: static void
1.1.1.3 root 80: ata_reset(struct atadrive_s *adrive_g)
1.1 root 81: {
1.1.1.3 root 82: struct ata_channel_s *chan_gf = GET_GLOBAL(adrive_g->chan_gf);
83: u8 slave = GET_GLOBAL(adrive_g->slave);
84: u16 iobase1 = GET_GLOBALFLAT(chan_gf->iobase1);
85: u16 iobase2 = GET_GLOBALFLAT(chan_gf->iobase2);
1.1 root 86:
1.1.1.3 root 87: dprintf(6, "ata_reset drive=%p\n", &adrive_g->drive);
1.1 root 88: // Pulse SRST
89: outb(ATA_CB_DC_HD15 | ATA_CB_DC_NIEN | ATA_CB_DC_SRST, iobase2+ATA_CB_DC);
90: udelay(5);
91: outb(ATA_CB_DC_HD15 | ATA_CB_DC_NIEN, iobase2+ATA_CB_DC);
92: msleep(2);
93:
94: // wait for device to become not busy.
95: int status = await_not_bsy(iobase1);
96: if (status < 0)
97: goto done;
98: if (slave) {
99: // Change device.
100: u64 end = calc_future_tsc(IDE_TIMEOUT);
101: for (;;) {
102: outb(ATA_CB_DH_DEV1, iobase1 + ATA_CB_DH);
103: status = ndelay_await_not_bsy(iobase1);
104: if (status < 0)
105: goto done;
106: if (inb(iobase1 + ATA_CB_DH) == ATA_CB_DH_DEV1)
107: break;
108: // Change drive request failed to take effect - retry.
1.1.1.3 root 109: if (check_tsc(end)) {
110: warn_timeout();
1.1 root 111: goto done;
112: }
113: }
114: } else {
115: // QEMU doesn't reset dh on reset, so set it explicitly.
116: outb(ATA_CB_DH_DEV0, iobase1 + ATA_CB_DH);
117: }
118:
119: // On a user-reset request, wait for RDY if it is an ATA device.
1.1.1.3 root 120: u8 type=GET_GLOBAL(adrive_g->drive.type);
1.1 root 121: if (type == DTYPE_ATA)
122: status = await_rdy(iobase1);
123:
124: done:
125: // Enable interrupts
126: outb(ATA_CB_DC_HD15, iobase2+ATA_CB_DC);
127:
128: dprintf(6, "ata_reset exit status=%x\n", status);
129: }
130:
1.1.1.2 root 131: // Check for drive RDY for 16bit interface command.
1.1 root 132: static int
1.1.1.3 root 133: isready(struct atadrive_s *adrive_g)
1.1 root 134: {
135: // Read the status from controller
1.1.1.3 root 136: struct ata_channel_s *chan_gf = GET_GLOBAL(adrive_g->chan_gf);
137: u16 iobase1 = GET_GLOBALFLAT(chan_gf->iobase1);
1.1 root 138: u8 status = inb(iobase1 + ATA_CB_STAT);
139: if ((status & (ATA_CB_STAT_BSY|ATA_CB_STAT_RDY)) == ATA_CB_STAT_RDY)
140: return DISK_RET_SUCCESS;
141: return DISK_RET_ENOTREADY;
142: }
143:
1.1.1.2 root 144: // Default 16bit command demuxer for ATA and ATAPI devices.
1.1 root 145: static int
146: process_ata_misc_op(struct disk_op_s *op)
147: {
148: if (!CONFIG_ATA)
149: return 0;
150:
1.1.1.3 root 151: struct atadrive_s *adrive_g = container_of(
152: op->drive_g, struct atadrive_s, drive);
1.1 root 153: switch (op->command) {
154: case CMD_RESET:
1.1.1.3 root 155: ata_reset(adrive_g);
1.1 root 156: return DISK_RET_SUCCESS;
157: case CMD_ISREADY:
1.1.1.3 root 158: return isready(adrive_g);
1.1 root 159: case CMD_FORMAT:
160: case CMD_VERIFY:
161: case CMD_SEEK:
162: return DISK_RET_SUCCESS;
163: default:
164: op->count = 0;
165: return DISK_RET_EPARAM;
166: }
167: }
168:
169:
170: /****************************************************************
171: * ATA send command
172: ****************************************************************/
173:
174: struct ata_pio_command {
175: u8 feature;
176: u8 sector_count;
177: u8 lba_low;
178: u8 lba_mid;
179: u8 lba_high;
180: u8 device;
181: u8 command;
182:
1.1.1.2 root 183: u8 feature2;
1.1 root 184: u8 sector_count2;
185: u8 lba_low2;
186: u8 lba_mid2;
187: u8 lba_high2;
188: };
189:
190: // Send an ata command to the drive.
191: static int
1.1.1.3 root 192: send_cmd(struct atadrive_s *adrive_g, struct ata_pio_command *cmd)
1.1 root 193: {
1.1.1.3 root 194: struct ata_channel_s *chan_gf = GET_GLOBAL(adrive_g->chan_gf);
195: u8 slave = GET_GLOBAL(adrive_g->slave);
196: u16 iobase1 = GET_GLOBALFLAT(chan_gf->iobase1);
1.1 root 197:
198: // Select device
199: int status = await_not_bsy(iobase1);
200: if (status < 0)
201: return status;
202: u8 newdh = ((cmd->device & ~ATA_CB_DH_DEV1)
203: | (slave ? ATA_CB_DH_DEV1 : ATA_CB_DH_DEV0));
204: u8 olddh = inb(iobase1 + ATA_CB_DH);
205: outb(newdh, iobase1 + ATA_CB_DH);
206: if ((olddh ^ newdh) & (1<<4)) {
207: // Was a device change - wait for device to become not busy.
208: status = ndelay_await_not_bsy(iobase1);
209: if (status < 0)
210: return status;
211: }
212:
1.1.1.2 root 213: // Check for ATA_CMD_(READ|WRITE)_(SECTORS|DMA)_EXT commands.
214: if ((cmd->command & ~0x11) == ATA_CMD_READ_SECTORS_EXT) {
215: outb(cmd->feature2, iobase1 + ATA_CB_FR);
1.1 root 216: outb(cmd->sector_count2, iobase1 + ATA_CB_SC);
217: outb(cmd->lba_low2, iobase1 + ATA_CB_SN);
218: outb(cmd->lba_mid2, iobase1 + ATA_CB_CL);
219: outb(cmd->lba_high2, iobase1 + ATA_CB_CH);
220: }
221: outb(cmd->feature, iobase1 + ATA_CB_FR);
222: outb(cmd->sector_count, iobase1 + ATA_CB_SC);
223: outb(cmd->lba_low, iobase1 + ATA_CB_SN);
224: outb(cmd->lba_mid, iobase1 + ATA_CB_CL);
225: outb(cmd->lba_high, iobase1 + ATA_CB_CH);
226: outb(cmd->command, iobase1 + ATA_CB_CMD);
227:
1.1.1.2 root 228: return 0;
229: }
230:
231: // Wait for data after calling 'send_cmd'.
232: static int
233: ata_wait_data(u16 iobase1)
234: {
235: int status = ndelay_await_not_bsy(iobase1);
1.1 root 236: if (status < 0)
237: return status;
238:
239: if (status & ATA_CB_STAT_ERR) {
240: dprintf(6, "send_cmd : read error (status=%02x err=%02x)\n"
241: , status, inb(iobase1 + ATA_CB_ERR));
242: return -4;
243: }
244: if (!(status & ATA_CB_STAT_DRQ)) {
245: dprintf(6, "send_cmd : DRQ not set (status %02x)\n", status);
246: return -5;
247: }
248:
249: return 0;
250: }
251:
1.1.1.2 root 252: // Send an ata command that does not transfer any further data.
253: int
1.1.1.3 root 254: ata_cmd_nondata(struct atadrive_s *adrive_g, struct ata_pio_command *cmd)
1.1.1.2 root 255: {
1.1.1.3 root 256: struct ata_channel_s *chan_gf = GET_GLOBAL(adrive_g->chan_gf);
257: u16 iobase1 = GET_GLOBALFLAT(chan_gf->iobase1);
258: u16 iobase2 = GET_GLOBALFLAT(chan_gf->iobase2);
1.1.1.2 root 259:
260: // Disable interrupts
261: outb(ATA_CB_DC_HD15 | ATA_CB_DC_NIEN, iobase2 + ATA_CB_DC);
262:
1.1.1.3 root 263: int ret = send_cmd(adrive_g, cmd);
1.1.1.2 root 264: if (ret)
265: goto fail;
266: ret = ndelay_await_not_bsy(iobase1);
267: if (ret < 0)
268: goto fail;
269:
270: if (ret & ATA_CB_STAT_ERR) {
271: dprintf(6, "nondata cmd : read error (status=%02x err=%02x)\n"
272: , ret, inb(iobase1 + ATA_CB_ERR));
273: ret = -4;
274: goto fail;
275: }
276: if (ret & ATA_CB_STAT_DRQ) {
277: dprintf(6, "nondata cmd : DRQ set (status %02x)\n", ret);
278: ret = -5;
279: goto fail;
280: }
281:
282: fail:
283: // Enable interrupts
284: outb(ATA_CB_DC_HD15, iobase2+ATA_CB_DC);
285:
286: return ret;
287: }
288:
1.1 root 289:
290: /****************************************************************
1.1.1.2 root 291: * ATA PIO transfers
1.1 root 292: ****************************************************************/
293:
294: // Transfer 'op->count' blocks (of 'blocksize' bytes) to/from drive
295: // 'op->drive_g'.
296: static int
1.1.1.2 root 297: ata_pio_transfer(struct disk_op_s *op, int iswrite, int blocksize)
1.1 root 298: {
1.1.1.2 root 299: dprintf(16, "ata_pio_transfer id=%p write=%d count=%d bs=%d buf=%p\n"
1.1 root 300: , op->drive_g, iswrite, op->count, blocksize, op->buf_fl);
301:
1.1.1.3 root 302: struct atadrive_s *adrive_g = container_of(
303: op->drive_g, struct atadrive_s, drive);
304: struct ata_channel_s *chan_gf = GET_GLOBAL(adrive_g->chan_gf);
305: u16 iobase1 = GET_GLOBALFLAT(chan_gf->iobase1);
306: u16 iobase2 = GET_GLOBALFLAT(chan_gf->iobase2);
1.1 root 307: int count = op->count;
308: void *buf_fl = op->buf_fl;
309: int status;
310: for (;;) {
311: if (iswrite) {
312: // Write data to controller
313: dprintf(16, "Write sector id=%p dest=%p\n", op->drive_g, buf_fl);
314: if (CONFIG_ATA_PIO32)
315: outsl_fl(iobase1, buf_fl, blocksize / 4);
316: else
317: outsw_fl(iobase1, buf_fl, blocksize / 2);
318: } else {
319: // Read data from controller
320: dprintf(16, "Read sector id=%p dest=%p\n", op->drive_g, buf_fl);
321: if (CONFIG_ATA_PIO32)
322: insl_fl(iobase1, buf_fl, blocksize / 4);
323: else
324: insw_fl(iobase1, buf_fl, blocksize / 2);
325: }
326: buf_fl += blocksize;
327:
328: status = pause_await_not_bsy(iobase1, iobase2);
329: if (status < 0) {
330: // Error
331: op->count -= count;
332: return status;
333: }
334:
335: count--;
336: if (!count)
337: break;
338: status &= (ATA_CB_STAT_BSY | ATA_CB_STAT_DRQ | ATA_CB_STAT_ERR);
339: if (status != ATA_CB_STAT_DRQ) {
1.1.1.2 root 340: dprintf(6, "ata_pio_transfer : more sectors left (status %02x)\n"
1.1 root 341: , status);
342: op->count -= count;
343: return -6;
344: }
345: }
346:
347: status &= (ATA_CB_STAT_BSY | ATA_CB_STAT_DF | ATA_CB_STAT_DRQ
348: | ATA_CB_STAT_ERR);
349: if (!iswrite)
350: status &= ~ATA_CB_STAT_DF;
351: if (status != 0) {
1.1.1.2 root 352: dprintf(6, "ata_pio_transfer : no sectors left (status %02x)\n", status);
1.1 root 353: return -7;
354: }
355:
356: return 0;
357: }
358:
359:
360: /****************************************************************
1.1.1.2 root 361: * ATA DMA transfers
362: ****************************************************************/
363:
364: #define BM_CMD 0
365: #define BM_CMD_MEMWRITE 0x08
366: #define BM_CMD_START 0x01
367: #define BM_STATUS 2
368: #define BM_STATUS_IRQ 0x04
369: #define BM_STATUS_ERROR 0x02
370: #define BM_STATUS_ACTIVE 0x01
371: #define BM_TABLE 4
372:
373: struct sff_dma_prd {
374: u32 buf_fl;
375: u32 count;
376: };
377:
378: // Check if DMA available and setup transfer if so.
379: static int
380: ata_try_dma(struct disk_op_s *op, int iswrite, int blocksize)
381: {
1.1.1.3 root 382: if (! CONFIG_ATA_DMA)
383: return -1;
1.1.1.2 root 384: u32 dest = (u32)op->buf_fl;
385: if (dest & 1)
386: // Need minimum alignment of 1.
387: return -1;
1.1.1.3 root 388: struct atadrive_s *adrive_g = container_of(
389: op->drive_g, struct atadrive_s, drive);
390: struct ata_channel_s *chan_gf = GET_GLOBAL(adrive_g->chan_gf);
391: u16 iomaster = GET_GLOBALFLAT(chan_gf->iomaster);
1.1.1.2 root 392: if (! iomaster)
393: return -1;
394: u32 bytes = op->count * blocksize;
395: if (! bytes)
396: return -1;
397:
398: // Build PRD dma structure.
399: struct sff_dma_prd *dma = MAKE_FLATPTR(
400: get_ebda_seg()
401: , (void*)offsetof(struct extended_bios_data_area_s, extra_stack));
402: struct sff_dma_prd *origdma = dma;
403: while (bytes) {
404: if (dma >= &origdma[16])
405: // Too many descriptors..
406: return -1;
407: u32 count = bytes;
408: u32 max = 0x10000 - (dest & 0xffff);
409: if (count > max)
410: count = max;
411:
412: SET_FLATPTR(dma->buf_fl, dest);
413: bytes -= count;
414: if (!bytes)
415: // Last descriptor.
416: count |= 1<<31;
417: dprintf(16, "dma@%p: %08x %08x\n", dma, dest, count);
418: dest += count;
419: SET_FLATPTR(dma->count, count);
420: dma++;
421: }
422:
423: // Program bus-master controller.
424: outl((u32)origdma, iomaster + BM_TABLE);
425: u8 oldcmd = inb(iomaster + BM_CMD) & ~(BM_CMD_MEMWRITE|BM_CMD_START);
426: outb(oldcmd | (iswrite ? 0x00 : BM_CMD_MEMWRITE), iomaster + BM_CMD);
427: outb(BM_STATUS_ERROR|BM_STATUS_IRQ, iomaster + BM_STATUS);
428:
429: return 0;
430: }
431:
432: // Transfer data using DMA.
433: static int
434: ata_dma_transfer(struct disk_op_s *op)
435: {
1.1.1.3 root 436: if (! CONFIG_ATA_DMA)
437: return -1;
438: dprintf(16, "ata_dma_transfer id=%p buf=%p\n", op->drive_g, op->buf_fl);
1.1.1.2 root 439:
1.1.1.3 root 440: struct atadrive_s *adrive_g = container_of(
441: op->drive_g, struct atadrive_s, drive);
442: struct ata_channel_s *chan_gf = GET_GLOBAL(adrive_g->chan_gf);
443: u16 iomaster = GET_GLOBALFLAT(chan_gf->iomaster);
1.1.1.2 root 444:
445: // Start bus-master controller.
446: u8 oldcmd = inb(iomaster + BM_CMD);
447: outb(oldcmd | BM_CMD_START, iomaster + BM_CMD);
448:
449: u64 end = calc_future_tsc(IDE_TIMEOUT);
450: u8 status;
451: for (;;) {
452: status = inb(iomaster + BM_STATUS);
453: if (status & BM_STATUS_IRQ)
454: break;
455: // Transfer in progress
1.1.1.3 root 456: if (check_tsc(end)) {
1.1.1.2 root 457: // Timeout.
1.1.1.3 root 458: warn_timeout();
1.1.1.2 root 459: break;
460: }
461: yield();
462: }
463: outb(oldcmd & ~BM_CMD_START, iomaster + BM_CMD);
464:
1.1.1.3 root 465: u16 iobase1 = GET_GLOBALFLAT(chan_gf->iobase1);
466: u16 iobase2 = GET_GLOBALFLAT(chan_gf->iobase2);
1.1.1.2 root 467: int idestatus = pause_await_not_bsy(iobase1, iobase2);
468:
469: if ((status & (BM_STATUS_IRQ|BM_STATUS_ACTIVE)) == BM_STATUS_IRQ
470: && idestatus >= 0x00
471: && (idestatus & (ATA_CB_STAT_BSY | ATA_CB_STAT_DF | ATA_CB_STAT_DRQ
472: | ATA_CB_STAT_ERR)) == 0x00)
473: // Success.
474: return 0;
475:
476: dprintf(6, "IDE DMA error (dma=%x ide=%x/%x/%x)\n", status, idestatus
477: , inb(iobase2 + ATA_CB_ASTAT), inb(iobase1 + ATA_CB_ERR));
478: op->count = 0;
479: return -1;
480: }
481:
482:
483: /****************************************************************
1.1 root 484: * ATA hard drive functions
485: ****************************************************************/
486:
1.1.1.2 root 487: // Transfer data to harddrive using PIO protocol.
1.1 root 488: static int
1.1.1.2 root 489: ata_pio_cmd_data(struct disk_op_s *op, int iswrite, struct ata_pio_command *cmd)
1.1 root 490: {
1.1.1.3 root 491: struct atadrive_s *adrive_g = container_of(
492: op->drive_g, struct atadrive_s, drive);
493: struct ata_channel_s *chan_gf = GET_GLOBAL(adrive_g->chan_gf);
494: u16 iobase1 = GET_GLOBALFLAT(chan_gf->iobase1);
495: u16 iobase2 = GET_GLOBALFLAT(chan_gf->iobase2);
1.1.1.2 root 496:
497: // Disable interrupts
498: outb(ATA_CB_DC_HD15 | ATA_CB_DC_NIEN, iobase2 + ATA_CB_DC);
499:
1.1.1.3 root 500: int ret = send_cmd(adrive_g, cmd);
1.1.1.2 root 501: if (ret)
502: goto fail;
503: ret = ata_wait_data(iobase1);
504: if (ret)
505: goto fail;
506: ret = ata_pio_transfer(op, iswrite, DISK_SECTOR_SIZE);
507:
508: fail:
509: // Enable interrupts
510: outb(ATA_CB_DC_HD15, iobase2+ATA_CB_DC);
511: return ret;
512: }
513:
514: // Transfer data to harddrive using DMA protocol.
515: static int
516: ata_dma_cmd_data(struct disk_op_s *op, struct ata_pio_command *cmd)
517: {
1.1.1.3 root 518: if (! CONFIG_ATA_DMA)
519: return -1;
520: struct atadrive_s *adrive_g = container_of(
521: op->drive_g, struct atadrive_s, drive);
522: int ret = send_cmd(adrive_g, cmd);
1.1.1.2 root 523: if (ret)
524: return ret;
525: return ata_dma_transfer(op);
526: }
527:
528: // Read/write count blocks from a harddrive.
529: static int
530: ata_readwrite(struct disk_op_s *op, int iswrite)
531: {
1.1 root 532: u64 lba = op->lba;
533:
1.1.1.2 root 534: int usepio = ata_try_dma(op, iswrite, DISK_SECTOR_SIZE);
535:
1.1 root 536: struct ata_pio_command cmd;
537: memset(&cmd, 0, sizeof(cmd));
538:
539: if (op->count >= (1<<8) || lba + op->count >= (1<<28)) {
540: cmd.sector_count2 = op->count >> 8;
541: cmd.lba_low2 = lba >> 24;
542: cmd.lba_mid2 = lba >> 32;
543: cmd.lba_high2 = lba >> 40;
544: lba &= 0xffffff;
1.1.1.2 root 545:
546: if (usepio)
547: cmd.command = (iswrite ? ATA_CMD_WRITE_SECTORS_EXT
548: : ATA_CMD_READ_SECTORS_EXT);
549: else
550: cmd.command = (iswrite ? ATA_CMD_WRITE_DMA_EXT
551: : ATA_CMD_READ_DMA_EXT);
552: } else {
553: if (usepio)
554: cmd.command = (iswrite ? ATA_CMD_WRITE_SECTORS
555: : ATA_CMD_READ_SECTORS);
556: else
557: cmd.command = (iswrite ? ATA_CMD_WRITE_DMA
558: : ATA_CMD_READ_DMA);
1.1 root 559: }
560:
561: cmd.sector_count = op->count;
562: cmd.lba_low = lba;
563: cmd.lba_mid = lba >> 8;
564: cmd.lba_high = lba >> 16;
565: cmd.device = ((lba >> 24) & 0xf) | ATA_CB_DH_LBA;
566:
1.1.1.2 root 567: int ret;
568: if (usepio)
569: ret = ata_pio_cmd_data(op, iswrite, &cmd);
570: else
571: ret = ata_dma_cmd_data(op, &cmd);
1.1 root 572: if (ret)
1.1.1.2 root 573: return DISK_RET_EBADTRACK;
574: return DISK_RET_SUCCESS;
1.1 root 575: }
576:
1.1.1.2 root 577: // 16bit command demuxer for ATA harddrives.
1.1 root 578: int
579: process_ata_op(struct disk_op_s *op)
580: {
581: if (!CONFIG_ATA)
582: return 0;
583:
584: switch (op->command) {
585: case CMD_READ:
1.1.1.2 root 586: return ata_readwrite(op, 0);
1.1 root 587: case CMD_WRITE:
1.1.1.2 root 588: return ata_readwrite(op, 1);
1.1 root 589: default:
590: return process_ata_misc_op(op);
591: }
592: }
593:
594:
595: /****************************************************************
596: * ATAPI functions
597: ****************************************************************/
598:
1.1.1.3 root 599: #define CDROM_CDB_SIZE 12
600:
1.1 root 601: // Low-level atapi command transmit function.
1.1.1.3 root 602: int
603: atapi_cmd_data(struct disk_op_s *op, void *cdbcmd, u16 blocksize)
1.1 root 604: {
1.1.1.5 root 605: if (! CONFIG_ATA)
606: return 0;
607:
1.1.1.3 root 608: struct atadrive_s *adrive_g = container_of(
609: op->drive_g, struct atadrive_s, drive);
610: struct ata_channel_s *chan_gf = GET_GLOBAL(adrive_g->chan_gf);
611: u16 iobase1 = GET_GLOBALFLAT(chan_gf->iobase1);
612: u16 iobase2 = GET_GLOBALFLAT(chan_gf->iobase2);
1.1 root 613:
614: struct ata_pio_command cmd;
1.1.1.2 root 615: memset(&cmd, 0, sizeof(cmd));
1.1 root 616: cmd.lba_mid = blocksize;
617: cmd.lba_high = blocksize >> 8;
618: cmd.command = ATA_CMD_PACKET;
619:
620: // Disable interrupts
621: outb(ATA_CB_DC_HD15 | ATA_CB_DC_NIEN, iobase2 + ATA_CB_DC);
622:
1.1.1.3 root 623: int ret = send_cmd(adrive_g, &cmd);
1.1 root 624: if (ret)
625: goto fail;
1.1.1.2 root 626: ret = ata_wait_data(iobase1);
627: if (ret)
628: goto fail;
1.1 root 629:
630: // Send command to device
1.1.1.3 root 631: outsw_fl(iobase1, MAKE_FLATPTR(GET_SEG(SS), cdbcmd), CDROM_CDB_SIZE / 2);
1.1 root 632:
633: int status = pause_await_not_bsy(iobase1, iobase2);
634: if (status < 0) {
635: ret = status;
636: goto fail;
637: }
638:
639: if (status & ATA_CB_STAT_ERR) {
640: u8 err = inb(iobase1 + ATA_CB_ERR);
641: // skip "Not Ready"
642: if (err != 0x20)
643: dprintf(6, "send_atapi_cmd : read error (status=%02x err=%02x)\n"
644: , status, err);
645: ret = -2;
646: goto fail;
647: }
1.1.1.7 ! root 648: if (blocksize) {
! 649: if (!(status & ATA_CB_STAT_DRQ)) {
! 650: dprintf(6, "send_atapi_cmd : DRQ not set (status %02x)\n", status);
! 651: ret = -3;
! 652: goto fail;
! 653: }
1.1 root 654:
1.1.1.7 ! root 655: ret = ata_pio_transfer(op, 0, blocksize);
! 656: }
1.1 root 657:
658: fail:
659: // Enable interrupts
660: outb(ATA_CB_DC_HD15, iobase2+ATA_CB_DC);
1.1.1.3 root 661: if (ret)
662: return DISK_RET_EBADTRACK;
663: return DISK_RET_SUCCESS;
1.1 root 664: }
665:
1.1.1.2 root 666: // 16bit command demuxer for ATAPI cdroms.
1.1 root 667: int
668: process_atapi_op(struct disk_op_s *op)
669: {
1.1.1.3 root 670: if (!CONFIG_ATA)
671: return 0;
1.1 root 672: switch (op->command) {
673: case CMD_READ:
1.1.1.3 root 674: return cdb_read(op);
1.1 root 675: case CMD_FORMAT:
676: case CMD_WRITE:
677: return DISK_RET_EWRITEPROTECT;
678: default:
679: return process_ata_misc_op(op);
680: }
681: }
682:
683:
684: /****************************************************************
685: * ATA detect and init
686: ****************************************************************/
687:
1.1.1.2 root 688: // Send an identify device or identify device packet command.
689: static int
1.1.1.3 root 690: send_ata_identity(struct atadrive_s *adrive_g, u16 *buffer, int command)
1.1.1.2 root 691: {
692: memset(buffer, 0, DISK_SECTOR_SIZE);
693:
694: struct disk_op_s dop;
695: memset(&dop, 0, sizeof(dop));
1.1.1.3 root 696: dop.drive_g = &adrive_g->drive;
1.1.1.2 root 697: dop.count = 1;
698: dop.lba = 1;
699: dop.buf_fl = MAKE_FLATPTR(GET_SEG(SS), buffer);
700:
701: struct ata_pio_command cmd;
702: memset(&cmd, 0, sizeof(cmd));
703: cmd.command = command;
704:
705: return ata_pio_cmd_data(&dop, 0, &cmd);
706: }
707:
1.1 root 708: // Extract the ATA/ATAPI version info.
1.1.1.5 root 709: int
710: ata_extract_version(u16 *buffer)
1.1 root 711: {
712: // Extract ATA/ATAPI version.
713: u16 ataversion = buffer[80];
714: u8 version;
715: for (version=15; version>0; version--)
716: if (ataversion & (1<<version))
717: break;
718: return version;
719: }
720:
1.1.1.3 root 721: #define MAXMODEL 40
1.1 root 722:
1.1.1.3 root 723: // Extract the ATA/ATAPI model info.
1.1.1.5 root 724: char *
725: ata_extract_model(char *model, u32 size, u16 *buffer)
1.1.1.3 root 726: {
1.1 root 727: // Read model name
728: int i;
1.1.1.5 root 729: for (i=0; i<size/2; i++)
1.1.1.3 root 730: *(u16*)&model[i*2] = ntohs(buffer[27+i]);
1.1.1.5 root 731: model[size] = 0x00;
732: nullTrailingSpace(model);
1.1.1.3 root 733: return model;
1.1 root 734: }
735:
1.1.1.3 root 736: // Common init code between ata and atapi
737: static struct atadrive_s *
738: init_atadrive(struct atadrive_s *dummy, u16 *buffer)
739: {
740: struct atadrive_s *adrive_g = malloc_fseg(sizeof(*adrive_g));
1.1.1.5 root 741: if (!adrive_g) {
1.1.1.3 root 742: warn_noalloc();
743: return NULL;
744: }
745: memset(adrive_g, 0, sizeof(*adrive_g));
746: adrive_g->chan_gf = dummy->chan_gf;
747: adrive_g->slave = dummy->slave;
748: adrive_g->drive.cntl_id = adrive_g->chan_gf->chanid * 2 + dummy->slave;
749: adrive_g->drive.removable = (buffer[0] & 0x80) ? 1 : 0;
750: return adrive_g;
1.1 root 751: }
752:
1.1.1.2 root 753: // Detect if the given drive is an atapi - initialize it if so.
1.1.1.3 root 754: static struct atadrive_s *
755: init_drive_atapi(struct atadrive_s *dummy, u16 *buffer)
1.1 root 756: {
757: // Send an IDENTIFY_DEVICE_PACKET command to device
1.1.1.2 root 758: int ret = send_ata_identity(dummy, buffer, ATA_CMD_IDENTIFY_PACKET_DEVICE);
1.1 root 759: if (ret)
760: return NULL;
761:
762: // Success - setup as ATAPI.
1.1.1.3 root 763: struct atadrive_s *adrive_g = init_atadrive(dummy, buffer);
764: if (!adrive_g)
1.1 root 765: return NULL;
1.1.1.3 root 766: adrive_g->drive.type = DTYPE_ATAPI;
767: adrive_g->drive.blksize = CDROM_SECTOR_SIZE;
768: adrive_g->drive.sectors = (u64)-1;
1.1 root 769: u8 iscd = ((buffer[0] >> 8) & 0x1f) == 0x05;
1.1.1.3 root 770: char model[MAXMODEL+1];
1.1.1.5 root 771: char *desc = znprintf(MAXDESCSIZE
772: , "DVD/CD [ata%d-%d: %s ATAPI-%d %s]"
773: , adrive_g->chan_gf->chanid, adrive_g->slave
774: , ata_extract_model(model, MAXMODEL, buffer)
775: , ata_extract_version(buffer)
776: , (iscd ? "DVD/CD" : "Device"));
777: dprintf(1, "%s\n", desc);
1.1 root 778:
779: // fill cdidmap
1.1.1.5 root 780: if (iscd) {
1.1.1.6 root 781: int prio = bootprio_find_ata_device(adrive_g->chan_gf->pci_tmp,
1.1.1.5 root 782: adrive_g->chan_gf->chanid,
783: adrive_g->slave);
784: boot_add_cd(&adrive_g->drive, desc, prio);
785: }
1.1 root 786:
1.1.1.3 root 787: return adrive_g;
1.1 root 788: }
789:
1.1.1.2 root 790: // Detect if the given drive is a regular ata drive - initialize it if so.
1.1.1.3 root 791: static struct atadrive_s *
792: init_drive_ata(struct atadrive_s *dummy, u16 *buffer)
1.1 root 793: {
794: // Send an IDENTIFY_DEVICE command to device
1.1.1.2 root 795: int ret = send_ata_identity(dummy, buffer, ATA_CMD_IDENTIFY_DEVICE);
1.1 root 796: if (ret)
797: return NULL;
798:
799: // Success - setup as ATA.
1.1.1.3 root 800: struct atadrive_s *adrive_g = init_atadrive(dummy, buffer);
801: if (!adrive_g)
1.1 root 802: return NULL;
1.1.1.3 root 803: adrive_g->drive.type = DTYPE_ATA;
804: adrive_g->drive.blksize = DISK_SECTOR_SIZE;
805:
806: adrive_g->drive.pchs.cylinders = buffer[1];
807: adrive_g->drive.pchs.heads = buffer[3];
808: adrive_g->drive.pchs.spt = buffer[6];
1.1 root 809:
810: u64 sectors;
811: if (buffer[83] & (1 << 10)) // word 83 - lba48 support
812: sectors = *(u64*)&buffer[100]; // word 100-103
813: else
814: sectors = *(u32*)&buffer[60]; // word 60 and word 61
1.1.1.3 root 815: adrive_g->drive.sectors = sectors;
816: u64 adjsize = sectors >> 11;
817: char adjprefix = 'M';
818: if (adjsize >= (1 << 16)) {
819: adjsize >>= 10;
820: adjprefix = 'G';
821: }
822: char model[MAXMODEL+1];
1.1.1.5 root 823: char *desc = znprintf(MAXDESCSIZE
824: , "ata%d-%d: %s ATA-%d Hard-Disk (%u %ciBytes)"
825: , adrive_g->chan_gf->chanid, adrive_g->slave
826: , ata_extract_model(model, MAXMODEL, buffer)
827: , ata_extract_version(buffer)
828: , (u32)adjsize, adjprefix);
829: dprintf(1, "%s\n", desc);
830:
1.1.1.6 root 831: int prio = bootprio_find_ata_device(adrive_g->chan_gf->pci_tmp,
1.1.1.5 root 832: adrive_g->chan_gf->chanid,
833: adrive_g->slave);
1.1 root 834: // Register with bcv system.
1.1.1.5 root 835: boot_add_hd(&adrive_g->drive, desc, prio);
1.1 root 836:
1.1.1.3 root 837: return adrive_g;
1.1 root 838: }
839:
840: static u64 SpinupEnd;
841:
1.1.1.2 root 842: // Wait for non-busy status and check for "floating bus" condition.
1.1 root 843: static int
844: powerup_await_non_bsy(u16 base)
845: {
846: u8 orstatus = 0;
847: u8 status;
848: for (;;) {
849: status = inb(base+ATA_CB_STAT);
850: if (!(status & ATA_CB_STAT_BSY))
851: break;
852: orstatus |= status;
853: if (orstatus == 0xff) {
1.1.1.3 root 854: dprintf(4, "powerup IDE floating\n");
1.1 root 855: return orstatus;
856: }
1.1.1.3 root 857: if (check_tsc(SpinupEnd)) {
858: warn_timeout();
1.1 root 859: return -1;
860: }
861: yield();
862: }
863: dprintf(6, "powerup iobase=%x st=%x\n", base, status);
864: return status;
865: }
866:
1.1.1.2 root 867: // Detect any drives attached to a given controller.
1.1 root 868: static void
869: ata_detect(void *data)
870: {
1.1.1.3 root 871: struct ata_channel_s *chan_gf = data;
872: struct atadrive_s dummy;
1.1 root 873: memset(&dummy, 0, sizeof(dummy));
1.1.1.3 root 874: dummy.chan_gf = chan_gf;
1.1 root 875: // Device detection
1.1.1.3 root 876: int didreset = 0;
877: u8 slave;
878: for (slave=0; slave<=1; slave++) {
1.1 root 879: // Wait for not-bsy.
1.1.1.3 root 880: u16 iobase1 = chan_gf->iobase1;
1.1 root 881: int status = powerup_await_non_bsy(iobase1);
882: if (status < 0)
883: continue;
884: u8 newdh = slave ? ATA_CB_DH_DEV1 : ATA_CB_DH_DEV0;
885: outb(newdh, iobase1+ATA_CB_DH);
886: ndelay(400);
887: status = powerup_await_non_bsy(iobase1);
888: if (status < 0)
889: continue;
890:
891: // Check if ioport registers look valid.
892: outb(newdh, iobase1+ATA_CB_DH);
893: u8 dh = inb(iobase1+ATA_CB_DH);
894: outb(0x55, iobase1+ATA_CB_SC);
895: outb(0xaa, iobase1+ATA_CB_SN);
896: u8 sc = inb(iobase1+ATA_CB_SC);
897: u8 sn = inb(iobase1+ATA_CB_SN);
1.1.1.3 root 898: dprintf(6, "ata_detect ata%d-%d: sc=%x sn=%x dh=%x\n"
899: , chan_gf->chanid, slave, sc, sn, dh);
1.1 root 900: if (sc != 0x55 || sn != 0xaa || dh != newdh)
901: continue;
902:
903: // Prepare new drive.
1.1.1.3 root 904: dummy.slave = slave;
1.1 root 905:
906: // reset the channel
1.1.1.3 root 907: if (!didreset) {
1.1 root 908: ata_reset(&dummy);
1.1.1.3 root 909: didreset = 1;
1.1 root 910: }
911:
912: // check for ATAPI
913: u16 buffer[256];
1.1.1.3 root 914: struct atadrive_s *adrive_g = init_drive_atapi(&dummy, buffer);
915: if (!adrive_g) {
1.1 root 916: // Didn't find an ATAPI drive - look for ATA drive.
917: u8 st = inb(iobase1+ATA_CB_STAT);
918: if (!st)
919: // Status not set - can't be a valid drive.
920: continue;
921:
922: // Wait for RDY.
923: int ret = await_rdy(iobase1);
924: if (ret < 0)
925: continue;
926:
927: // check for ATA.
1.1.1.3 root 928: adrive_g = init_drive_ata(&dummy, buffer);
929: if (!adrive_g)
1.1 root 930: // No ATA drive found
931: continue;
932: }
933:
934: u16 resetresult = buffer[93];
935: dprintf(6, "ata_detect resetresult=%04x\n", resetresult);
936: if (!slave && (resetresult & 0xdf61) == 0x4041)
937: // resetresult looks valid and device 0 is responding to
938: // device 1 requests - device 1 must not be present - skip
939: // detection.
1.1.1.3 root 940: break;
1.1 root 941: }
942: }
943:
1.1.1.2 root 944: // Initialize an ata controller and detect its drives.
1.1 root 945: static void
1.1.1.6 root 946: init_controller(struct pci_device *pci, int irq
947: , u32 port1, u32 port2, u32 master)
1.1 root 948: {
1.1.1.6 root 949: static int chanid = 0;
1.1.1.3 root 950: struct ata_channel_s *chan_gf = malloc_fseg(sizeof(*chan_gf));
951: if (!chan_gf) {
952: warn_noalloc();
953: return;
954: }
1.1.1.6 root 955: chan_gf->chanid = chanid++;
1.1.1.3 root 956: chan_gf->irq = irq;
1.1.1.6 root 957: chan_gf->pci_bdf = pci ? pci->bdf : -1;
958: chan_gf->pci_tmp = pci;
1.1.1.3 root 959: chan_gf->iobase1 = port1;
960: chan_gf->iobase2 = port2;
961: chan_gf->iomaster = master;
1.1.1.2 root 962: dprintf(1, "ATA controller %d at %x/%x/%x (irq %d dev %x)\n"
1.1.1.6 root 963: , chanid, port1, port2, master, irq, chan_gf->pci_bdf);
1.1.1.3 root 964: run_thread(ata_detect, chan_gf);
1.1 root 965: }
966:
967: #define IRQ_ATA1 14
968: #define IRQ_ATA2 15
969:
1.1.1.6 root 970: // Handle controllers on an ATA PCI device.
1.1 root 971: static void
1.1.1.6 root 972: init_pciata(struct pci_device *pci, u8 prog_if)
1.1 root 973: {
1.1.1.6 root 974: pci->have_driver = 1;
975: u16 bdf = pci->bdf;
976: u8 pciirq = pci_config_readb(bdf, PCI_INTERRUPT_LINE);
977: int master = 0;
978: if (CONFIG_ATA_DMA && prog_if & 0x80) {
979: // Check for bus-mastering.
980: u32 bar = pci_config_readl(bdf, PCI_BASE_ADDRESS_4);
981: if (bar & PCI_BASE_ADDRESS_SPACE_IO) {
982: master = bar & PCI_BASE_ADDRESS_IO_MASK;
983: pci_config_maskw(bdf, PCI_COMMAND, 0, PCI_COMMAND_MASTER);
1.1.1.2 root 984: }
1.1.1.6 root 985: }
1.1.1.2 root 986:
1.1.1.6 root 987: u32 port1, port2, irq;
988: if (prog_if & 1) {
989: port1 = (pci_config_readl(bdf, PCI_BASE_ADDRESS_0)
990: & PCI_BASE_ADDRESS_IO_MASK);
991: port2 = (pci_config_readl(bdf, PCI_BASE_ADDRESS_1)
992: & PCI_BASE_ADDRESS_IO_MASK);
993: irq = pciirq;
994: } else {
995: port1 = PORT_ATA1_CMD_BASE;
996: port2 = PORT_ATA1_CTRL_BASE;
997: irq = IRQ_ATA1;
998: }
999: init_controller(pci, irq, port1, port2, master);
1.1 root 1000:
1.1.1.6 root 1001: if (prog_if & 4) {
1002: port1 = (pci_config_readl(bdf, PCI_BASE_ADDRESS_2)
1003: & PCI_BASE_ADDRESS_IO_MASK);
1004: port2 = (pci_config_readl(bdf, PCI_BASE_ADDRESS_3)
1005: & PCI_BASE_ADDRESS_IO_MASK);
1006: irq = pciirq;
1007: } else {
1008: port1 = PORT_ATA2_CMD_BASE;
1009: port2 = PORT_ATA2_CTRL_BASE;
1010: irq = IRQ_ATA2;
1.1 root 1011: }
1.1.1.6 root 1012: init_controller(pci, irq, port1, port2, master ? master + 8 : 0);
1013: }
1014:
1015: static void
1016: found_genericata(struct pci_device *pci, void *arg)
1017: {
1018: init_pciata(pci, pci->prog_if);
1019: }
1.1 root 1020:
1.1.1.6 root 1021: static void
1022: found_compatibleahci(struct pci_device *pci, void *arg)
1023: {
1024: if (CONFIG_AHCI)
1025: // Already handled directly via native ahci interface.
1026: return;
1027: init_pciata(pci, 0x8f);
1028: }
1029:
1030: static const struct pci_device_id pci_ata_tbl[] = {
1031: PCI_DEVICE_CLASS(PCI_ANY_ID, PCI_ANY_ID, PCI_CLASS_STORAGE_IDE
1032: , found_genericata),
1033: PCI_DEVICE(PCI_VENDOR_ID_ATI, 0x4391, found_compatibleahci),
1034: PCI_DEVICE_END,
1035: };
1036:
1037: // Locate and init ata controllers.
1038: static void
1039: ata_init(void)
1040: {
1041: if (!CONFIG_COREBOOT && !PCIDevices) {
1.1 root 1042: // No PCI devices found - probably a QEMU "-M isapc" machine.
1043: // Try using ISA ports for ATA controllers.
1.1.1.6 root 1044: init_controller(NULL, IRQ_ATA1
1.1.1.2 root 1045: , PORT_ATA1_CMD_BASE, PORT_ATA1_CTRL_BASE, 0);
1.1.1.6 root 1046: init_controller(NULL, IRQ_ATA2
1.1.1.2 root 1047: , PORT_ATA2_CMD_BASE, PORT_ATA2_CTRL_BASE, 0);
1.1.1.6 root 1048: return;
1049: }
1050:
1051: // Scan PCI bus for ATA adapters
1052: struct pci_device *pci;
1053: foreachpci(pci) {
1054: pci_init_device(pci_ata_tbl, pci, NULL);
1.1 root 1055: }
1056: }
1057:
1058: void
1.1.1.2 root 1059: ata_setup(void)
1.1 root 1060: {
1.1.1.3 root 1061: ASSERT32FLAT();
1.1 root 1062: if (!CONFIG_ATA)
1063: return;
1064:
1065: dprintf(3, "init hard drives\n");
1066:
1067: SpinupEnd = calc_future_tsc(IDE_TIMEOUT);
1068: ata_init();
1069:
1070: SET_BDA(disk_control_byte, 0xc0);
1071:
1.1.1.4 root 1072: enable_hwirq(14, FUNC16(entry_76));
1.1 root 1073: }
This archive runs on limited infrastructure. Preserving old code on modern bandwidth. Automated agents are requested to crawl responsibly.