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1.1 root 1: #ifndef __ATA_H
2: #define __ATA_H
3:
4: #include "types.h" // u8
5: #include "config.h" // CONFIG_MAX_ATA_INTERFACES
1.1.1.3 root 6: #include "disk.h" // struct drive_s
1.1 root 7:
8: struct ata_channel_s {
9: u16 iobase1;
10: u16 iobase2;
1.1.1.2 root 11: u16 iomaster;
1.1 root 12: u8 irq;
1.1.1.3 root 13: u8 chanid;
1.1 root 14: int pci_bdf;
1.1.1.5 ! root 15: struct pci_device *pci_tmp;
1.1 root 16: };
17:
1.1.1.3 root 18: struct atadrive_s {
19: struct drive_s drive;
20: struct ata_channel_s *chan_gf;
21: u8 slave;
22: };
23:
1.1 root 24: // ata.c
1.1.1.4 root 25: char *ata_extract_model(char *model, u32 size, u16 *buffer);
26: int ata_extract_version(u16 *buffer);
1.1 root 27: int cdrom_read(struct disk_op_s *op);
1.1.1.3 root 28: int atapi_cmd_data(struct disk_op_s *op, void *cdbcmd, u16 blocksize);
1.1.1.2 root 29: void ata_setup(void);
1.1 root 30: int process_ata_op(struct disk_op_s *op);
31: int process_atapi_op(struct disk_op_s *op);
32:
33: // Global defines -- ATA register and register bits.
34: // command block & control block regs
35: #define ATA_CB_DATA 0 // data reg in/out pio_base_addr1+0
36: #define ATA_CB_ERR 1 // error in pio_base_addr1+1
37: #define ATA_CB_FR 1 // feature reg out pio_base_addr1+1
38: #define ATA_CB_SC 2 // sector count in/out pio_base_addr1+2
39: #define ATA_CB_SN 3 // sector number in/out pio_base_addr1+3
40: #define ATA_CB_CL 4 // cylinder low in/out pio_base_addr1+4
41: #define ATA_CB_CH 5 // cylinder high in/out pio_base_addr1+5
42: #define ATA_CB_DH 6 // device head in/out pio_base_addr1+6
43: #define ATA_CB_STAT 7 // primary status in pio_base_addr1+7
44: #define ATA_CB_CMD 7 // command out pio_base_addr1+7
45:
46: #define ATA_CB_ASTAT 2 // alternate status in pio_base_addr2+2
47: #define ATA_CB_DC 2 // device control out pio_base_addr2+2
48: #define ATA_CB_DA 3 // device address in pio_base_addr2+3
49:
50: #define ATA_CB_ER_ICRC 0x80 // ATA Ultra DMA bad CRC
51: #define ATA_CB_ER_BBK 0x80 // ATA bad block
52: #define ATA_CB_ER_UNC 0x40 // ATA uncorrected error
53: #define ATA_CB_ER_MC 0x20 // ATA media change
54: #define ATA_CB_ER_IDNF 0x10 // ATA id not found
55: #define ATA_CB_ER_MCR 0x08 // ATA media change request
56: #define ATA_CB_ER_ABRT 0x04 // ATA command aborted
57: #define ATA_CB_ER_NTK0 0x02 // ATA track 0 not found
58: #define ATA_CB_ER_NDAM 0x01 // ATA address mark not found
59:
60: #define ATA_CB_ER_P_SNSKEY 0xf0 // ATAPI sense key (mask)
61: #define ATA_CB_ER_P_MCR 0x08 // ATAPI Media Change Request
62: #define ATA_CB_ER_P_ABRT 0x04 // ATAPI command abort
63: #define ATA_CB_ER_P_EOM 0x02 // ATAPI End of Media
64: #define ATA_CB_ER_P_ILI 0x01 // ATAPI Illegal Length Indication
65:
66: // ATAPI Interrupt Reason bits in the Sector Count reg (CB_SC)
67: #define ATA_CB_SC_P_TAG 0xf8 // ATAPI tag (mask)
68: #define ATA_CB_SC_P_REL 0x04 // ATAPI release
69: #define ATA_CB_SC_P_IO 0x02 // ATAPI I/O
70: #define ATA_CB_SC_P_CD 0x01 // ATAPI C/D
71:
72: // bits 7-4 of the device/head (CB_DH) reg
73: #define ATA_CB_DH_DEV0 0xa0 // select device 0
74: #define ATA_CB_DH_DEV1 0xb0 // select device 1
75: #define ATA_CB_DH_LBA 0x40 // use LBA
76:
77: // status reg (CB_STAT and CB_ASTAT) bits
78: #define ATA_CB_STAT_BSY 0x80 // busy
79: #define ATA_CB_STAT_RDY 0x40 // ready
80: #define ATA_CB_STAT_DF 0x20 // device fault
81: #define ATA_CB_STAT_WFT 0x20 // write fault (old name)
82: #define ATA_CB_STAT_SKC 0x10 // seek complete
83: #define ATA_CB_STAT_SERV 0x10 // service
84: #define ATA_CB_STAT_DRQ 0x08 // data request
85: #define ATA_CB_STAT_CORR 0x04 // corrected
86: #define ATA_CB_STAT_IDX 0x02 // index
87: #define ATA_CB_STAT_ERR 0x01 // error (ATA)
88: #define ATA_CB_STAT_CHK 0x01 // check (ATAPI)
89:
90: // device control reg (CB_DC) bits
91: #define ATA_CB_DC_HD15 0x08 // bit should always be set to one
92: #define ATA_CB_DC_SRST 0x04 // soft reset
93: #define ATA_CB_DC_NIEN 0x02 // disable interrupts
94:
95: // Most mandtory and optional ATA commands (from ATA-3),
1.1.1.3 root 96: #define ATA_CMD_NOP 0x00
1.1 root 97: #define ATA_CMD_CFA_REQUEST_EXT_ERR_CODE 0x03
98: #define ATA_CMD_DEVICE_RESET 0x08
1.1.1.3 root 99: #define ATA_CMD_RECALIBRATE 0x10
100: #define ATA_CMD_READ_SECTORS 0x20
101: #define ATA_CMD_READ_SECTORS_EXT 0x24
1.1.1.2 root 102: #define ATA_CMD_READ_DMA_EXT 0x25
103: #define ATA_CMD_READ_DMA_QUEUED_EXT 0x26
104: #define ATA_CMD_READ_NATIVE_MAX_ADDRESS_EXT 0x27
1.1.1.3 root 105: #define ATA_CMD_READ_MULTIPLE_EXT 0x29
106: #define ATA_CMD_READ_LOG_EXT 0x2F
107: #define ATA_CMD_WRITE_SECTORS 0x30
108: #define ATA_CMD_WRITE_SECTORS_EXT 0x34
109: #define ATA_CMD_WRITE_DMA_EXT 0x35
110: #define ATA_CMD_WRITE_DMA_QUEUED_EXT 0x36
111: #define ATA_CMD_SET_MAX_ADDRESS_EXT 0x37
112: #define ATA_CMD_CFA_WRITE_SECTORS_WO_ERASE 0x38
113: #define ATA_CMD_WRITE_MULTIPLE_EXT 0x39
114: #define ATA_CMD_WRITE_VERIFY 0x3C
115: #define ATA_CMD_WRITE_LOG_EXT 0x3F
1.1 root 116: #define ATA_CMD_READ_VERIFY_SECTORS 0x40
1.1.1.2 root 117: #define ATA_CMD_READ_VERIFY_SECTORS_EXT 0x42
1.1.1.3 root 118: #define ATA_CMD_FORMAT_TRACK 0x50
1.1 root 119: #define ATA_CMD_SEEK 0x70
1.1.1.3 root 120: #define ATA_CMD_CFA_TRANSLATE_SECTOR 0x87
121: #define ATA_CMD_EXECUTE_DEVICE_DIAGNOSTIC 0x90
122: #define ATA_CMD_INITIALIZE_DEVICE_PARAMETERS 0x91
1.1 root 123: #define ATA_CMD_STANDBY_IMMEDIATE2 0x94
1.1.1.3 root 124: #define ATA_CMD_IDLE_IMMEDIATE2 0x95
125: #define ATA_CMD_STANDBY2 0x96
126: #define ATA_CMD_IDLE2 0x97
127: #define ATA_CMD_CHECK_POWER_MODE2 0x98
128: #define ATA_CMD_SLEEP2 0x99
129: #define ATA_CMD_PACKET 0xA0
130: #define ATA_CMD_IDENTIFY_PACKET_DEVICE 0xA1
131: #define ATA_CMD_CFA_ERASE_SECTORS 0xC0
132: #define ATA_CMD_READ_MULTIPLE 0xC4
133: #define ATA_CMD_WRITE_MULTIPLE 0xC5
134: #define ATA_CMD_SET_MULTIPLE_MODE 0xC6
135: #define ATA_CMD_READ_DMA_QUEUED 0xC7
136: #define ATA_CMD_READ_DMA 0xC8
1.1 root 137: #define ATA_CMD_WRITE_DMA 0xCA
138: #define ATA_CMD_WRITE_DMA_QUEUED 0xCC
1.1.1.3 root 139: #define ATA_CMD_CFA_WRITE_MULTIPLE_WO_ERASE 0xCD
140: #define ATA_CMD_STANDBY_IMMEDIATE 0xE0
141: #define ATA_CMD_IDLE_IMMEDIATE 0xE1
142: #define ATA_CMD_STANDBY 0xE2
143: #define ATA_CMD_IDLE 0xE3
144: #define ATA_CMD_READ_BUFFER 0xE4
145: #define ATA_CMD_CHECK_POWER_MODE 0xE5
146: #define ATA_CMD_SLEEP 0xE6
147: #define ATA_CMD_FLUSH_CACHE 0xE7
148: #define ATA_CMD_WRITE_BUFFER 0xE8
149: #define ATA_CMD_IDENTIFY_DEVICE 0xEC
150: #define ATA_CMD_SET_FEATURES 0xEF
151: #define ATA_CMD_READ_NATIVE_MAX_ADDRESS 0xF8
152: #define ATA_CMD_SET_MAX 0xF9
1.1 root 153:
154: #endif // ata.h
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