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1.1 root 1: #ifndef __CONFIG_H
2: #define __CONFIG_H
3:
4: // Configuration definitions.
5:
6: //#define CONFIG_APPNAME "QEMU"
7: //#define CONFIG_CPUNAME8 "QEMUCPU "
8: //#define CONFIG_APPNAME6 "QEMU "
9: //#define CONFIG_APPNAME4 "QEMU"
10: #define CONFIG_APPNAME "Bochs"
11: #define CONFIG_CPUNAME8 "BOCHSCPU"
12: #define CONFIG_APPNAME6 "BOCHS "
13: #define CONFIG_APPNAME4 "BXPC"
14:
15: // Configure as a coreboot payload.
16: #define CONFIG_COREBOOT 0
17:
18: // Control how verbose debug output is.
19: #define CONFIG_DEBUG_LEVEL 1
20: // Send debugging information to serial port
21: #define CONFIG_DEBUG_SERIAL 0
22: // Screen writes are also sent to debug ports.
23: #define CONFIG_SCREEN_AND_DEBUG 1
24:
25: // Support running hardware initialization in parallel
26: #define CONFIG_THREADS 1
27: // Allow hardware init to run in parallel with optionrom execution
28: #define CONFIG_THREAD_OPTIONROMS 0
29: // Support int13 disk/floppy drive functions
30: #define CONFIG_DRIVES 1
31: // Support floppy drive access
32: #define CONFIG_FLOPPY 1
33: // Support USB devices
34: #define CONFIG_USB 1
35: // Support USB UHCI controllers
36: #define CONFIG_USB_UHCI 1
37: // Support USB OHCI controllers
38: #define CONFIG_USB_OHCI 1
39: // Support USB keyboards
40: #define CONFIG_USB_KEYBOARD 1
41: // Support PS2 ports (keyboard and mouse)
42: #define CONFIG_PS2PORT 1
43: // Support for IDE disk code
44: #define CONFIG_ATA 1
45: // Use 32bit PIO accesses on ATA (minor optimization on PCI transfers)
46: #define CONFIG_ATA_PIO32 0
47: // Support for booting from a CD
48: #define CONFIG_CDROM_BOOT 1
49: // Support for emulating a boot CD as a floppy/harddrive
50: #define CONFIG_CDROM_EMU 1
51: // Support int 1a/b1 PCI BIOS calls
52: #define CONFIG_PCIBIOS 1
53: // Support int 15/53 APM BIOS calls
54: #define CONFIG_APMBIOS 1
55: // Support PnP BIOS entry point.
56: #define CONFIG_PNPBIOS 1
57: // Support Post Memory Manager (PMM) entry point.
58: #define CONFIG_PMM 1
59: // Support int 19/18 system bootup support
60: #define CONFIG_BOOT 1
61: // Support an interactive boot menu at end of post.
62: #define CONFIG_BOOTMENU 1
63: // Amount of time (in ms) to wait at menu before selecting normal boot.
64: #define CONFIG_BOOTMENU_WAIT 2500
65: // Support int 14 serial port calls
66: #define CONFIG_SERIAL 1
67: // Support int 17 parallel port calls
68: #define CONFIG_LPT 1
69: // Support int 16 keyboard calls
70: #define CONFIG_KEYBOARD 1
71: // Support calling int155f on each keyboard event
72: #define CONFIG_KBD_CALL_INT15_4F 1
73: // Disable A20 on 16bit boot
74: #define CONFIG_DISABLE_A20 0
75: // Support for int15c2 mouse calls
76: #define CONFIG_MOUSE 1
77: // If the target machine has multiple independent root buses, the
78: // extra buses may be specified here.
79: #define CONFIG_PCI_ROOT1 0x00
80: #define CONFIG_PCI_ROOT2 0x00
81: // Support searching coreboot flash format.
82: #define CONFIG_COREBOOT_FLASH 0
83: // Support floppy images in the coreboot flash.
84: #define CONFIG_FLASH_FLOPPY 1
85: // Support the lzma decompression algorighm.
86: #define CONFIG_LZMA 1
87: // Support finding and running option roms during post.
88: #define CONFIG_OPTIONROMS 1
89: // Set if option roms are already copied to 0xc0000-0xf0000
90: #define CONFIG_OPTIONROMS_DEPLOYED 0
91: // When option roms are not pre-deployed, SeaBIOS can copy an optionrom
92: // from flash for up to 2 devices.
93: #define OPTIONROM_VENDEV_1 0x00000000
94: #define OPTIONROM_MEM_1 0x00000000
95: #define OPTIONROM_VENDEV_2 0x00000000
96: #define OPTIONROM_MEM_2 0x00000000
97:
98: // Support generation of a PIR table in 0xf000 segment (for emulators)
99: #define CONFIG_PIRTABLE 1
100: // Support generation of MPTable (for emulators)
101: #define CONFIG_MPTABLE 1
102: // Support generation of SM BIOS tables (for emulators)
103: #define CONFIG_SMBIOS 1
104: // Support finding a UUID (for smbios) via "magic" outl sequence.
105: #define CONFIG_UUID_BACKDOOR 1
106: // Support generation of ACPI tables (for emulators)
107: #define CONFIG_ACPI 1
108: // Support bios callbacks specific to via vgabios.
109: #define CONFIG_VGAHOOKS 0
110: // Support S3 resume handler.
111: #define CONFIG_S3_RESUME 1
112: // Run the vga rom during S3 resume.
113: #define CONFIG_S3_RESUME_VGA_INIT 0
114: // define it if the (emulated) hardware supports SMM mode
115: #define CONFIG_USE_SMM 1
116: // Maximum number of map entries in the e820 map
117: #define CONFIG_MAX_E820 32
118: // Space to reserve in f-segment for run-time built bios tables.
119: #define CONFIG_MAX_BIOSTABLE 2048
120: // Space to reserve in high-memory for tables
121: #define CONFIG_MAX_HIGHTABLE (64*1024)
122:
123: // Maximum number of ATA controllers to support
124: #define CONFIG_MAX_ATA_INTERFACES 4
125: // Maximum number of internal drives supported
126: #define CONFIG_MAX_DRIVES 8
127: // Largest supported externaly facing drive id
128: #define CONFIG_MAX_EXTDRIVE 16
129:
130: #define CONFIG_MODEL_ID 0xFC
131: #define CONFIG_SUBMODEL_ID 0x00
132: #define CONFIG_BIOS_REVISION 0x01
133:
134: // Various memory addresses used by the code.
135: #define BUILD_STACK_ADDR 0x7000
136: #define BUILD_S3RESUME_STACK_ADDR 0x1000
137: #define BUILD_AP_BOOT_ADDR 0x10000
138: #define BUILD_EBDA_MINIMUM 0x90000
139: #define BUILD_LOWRAM_END 0xa0000
140: #define BUILD_ROM_START 0xc0000
141: #define BUILD_BIOS_ADDR 0xf0000
142: #define BUILD_BIOS_SIZE 0x10000
143: // 32KB for shadow ram copying (works around emulator deficiencies)
144: #define BUILD_BIOS_TMP_ADDR 0x30000
1.1.1.2 ! root 145: #define BUILD_MAX_HIGHMEM 0xe0000000
1.1 root 146:
147: #define BUILD_APIC_ADDR 0xfee00000
148: #define BUILD_IOAPIC_ADDR 0xfec00000
149:
150: #define BUILD_SMM_INIT_ADDR 0x38000
151: #define BUILD_SMM_ADDR 0xa8000
152: #define BUILD_SMM_SIZE 0x8000
153:
154: // Important real-mode segments
155: #define SEG_IVT 0x0000
156: #define SEG_BDA 0x0040
157: #define SEG_BIOS 0xf000
158:
159: // Segment definitions in protected mode (see rombios32_gdt in misc.c)
160: #define SEG32_MODE32_CS (1 << 3)
161: #define SEG32_MODE32_DS (2 << 3)
162: #define SEG32_MODE16_CS (3 << 3)
163: #define SEG32_MODE16_DS (4 << 3)
164: #define SEG32_MODE16BIG_CS (5 << 3)
165: #define SEG32_MODE16BIG_DS (6 << 3)
166:
167: // Debugging levels. If non-zero and CONFIG_DEBUG_LEVEL is greater
168: // than the specified value, then the corresponding irq handler will
169: // report every enter event.
170: #define DEBUG_ISR_02 1
171: #define DEBUG_HDL_05 1
172: #define DEBUG_ISR_08 20
173: #define DEBUG_ISR_09 9
174: #define DEBUG_ISR_0e 9
175: #define DEBUG_HDL_10 20
176: #define DEBUG_HDL_11 2
177: #define DEBUG_HDL_12 2
178: #define DEBUG_HDL_13 10
179: #define DEBUG_HDL_14 2
180: #define DEBUG_HDL_15 9
181: #define DEBUG_HDL_16 9
182: #define DEBUG_HDL_17 2
183: #define DEBUG_HDL_18 1
184: #define DEBUG_HDL_19 1
185: #define DEBUG_HDL_1a 9
186: #define DEBUG_HDL_40 1
187: #define DEBUG_ISR_70 9
188: #define DEBUG_ISR_74 9
189: #define DEBUG_ISR_75 1
190: #define DEBUG_ISR_76 10
191: #define DEBUG_ISR_hwpic1 5
192: #define DEBUG_ISR_hwpic2 5
193: #define DEBUG_HDL_pnp 1
194: #define DEBUG_HDL_pmm 1
1.1.1.2 ! root 195: #define DEBUG_HDL_pcibios32 9
! 196: #define DEBUG_HDL_apm 9
1.1 root 197:
198: #define DEBUG_unimplemented 2
199: #define DEBUG_invalid 3
200: #define DEBUG_thread 2
201:
202: #endif // config.h
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