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1.1 root 1: #ifndef __CONFIG_H
2: #define __CONFIG_H
3:
4: // Configuration definitions.
5:
6: //#define CONFIG_APPNAME "QEMU"
7: //#define CONFIG_CPUNAME8 "QEMUCPU "
8: //#define CONFIG_APPNAME6 "QEMU "
9: //#define CONFIG_APPNAME4 "QEMU"
10: #define CONFIG_APPNAME "Bochs"
11: #define CONFIG_CPUNAME8 "BOCHSCPU"
12: #define CONFIG_APPNAME6 "BOCHS "
13: #define CONFIG_APPNAME4 "BXPC"
14:
15: // Configure as a coreboot payload.
16: #define CONFIG_COREBOOT 0
17:
18: // Control how verbose debug output is.
19: #define CONFIG_DEBUG_LEVEL 1
20: // Send debugging information to serial port
21: #define CONFIG_DEBUG_SERIAL 0
22: // Screen writes are also sent to debug ports.
23: #define CONFIG_SCREEN_AND_DEBUG 1
24:
25: // Support running hardware initialization in parallel
26: #define CONFIG_THREADS 1
27: // Allow hardware init to run in parallel with optionrom execution
28: #define CONFIG_THREAD_OPTIONROMS 0
29: // Support int13 disk/floppy drive functions
30: #define CONFIG_DRIVES 1
31: // Support floppy drive access
32: #define CONFIG_FLOPPY 1
33: // Support USB devices
34: #define CONFIG_USB 1
35: // Support USB UHCI controllers
36: #define CONFIG_USB_UHCI 1
37: // Support USB OHCI controllers
38: #define CONFIG_USB_OHCI 1
1.1.1.4 root 39: // Support USB EHCI controllers
40: #define CONFIG_USB_EHCI 1
41: // Support USB disks
42: #define CONFIG_USB_MSC 1
43: // Support USB hubs
44: #define CONFIG_USB_HUB 1
1.1 root 45: // Support USB keyboards
46: #define CONFIG_USB_KEYBOARD 1
1.1.1.4 root 47: // Support USB mice
48: #define CONFIG_USB_MOUSE 1
1.1 root 49: // Support PS2 ports (keyboard and mouse)
50: #define CONFIG_PS2PORT 1
51: // Support for IDE disk code
52: #define CONFIG_ATA 1
1.1.1.4 root 53: // Detect and try to use ATA bus mastering DMA controllers.
54: #define CONFIG_ATA_DMA 0
1.1 root 55: // Use 32bit PIO accesses on ATA (minor optimization on PCI transfers)
56: #define CONFIG_ATA_PIO32 0
57: // Support for booting from a CD
58: #define CONFIG_CDROM_BOOT 1
59: // Support for emulating a boot CD as a floppy/harddrive
60: #define CONFIG_CDROM_EMU 1
61: // Support int 1a/b1 PCI BIOS calls
62: #define CONFIG_PCIBIOS 1
63: // Support int 15/53 APM BIOS calls
64: #define CONFIG_APMBIOS 1
65: // Support PnP BIOS entry point.
66: #define CONFIG_PNPBIOS 1
67: // Support Post Memory Manager (PMM) entry point.
68: #define CONFIG_PMM 1
69: // Support int 19/18 system bootup support
70: #define CONFIG_BOOT 1
71: // Support an interactive boot menu at end of post.
72: #define CONFIG_BOOTMENU 1
73: // Amount of time (in ms) to wait at menu before selecting normal boot.
74: #define CONFIG_BOOTMENU_WAIT 2500
75: // Support int 14 serial port calls
76: #define CONFIG_SERIAL 1
77: // Support int 17 parallel port calls
78: #define CONFIG_LPT 1
79: // Support int 16 keyboard calls
80: #define CONFIG_KEYBOARD 1
81: // Support calling int155f on each keyboard event
82: #define CONFIG_KBD_CALL_INT15_4F 1
83: // Disable A20 on 16bit boot
84: #define CONFIG_DISABLE_A20 0
85: // Support for int15c2 mouse calls
86: #define CONFIG_MOUSE 1
87: // If the target machine has multiple independent root buses, the
88: // extra buses may be specified here.
89: #define CONFIG_PCI_ROOT1 0x00
90: #define CONFIG_PCI_ROOT2 0x00
91: // Support searching coreboot flash format.
1.1.1.4 root 92: #define CONFIG_COREBOOT_FLASH 1
1.1 root 93: // Support floppy images in the coreboot flash.
94: #define CONFIG_FLASH_FLOPPY 1
95: // Support the lzma decompression algorighm.
96: #define CONFIG_LZMA 1
97: // Support finding and running option roms during post.
98: #define CONFIG_OPTIONROMS 1
99: // Set if option roms are already copied to 0xc0000-0xf0000
100: #define CONFIG_OPTIONROMS_DEPLOYED 0
101: // When option roms are not pre-deployed, SeaBIOS can copy an optionrom
102: // from flash for up to 2 devices.
103: #define OPTIONROM_VENDEV_1 0x00000000
104: #define OPTIONROM_MEM_1 0x00000000
105: #define OPTIONROM_VENDEV_2 0x00000000
106: #define OPTIONROM_MEM_2 0x00000000
107:
108: // Support generation of a PIR table in 0xf000 segment (for emulators)
109: #define CONFIG_PIRTABLE 1
110: // Support generation of MPTable (for emulators)
111: #define CONFIG_MPTABLE 1
112: // Support generation of SM BIOS tables (for emulators)
113: #define CONFIG_SMBIOS 1
114: // Support finding a UUID (for smbios) via "magic" outl sequence.
115: #define CONFIG_UUID_BACKDOOR 1
116: // Support generation of ACPI tables (for emulators)
117: #define CONFIG_ACPI 1
118: // Support bios callbacks specific to via vgabios.
119: #define CONFIG_VGAHOOKS 0
120: // Support S3 resume handler.
121: #define CONFIG_S3_RESUME 1
122: // Run the vga rom during S3 resume.
123: #define CONFIG_S3_RESUME_VGA_INIT 0
1.1.1.4 root 124: // Support boot splash
1.1.1.5 ! root 125: #define CONFIG_BOOTSPLASH 1
1.1 root 126: // define it if the (emulated) hardware supports SMM mode
127: #define CONFIG_USE_SMM 1
128: // Maximum number of map entries in the e820 map
129: #define CONFIG_MAX_E820 32
1.1.1.4 root 130: // Space to reserve in f-segment for dynamic allocations
1.1 root 131: #define CONFIG_MAX_BIOSTABLE 2048
132: // Space to reserve in high-memory for tables
133: #define CONFIG_MAX_HIGHTABLE (64*1024)
134: // Largest supported externaly facing drive id
135: #define CONFIG_MAX_EXTDRIVE 16
136:
137: #define CONFIG_MODEL_ID 0xFC
138: #define CONFIG_SUBMODEL_ID 0x00
139: #define CONFIG_BIOS_REVISION 0x01
140:
1.1.1.4 root 141: // Support boot from virtio storage
142: #define CONFIG_VIRTIO_BLK 1
143:
1.1 root 144: // Various memory addresses used by the code.
145: #define BUILD_STACK_ADDR 0x7000
146: #define BUILD_S3RESUME_STACK_ADDR 0x1000
147: #define BUILD_AP_BOOT_ADDR 0x10000
148: #define BUILD_EBDA_MINIMUM 0x90000
149: #define BUILD_LOWRAM_END 0xa0000
150: #define BUILD_ROM_START 0xc0000
151: #define BUILD_BIOS_ADDR 0xf0000
152: #define BUILD_BIOS_SIZE 0x10000
153: // 32KB for shadow ram copying (works around emulator deficiencies)
154: #define BUILD_BIOS_TMP_ADDR 0x30000
1.1.1.2 root 155: #define BUILD_MAX_HIGHMEM 0xe0000000
1.1.1.4 root 156:
157: // Support old pci mem assignment behaviour
158: //#define CONFIG_OLD_PCIMEM_ASSIGNMENT 1
159: #if CONFIG_OLD_PCIMEM_ASSIGNMENT
160: #define BUILD_PCIMEM_START 0xf0000000
161: #define BUILD_PCIMEM_SIZE (BUILD_PCIMEM_END - BUILD_PCIMEM_START)
162: #define BUILD_PCIMEM_END 0xfec00000 /* IOAPIC is mapped at */
163: #define BUILD_PCIPREFMEM_START 0
164: #define BUILD_PCIPREFMEM_SIZE 0
165: #define BUILD_PCIPREFMEM_END 0
166: #else
1.1.1.3 root 167: #define BUILD_PCIMEM_START 0xf0000000
1.1.1.4 root 168: #define BUILD_PCIMEM_SIZE 0x08000000 /* half- of pci window */
169: #define BUILD_PCIMEM_END (BUILD_PCIMEM_START + BUILD_PCIMEM_SIZE)
170: #define BUILD_PCIPREFMEM_START BUILD_PCIMEM_END
171: #define BUILD_PCIPREFMEM_SIZE (BUILD_PCIPREFMEM_END - BUILD_PCIPREFMEM_START)
172: #define BUILD_PCIPREFMEM_END 0xfec00000 /* IOAPIC is mapped at */
173: #endif
1.1 root 174:
175: #define BUILD_APIC_ADDR 0xfee00000
176: #define BUILD_IOAPIC_ADDR 0xfec00000
177:
178: #define BUILD_SMM_INIT_ADDR 0x38000
179: #define BUILD_SMM_ADDR 0xa8000
180: #define BUILD_SMM_SIZE 0x8000
181:
182: // Important real-mode segments
183: #define SEG_IVT 0x0000
184: #define SEG_BDA 0x0040
185: #define SEG_BIOS 0xf000
186:
187: // Segment definitions in protected mode (see rombios32_gdt in misc.c)
188: #define SEG32_MODE32_CS (1 << 3)
189: #define SEG32_MODE32_DS (2 << 3)
190: #define SEG32_MODE16_CS (3 << 3)
191: #define SEG32_MODE16_DS (4 << 3)
192: #define SEG32_MODE16BIG_CS (5 << 3)
193: #define SEG32_MODE16BIG_DS (6 << 3)
194:
195: // Debugging levels. If non-zero and CONFIG_DEBUG_LEVEL is greater
196: // than the specified value, then the corresponding irq handler will
197: // report every enter event.
198: #define DEBUG_ISR_02 1
199: #define DEBUG_HDL_05 1
200: #define DEBUG_ISR_08 20
201: #define DEBUG_ISR_09 9
202: #define DEBUG_ISR_0e 9
203: #define DEBUG_HDL_10 20
204: #define DEBUG_HDL_11 2
205: #define DEBUG_HDL_12 2
206: #define DEBUG_HDL_13 10
207: #define DEBUG_HDL_14 2
208: #define DEBUG_HDL_15 9
209: #define DEBUG_HDL_16 9
210: #define DEBUG_HDL_17 2
211: #define DEBUG_HDL_18 1
212: #define DEBUG_HDL_19 1
213: #define DEBUG_HDL_1a 9
214: #define DEBUG_HDL_40 1
215: #define DEBUG_ISR_70 9
216: #define DEBUG_ISR_74 9
217: #define DEBUG_ISR_75 1
218: #define DEBUG_ISR_76 10
219: #define DEBUG_ISR_hwpic1 5
220: #define DEBUG_ISR_hwpic2 5
221: #define DEBUG_HDL_pnp 1
222: #define DEBUG_HDL_pmm 1
1.1.1.2 root 223: #define DEBUG_HDL_pcibios32 9
224: #define DEBUG_HDL_apm 9
1.1 root 225:
226: #define DEBUG_unimplemented 2
227: #define DEBUG_invalid 3
228: #define DEBUG_thread 2
229:
230: #endif // config.h
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