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1.1 root 1: #ifndef __CONFIG_H
2: #define __CONFIG_H
3:
1.1.1.6 ! root 4: #include "autoconf.h"
! 5:
1.1 root 6: // Configuration definitions.
7:
8: //#define CONFIG_APPNAME "QEMU"
9: //#define CONFIG_CPUNAME8 "QEMUCPU "
10: //#define CONFIG_APPNAME6 "QEMU "
11: //#define CONFIG_APPNAME4 "QEMU"
12: #define CONFIG_APPNAME "Bochs"
13: #define CONFIG_CPUNAME8 "BOCHSCPU"
14: #define CONFIG_APPNAME6 "BOCHS "
15: #define CONFIG_APPNAME4 "BXPC"
16:
17: // When option roms are not pre-deployed, SeaBIOS can copy an optionrom
18: // from flash for up to 2 devices.
19: #define OPTIONROM_VENDEV_1 0x00000000
20: #define OPTIONROM_MEM_1 0x00000000
21: #define OPTIONROM_VENDEV_2 0x00000000
22: #define OPTIONROM_MEM_2 0x00000000
23:
24: // Maximum number of map entries in the e820 map
25: #define CONFIG_MAX_E820 32
1.1.1.4 root 26: // Space to reserve in f-segment for dynamic allocations
1.1 root 27: #define CONFIG_MAX_BIOSTABLE 2048
28: // Space to reserve in high-memory for tables
29: #define CONFIG_MAX_HIGHTABLE (64*1024)
30: // Largest supported externaly facing drive id
31: #define CONFIG_MAX_EXTDRIVE 16
32:
33: #define CONFIG_MODEL_ID 0xFC
34: #define CONFIG_SUBMODEL_ID 0x00
35: #define CONFIG_BIOS_REVISION 0x01
36:
37: // Various memory addresses used by the code.
38: #define BUILD_STACK_ADDR 0x7000
39: #define BUILD_S3RESUME_STACK_ADDR 0x1000
40: #define BUILD_AP_BOOT_ADDR 0x10000
41: #define BUILD_EBDA_MINIMUM 0x90000
42: #define BUILD_LOWRAM_END 0xa0000
43: #define BUILD_ROM_START 0xc0000
44: #define BUILD_BIOS_ADDR 0xf0000
45: #define BUILD_BIOS_SIZE 0x10000
46: // 32KB for shadow ram copying (works around emulator deficiencies)
47: #define BUILD_BIOS_TMP_ADDR 0x30000
1.1.1.2 root 48: #define BUILD_MAX_HIGHMEM 0xe0000000
1.1.1.4 root 49:
50: // Support old pci mem assignment behaviour
51: //#define CONFIG_OLD_PCIMEM_ASSIGNMENT 1
52: #if CONFIG_OLD_PCIMEM_ASSIGNMENT
53: #define BUILD_PCIMEM_START 0xf0000000
54: #define BUILD_PCIMEM_SIZE (BUILD_PCIMEM_END - BUILD_PCIMEM_START)
55: #define BUILD_PCIMEM_END 0xfec00000 /* IOAPIC is mapped at */
56: #define BUILD_PCIPREFMEM_START 0
57: #define BUILD_PCIPREFMEM_SIZE 0
58: #define BUILD_PCIPREFMEM_END 0
59: #else
1.1.1.3 root 60: #define BUILD_PCIMEM_START 0xf0000000
1.1.1.4 root 61: #define BUILD_PCIMEM_SIZE 0x08000000 /* half- of pci window */
62: #define BUILD_PCIMEM_END (BUILD_PCIMEM_START + BUILD_PCIMEM_SIZE)
63: #define BUILD_PCIPREFMEM_START BUILD_PCIMEM_END
64: #define BUILD_PCIPREFMEM_SIZE (BUILD_PCIPREFMEM_END - BUILD_PCIPREFMEM_START)
65: #define BUILD_PCIPREFMEM_END 0xfec00000 /* IOAPIC is mapped at */
66: #endif
1.1 root 67:
68: #define BUILD_APIC_ADDR 0xfee00000
69: #define BUILD_IOAPIC_ADDR 0xfec00000
70:
71: #define BUILD_SMM_INIT_ADDR 0x38000
72: #define BUILD_SMM_ADDR 0xa8000
73: #define BUILD_SMM_SIZE 0x8000
74:
75: // Important real-mode segments
76: #define SEG_IVT 0x0000
77: #define SEG_BDA 0x0040
78: #define SEG_BIOS 0xf000
79:
80: // Segment definitions in protected mode (see rombios32_gdt in misc.c)
81: #define SEG32_MODE32_CS (1 << 3)
82: #define SEG32_MODE32_DS (2 << 3)
83: #define SEG32_MODE16_CS (3 << 3)
84: #define SEG32_MODE16_DS (4 << 3)
85: #define SEG32_MODE16BIG_CS (5 << 3)
86: #define SEG32_MODE16BIG_DS (6 << 3)
87:
88: // Debugging levels. If non-zero and CONFIG_DEBUG_LEVEL is greater
89: // than the specified value, then the corresponding irq handler will
90: // report every enter event.
91: #define DEBUG_ISR_02 1
92: #define DEBUG_HDL_05 1
93: #define DEBUG_ISR_08 20
94: #define DEBUG_ISR_09 9
95: #define DEBUG_ISR_0e 9
96: #define DEBUG_HDL_10 20
97: #define DEBUG_HDL_11 2
98: #define DEBUG_HDL_12 2
99: #define DEBUG_HDL_13 10
100: #define DEBUG_HDL_14 2
101: #define DEBUG_HDL_15 9
102: #define DEBUG_HDL_16 9
103: #define DEBUG_HDL_17 2
104: #define DEBUG_HDL_18 1
105: #define DEBUG_HDL_19 1
106: #define DEBUG_HDL_1a 9
107: #define DEBUG_HDL_40 1
108: #define DEBUG_ISR_70 9
109: #define DEBUG_ISR_74 9
110: #define DEBUG_ISR_75 1
111: #define DEBUG_ISR_76 10
112: #define DEBUG_ISR_hwpic1 5
113: #define DEBUG_ISR_hwpic2 5
114: #define DEBUG_HDL_pnp 1
115: #define DEBUG_HDL_pmm 1
1.1.1.2 root 116: #define DEBUG_HDL_pcibios32 9
117: #define DEBUG_HDL_apm 9
1.1 root 118:
119: #define DEBUG_unimplemented 2
120: #define DEBUG_invalid 3
121: #define DEBUG_thread 2
122:
123: #endif // config.h
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