--- qemu/roms/seabios/src/pci.c	2018/04/24 19:24:11	1.1.1.6
+++ qemu/roms/seabios/src/pci.c	2018/04/24 19:43:53	1.1.1.7
@@ -88,9 +88,21 @@ pci_next(int bdf, int bus)
 struct pci_device *PCIDevices;
 int MaxPCIBus VAR16VISIBLE;
 
+// Check if PCI is available at all
+int
+pci_probe_host(void)
+{
+    outl(0x80000000, PORT_PCI_CMD);
+    if (inl(PORT_PCI_CMD) != 0x80000000) {
+        dprintf(1, "Detected non-PCI system\n");
+        return -1;
+    }
+    return 0;
+}
+
 // Find all PCI devices and populate PCIDevices linked list.
 void
-pci_probe(void)
+pci_probe_devices(void)
 {
     dprintf(3, "PCI probe\n");
     struct pci_device *busdevs[256];
@@ -223,14 +235,14 @@ pci_reboot(void)
 u32 VISIBLE32FLAT
 pci_readl_32(u32 addr)
 {
-    dprintf(3, "32: pci read : %x\n", addr);
+    dprintf(9, "32: pci read : %x\n", addr);
     return readl((void*)addr);
 }
 
 u32 pci_readl(u32 addr)
 {
     if (MODESEGMENT) {
-        dprintf(3, "16: pci read : %x\n", addr);
+        dprintf(9, "16: pci read : %x\n", addr);
         extern void _cfunc32flat_pci_readl_32(u32 addr);
         return call32(_cfunc32flat_pci_readl_32, addr, -1);
     } else {
@@ -246,7 +258,7 @@ struct reg32 {
 void VISIBLE32FLAT
 pci_writel_32(struct reg32 *reg32)
 {
-    dprintf(3, "32: pci write: %x, %x (%p)\n", reg32->addr, reg32->data, reg32);
+    dprintf(9, "32: pci write: %x, %x (%p)\n", reg32->addr, reg32->data, reg32);
     writel((void*)(reg32->addr), reg32->data);
 }
 
@@ -254,7 +266,7 @@ void pci_writel(u32 addr, u32 val)
 {
     struct reg32 reg32 = { .addr = addr, .data = val };
     if (MODESEGMENT) {
-        dprintf(3, "16: pci write: %x, %x (%x:%p)\n",
+        dprintf(9, "16: pci write: %x, %x (%x:%p)\n",
                 reg32.addr, reg32.data, GET_SEG(SS), &reg32);
         void *flatptr = MAKE_FLATPTR(GET_SEG(SS), &reg32);
         extern void _cfunc32flat_pci_writel_32(struct reg32 *reg32);