--- qemu/roms/seabios/src/post.c	2018/04/24 17:52:08	1.1.1.2
+++ qemu/roms/seabios/src/post.c	2018/04/24 18:36:51	1.1.1.4
@@ -1,6 +1,6 @@
 // 32bit code to Power On Self Test (POST) a machine.
 //
-// Copyright (C) 2008,2009  Kevin O'Connor <kevin@koconnor.net>
+// Copyright (C) 2008-2010  Kevin O'Connor <kevin@koconnor.net>
 // Copyright (C) 2002  MandrakeSoft S.A.
 //
 // This file may be distributed under the terms of the GNU LGPLv3 license.
@@ -23,17 +23,7 @@
 #include "smbios.h" // smbios_init
 #include "paravirt.h" // qemu_cfg_port_probe
 #include "ps2port.h" // ps2port_setup
-
-void
-__set_irq(int vector, void *loc)
-{
-    SET_IVT(vector, SEGOFF(SEG_BIOS, (u32)loc - BUILD_BIOS_ADDR));
-}
-
-#define set_irq(vector, func) do {              \
-        extern void func (void);                \
-        __set_irq(vector, func);                \
-    } while (0)
+#include "virtio-blk.h" // virtio_blk_setup
 
 static void
 init_ivt(void)
@@ -43,28 +33,28 @@ init_ivt(void)
     // Initialize all vectors to the default handler.
     int i;
     for (i=0; i<256; i++)
-        set_irq(i, entry_iret_official);
+        SET_IVT(i, FUNC16(entry_iret_official));
 
     // Initialize all hw vectors to a default hw handler.
     for (i=0x08; i<=0x0f; i++)
-        set_irq(i, entry_hwpic1);
+        SET_IVT(i, FUNC16(entry_hwpic1));
     for (i=0x70; i<=0x77; i++)
-        set_irq(i, entry_hwpic2);
+        SET_IVT(i, FUNC16(entry_hwpic2));
 
     // Initialize software handlers.
-    set_irq(0x02, entry_02);
-    set_irq(0x10, entry_10);
-    set_irq(0x11, entry_11);
-    set_irq(0x12, entry_12);
-    set_irq(0x13, entry_13_official);
-    set_irq(0x14, entry_14);
-    set_irq(0x15, entry_15);
-    set_irq(0x16, entry_16);
-    set_irq(0x17, entry_17);
-    set_irq(0x18, entry_18);
-    set_irq(0x19, entry_19_official);
-    set_irq(0x1a, entry_1a);
-    set_irq(0x40, entry_40);
+    SET_IVT(0x02, FUNC16(entry_02));
+    SET_IVT(0x10, FUNC16(entry_10));
+    SET_IVT(0x11, FUNC16(entry_11));
+    SET_IVT(0x12, FUNC16(entry_12));
+    SET_IVT(0x13, FUNC16(entry_13_official));
+    SET_IVT(0x14, FUNC16(entry_14));
+    SET_IVT(0x15, FUNC16(entry_15));
+    SET_IVT(0x16, FUNC16(entry_16));
+    SET_IVT(0x17, FUNC16(entry_17));
+    SET_IVT(0x18, FUNC16(entry_18));
+    SET_IVT(0x19, FUNC16(entry_19_official));
+    SET_IVT(0x1a, FUNC16(entry_1a));
+    SET_IVT(0x40, FUNC16(entry_40));
 
     // INT 60h-66h reserved for user interrupt
     for (i=0x60; i<=0x66; i++)
@@ -74,7 +64,7 @@ init_ivt(void)
     // this is used by 'gardian angel' protection system
     SET_IVT(0x79, SEGOFF(0, 0));
 
-    __set_irq(0x1E, &diskette_param_table2);
+    SET_IVT(0x1E, SEGOFF(SEG_BIOS, (u32)&diskette_param_table2 - BUILD_BIOS_ADDR));
 }
 
 static void
@@ -135,10 +125,21 @@ ram_probe(void)
              , E820_RESERVED);
     add_e820(BUILD_BIOS_ADDR, BUILD_BIOS_SIZE, E820_RESERVED);
 
-    if (kvm_para_available())
+    u32 count = qemu_cfg_e820_entries();
+    if (count) {
+        struct e820_reservation entry;
+        int i;
+
+        for (i = 0; i < count; i++) {
+            qemu_cfg_e820_load_next(&entry);
+            add_e820(entry.address, entry.length, entry.type);
+        }
+    } else if (kvm_para_available()) {
+        // Backwards compatibility - provide hard coded range.
         // 4 pages before the bios, 3 pages for vmx tss pages, the
         // other page for EPT real mode pagetable
         add_e820(0xfffbc000, 4*4096, E820_RESERVED);
+    }
 
     dprintf(1, "Ram Size=0x%08x (0x%08x%08x high)\n"
             , RamSize, (u32)(RamSizeOver4G >> 32), (u32)RamSizeOver4G);
@@ -161,6 +162,21 @@ init_bios_tables(void)
     acpi_bios_init();
 }
 
+// Initialize hardware devices
+static void
+init_hw(void)
+{
+    usb_setup();
+    ps2port_setup();
+    lpt_setup();
+    serial_setup();
+
+    floppy_setup();
+    ata_setup();
+    ramdisk_setup();
+    virtio_blk_setup();
+}
+
 // Main setup code.
 static void
 post(void)
@@ -169,6 +185,7 @@ post(void)
     init_ivt();
     init_bda();
     memmap_setup();
+    qemu_cfg_port_probe();
     ram_probe();
     malloc_setup();
     thread_setup();
@@ -178,16 +195,25 @@ post(void)
     timer_setup();
     mathcp_setup();
 
-    // Initialize smp
-    qemu_cfg_port_probe();
+    // Initialize mtrr
     smp_probe_setup();
     mtrr_setup();
-    smp_probe();
 
     // Initialize pci
     pci_setup();
     smm_init();
 
+    // Initialize internal tables
+    boot_setup();
+    drive_setup();
+
+    // Start hardware initialization (if optionrom threading)
+    if (CONFIG_THREADS && CONFIG_THREAD_OPTIONROMS)
+        init_hw();
+
+    // Find and initialize other cpus
+    smp_probe();
+
     // Setup interfaces that option roms may need
     bios32_setup();
     pmm_setup();
@@ -196,39 +222,23 @@ post(void)
     mouse_setup();
     init_bios_tables();
 
-    // Run vga option rom (if running synchronously)
-    if (!CONFIG_THREADS || !CONFIG_THREAD_OPTIONROMS)
-        vga_setup();
-
-    // Initialize hardware devices
-    usb_setup();
-    ps2port_setup();
-    lpt_setup();
-    serial_setup();
-
-    boot_setup();
-    drive_setup();
-    cdemu_setup();
-    floppy_setup();
-    ata_setup();
-    ramdisk_setup();
+    // Run vga option rom
+    vga_setup();
 
-    // Run option roms
-    if (CONFIG_THREADS && CONFIG_THREAD_OPTIONROMS) {
-        // Run option roms while hw init still in progress.
-        vga_setup();
-        optionrom_setup();
+    // Do hardware initialization (if running synchronously)
+    if (!CONFIG_THREADS || !CONFIG_THREAD_OPTIONROMS) {
+        init_hw();
         wait_threads();
-    } else {
-        // Wait for hw init to finish and run non-vga option roms.
-        wait_threads();
-        optionrom_setup();
     }
 
+    // Run option roms
+    optionrom_setup();
+
     // Run BCVs and show optional boot menu
     boot_prep();
 
     // Finalize data structures before boot
+    cdemu_setup();
     pmm_finalize();
     malloc_finalize();
     memmap_finalize();