--- qemu/roms/seabios/src/post.c	2018/04/24 18:58:52	1.1.1.5
+++ qemu/roms/seabios/src/post.c	2018/04/24 19:43:44	1.1.1.7
@@ -23,8 +23,10 @@
 #include "usb.h" // usb_setup
 #include "smbios.h" // smbios_init
 #include "paravirt.h" // qemu_cfg_port_probe
+#include "xen.h" // xen_probe_hvm_info
 #include "ps2port.h" // ps2port_setup
 #include "virtio-blk.h" // virtio_blk_setup
+#include "virtio-scsi.h" // virtio_scsi_setup
 
 
 /****************************************************************
@@ -101,6 +103,8 @@ ram_probe(void)
     dprintf(3, "Find memory size\n");
     if (CONFIG_COREBOOT) {
         coreboot_setup();
+    } else if (usingXen()) {
+        xen_setup();
     } else {
         // On emulators, get memory size from nvram.
         u32 rs = ((inb_cmos(CMOS_MEM_EXTMEM2_LOW) << 16)
@@ -147,8 +151,7 @@ ram_probe(void)
         add_e820(0xfffbc000, 4*4096, E820_RESERVED);
     }
 
-    dprintf(1, "Ram Size=0x%08x (0x%08x%08x high)\n"
-            , RamSize, (u32)(RamSizeOver4G >> 32), (u32)RamSizeOver4G);
+    dprintf(1, "Ram Size=0x%08x (0x%016llx high)\n", RamSize, RamSizeOver4G);
 }
 
 static void
@@ -158,6 +161,10 @@ init_bios_tables(void)
         coreboot_copy_biostable();
         return;
     }
+    if (usingXen()) {
+        xen_copy_biostables();
+        return;
+    }
 
     create_pirtable();
 
@@ -183,6 +190,7 @@ init_hw(void)
     cbfs_payload_setup();
     ramdisk_setup();
     virtio_blk_setup();
+    virtio_scsi_setup();
 }
 
 // Begin the boot process by invoking an int0x19 in 16bit mode.
@@ -203,6 +211,9 @@ startBoot(void)
 static void
 maininit(void)
 {
+    // Running at new code address - do code relocation fixups
+    malloc_fixupreloc();
+
     // Setup ivt/bda/ebda
     init_ivt();
     init_bda();
@@ -217,9 +228,11 @@ maininit(void)
 
     // Initialize pci
     pci_setup();
-    pci_path_setup();
     smm_init();
 
+    // Setup Xen hypercalls
+    xen_init_hypercalls();
+
     // Initialize internal tables
     boot_setup();
 
@@ -271,7 +284,7 @@ maininit(void)
 
 
 /****************************************************************
- * Code relocation
+ * POST entry and code relocation
  ****************************************************************/
 
 // Update given relocs for the code at 'dest' with a given 'delta'
@@ -283,8 +296,7 @@ updateRelocs(void *dest, u32 *rstart, u3
         *((u32*)(dest + *reloc)) += delta;
 }
 
-// Start of Power On Self Test - the BIOS initilization.  This
-// function sets up for and attempts relocation of the init code.
+// Relocate init code and then call maininit() at new address.
 static void
 reloc_init(void)
 {
@@ -322,68 +334,45 @@ reloc_init(void)
     func();
 }
 
-// Start of Power On Self Test (POST) - the BIOS initilization phase.
-// This function sets up for and attempts relocation of the init code.
+// Setup for code relocation and then call reloc_init
 void VISIBLE32INIT
-post(void)
+dopost(void)
 {
+    HaveRunPost = 1;
+
     // Detect ram and setup internal malloc.
     qemu_cfg_port_probe();
     ram_probe();
     malloc_setup();
 
+    // Relocate initialization code and call maininit().
     reloc_init();
 }
 
-
-/****************************************************************
- * POST entry point
- ****************************************************************/
-
-static int HaveRunPost;
-
-// Attempt to invoke a hard-reboot.
-static void
-tryReboot(void)
+// Entry point for Power On Self Test (POST) - the BIOS initilization
+// phase.  This function makes the memory at 0xc0000-0xfffff
+// read/writable and then calls dopost().
+void VISIBLE32FLAT
+handle_post(void)
 {
-    dprintf(1, "Attempting a hard reboot\n");
-
-    // Setup for reset on qemu.
-    if (! CONFIG_COREBOOT) {
-        qemu_prep_reset();
-        if (HaveRunPost)
-            apm_shutdown();
-    }
-
-    // Try keyboard controller reboot.
-    i8042_reboot();
-
-    // Try PCI 0xcf9 reboot
-    pci_reboot();
+    debug_serial_setup();
+    dprintf(1, "Start bios (version %s)\n", VERSION);
 
-    // Try triple fault
-    asm volatile("int3");
+    // Enable CPU caching
+    setcr0(getcr0() & ~(CR0_CD|CR0_NW));
 
-    panic("Could not reboot");
-}
+    // Clear CMOS reboot flag.
+    outb_cmos(0, CMOS_RESET_CODE);
 
-// 32-bit entry point.
-void VISIBLE32FLAT
-_start(void)
-{
+    // Make sure legacy DMA isn't running.
     init_dma();
 
-    debug_serial_setup();
-    dprintf(1, "Start bios (version %s)\n", VERSION);
-
-    if (HaveRunPost)
-        // This is a soft reboot - invoke a hard reboot.
-        tryReboot();
+    // Check if we are running under Xen.
+    xen_probe();
 
     // Allow writes to modify bios area (0xf0000)
     make_bios_writable();
-    HaveRunPost = 1;
 
-    // Perform main setup code.
-    post();
+    // Now that memory is read/writable - start post process.
+    dopost();
 }