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1.1 root 1: // Bochs VGA interface to extended "VBE" modes
2: //
3: // Copyright (C) 2012 Kevin O'Connor <[email protected]>
4: // Copyright (C) 2011 Julian Pidancet <[email protected]>
5: // Copyright (C) 2002 Jeroen Janssen
6: //
7: // This file may be distributed under the terms of the GNU LGPLv3 license.
8:
9: #include "vgabios.h" // struct vbe_modeinfo
10: #include "vbe.h" // VBE_CAPABILITY_8BIT_DAC
11: #include "bochsvga.h" // bochsvga_set_mode
12: #include "util.h" // dprintf
13: #include "config.h" // CONFIG_*
14: #include "biosvar.h" // GET_GLOBAL
15: #include "stdvga.h" // VGAREG_SEQU_ADDRESS
16: #include "pci.h" // pci_config_readl
17: #include "pci_regs.h" // PCI_BASE_ADDRESS_0
18:
19:
20: /****************************************************************
21: * Mode tables
22: ****************************************************************/
23:
24: static struct bochsvga_mode
25: {
26: u16 mode;
27: struct vgamode_s info;
28: } bochsvga_modes[] VAR16 = {
29: /* standard modes */
30: { 0x100, { MM_PACKED, 640, 400, 8, 8, 16, SEG_GRAPH } },
31: { 0x101, { MM_PACKED, 640, 480, 8, 8, 16, SEG_GRAPH } },
32: { 0x102, { MM_PLANAR, 800, 600, 4, 8, 16, SEG_GRAPH } },
33: { 0x103, { MM_PACKED, 800, 600, 8, 8, 16, SEG_GRAPH } },
34: { 0x104, { MM_PLANAR, 1024, 768, 4, 8, 16, SEG_GRAPH } },
35: { 0x105, { MM_PACKED, 1024, 768, 8, 8, 16, SEG_GRAPH } },
36: { 0x106, { MM_PLANAR, 1280, 1024, 4, 8, 16, SEG_GRAPH } },
37: { 0x107, { MM_PACKED, 1280, 1024, 8, 8, 16, SEG_GRAPH } },
38: { 0x10D, { MM_DIRECT, 320, 200, 15, 8, 16, SEG_GRAPH } },
39: { 0x10E, { MM_DIRECT, 320, 200, 16, 8, 16, SEG_GRAPH } },
40: { 0x10F, { MM_DIRECT, 320, 200, 24, 8, 16, SEG_GRAPH } },
41: { 0x110, { MM_DIRECT, 640, 480, 15, 8, 16, SEG_GRAPH } },
42: { 0x111, { MM_DIRECT, 640, 480, 16, 8, 16, SEG_GRAPH } },
43: { 0x112, { MM_DIRECT, 640, 480, 24, 8, 16, SEG_GRAPH } },
44: { 0x113, { MM_DIRECT, 800, 600, 15, 8, 16, SEG_GRAPH } },
45: { 0x114, { MM_DIRECT, 800, 600, 16, 8, 16, SEG_GRAPH } },
46: { 0x115, { MM_DIRECT, 800, 600, 24, 8, 16, SEG_GRAPH } },
47: { 0x116, { MM_DIRECT, 1024, 768, 15, 8, 16, SEG_GRAPH } },
48: { 0x117, { MM_DIRECT, 1024, 768, 16, 8, 16, SEG_GRAPH } },
49: { 0x118, { MM_DIRECT, 1024, 768, 24, 8, 16, SEG_GRAPH } },
50: { 0x119, { MM_DIRECT, 1280, 1024, 15, 8, 16, SEG_GRAPH } },
51: { 0x11A, { MM_DIRECT, 1280, 1024, 16, 8, 16, SEG_GRAPH } },
52: { 0x11B, { MM_DIRECT, 1280, 1024, 24, 8, 16, SEG_GRAPH } },
53: { 0x11C, { MM_PACKED, 1600, 1200, 8, 8, 16, SEG_GRAPH } },
54: { 0x11D, { MM_DIRECT, 1600, 1200, 15, 8, 16, SEG_GRAPH } },
55: { 0x11E, { MM_DIRECT, 1600, 1200, 16, 8, 16, SEG_GRAPH } },
56: { 0x11F, { MM_DIRECT, 1600, 1200, 24, 8, 16, SEG_GRAPH } },
57: /* BOCHS modes */
58: { 0x140, { MM_DIRECT, 320, 200, 32, 8, 16, SEG_GRAPH } },
59: { 0x141, { MM_DIRECT, 640, 400, 32, 8, 16, SEG_GRAPH } },
60: { 0x142, { MM_DIRECT, 640, 480, 32, 8, 16, SEG_GRAPH } },
61: { 0x143, { MM_DIRECT, 800, 600, 32, 8, 16, SEG_GRAPH } },
62: { 0x144, { MM_DIRECT, 1024, 768, 32, 8, 16, SEG_GRAPH } },
63: { 0x145, { MM_DIRECT, 1280, 1024, 32, 8, 16, SEG_GRAPH } },
64: { 0x146, { MM_PACKED, 320, 200, 8, 8, 16, SEG_GRAPH } },
65: { 0x147, { MM_DIRECT, 1600, 1200, 32, 8, 16, SEG_GRAPH } },
66: { 0x148, { MM_PACKED, 1152, 864, 8, 8, 16, SEG_GRAPH } },
67: { 0x149, { MM_DIRECT, 1152, 864, 15, 8, 16, SEG_GRAPH } },
68: { 0x14a, { MM_DIRECT, 1152, 864, 16, 8, 16, SEG_GRAPH } },
69: { 0x14b, { MM_DIRECT, 1152, 864, 24, 8, 16, SEG_GRAPH } },
70: { 0x14c, { MM_DIRECT, 1152, 864, 32, 8, 16, SEG_GRAPH } },
71: { 0x178, { MM_DIRECT, 1280, 800, 16, 8, 16, SEG_GRAPH } },
72: { 0x179, { MM_DIRECT, 1280, 800, 24, 8, 16, SEG_GRAPH } },
73: { 0x17a, { MM_DIRECT, 1280, 800, 32, 8, 16, SEG_GRAPH } },
74: { 0x17b, { MM_DIRECT, 1280, 960, 16, 8, 16, SEG_GRAPH } },
75: { 0x17c, { MM_DIRECT, 1280, 960, 24, 8, 16, SEG_GRAPH } },
76: { 0x17d, { MM_DIRECT, 1280, 960, 32, 8, 16, SEG_GRAPH } },
77: { 0x17e, { MM_DIRECT, 1440, 900, 16, 8, 16, SEG_GRAPH } },
78: { 0x17f, { MM_DIRECT, 1440, 900, 24, 8, 16, SEG_GRAPH } },
79: { 0x180, { MM_DIRECT, 1440, 900, 32, 8, 16, SEG_GRAPH } },
80: { 0x181, { MM_DIRECT, 1400, 1050, 16, 8, 16, SEG_GRAPH } },
81: { 0x182, { MM_DIRECT, 1400, 1050, 24, 8, 16, SEG_GRAPH } },
82: { 0x183, { MM_DIRECT, 1400, 1050, 32, 8, 16, SEG_GRAPH } },
83: { 0x184, { MM_DIRECT, 1680, 1050, 16, 8, 16, SEG_GRAPH } },
84: { 0x185, { MM_DIRECT, 1680, 1050, 24, 8, 16, SEG_GRAPH } },
85: { 0x186, { MM_DIRECT, 1680, 1050, 32, 8, 16, SEG_GRAPH } },
86: { 0x187, { MM_DIRECT, 1920, 1200, 16, 8, 16, SEG_GRAPH } },
87: { 0x188, { MM_DIRECT, 1920, 1200, 24, 8, 16, SEG_GRAPH } },
88: { 0x189, { MM_DIRECT, 1920, 1200, 32, 8, 16, SEG_GRAPH } },
89: { 0x18a, { MM_DIRECT, 2560, 1600, 16, 8, 16, SEG_GRAPH } },
90: { 0x18b, { MM_DIRECT, 2560, 1600, 24, 8, 16, SEG_GRAPH } },
91: { 0x18c, { MM_DIRECT, 2560, 1600, 32, 8, 16, SEG_GRAPH } },
92: };
93:
94: static int is_bochsvga_mode(struct vgamode_s *vmode_g)
95: {
96: return (vmode_g >= &bochsvga_modes[0].info
97: && vmode_g <= &bochsvga_modes[ARRAY_SIZE(bochsvga_modes)-1].info);
98: }
99:
100: struct vgamode_s *bochsvga_find_mode(int mode)
101: {
102: struct bochsvga_mode *m = bochsvga_modes;
103: for (; m < &bochsvga_modes[ARRAY_SIZE(bochsvga_modes)]; m++)
104: if (GET_GLOBAL(m->mode) == mode)
105: return &m->info;
106: return stdvga_find_mode(mode);
107: }
108:
109: void
110: bochsvga_list_modes(u16 seg, u16 *dest, u16 *last)
111: {
112: struct bochsvga_mode *m = bochsvga_modes;
113: for (; m < &bochsvga_modes[ARRAY_SIZE(bochsvga_modes)] && dest<last; m++) {
114: u16 mode = GET_GLOBAL(m->mode);
115: if (mode == 0xffff)
116: continue;
117: SET_FARVAR(seg, *dest, mode);
118: dest++;
119: }
120: stdvga_list_modes(seg, dest, last);
121: }
122:
123:
124: /****************************************************************
125: * Helper functions
126: ****************************************************************/
127:
128: int
129: bochsvga_get_window(struct vgamode_s *vmode_g, int window)
130: {
131: if (window != 0)
132: return -1;
133: return dispi_read(VBE_DISPI_INDEX_BANK);
134: }
135:
136: int
137: bochsvga_set_window(struct vgamode_s *vmode_g, int window, int val)
138: {
139: if (window != 0)
140: return -1;
141: dispi_write(VBE_DISPI_INDEX_BANK, val);
142: if (dispi_read(VBE_DISPI_INDEX_BANK) != val)
143: return -1;
144: return 0;
145: }
146:
147: int
148: bochsvga_get_linelength(struct vgamode_s *vmode_g)
149: {
150: return dispi_read(VBE_DISPI_INDEX_VIRT_WIDTH) * vga_bpp(vmode_g) / 8;
151: }
152:
153: int
154: bochsvga_set_linelength(struct vgamode_s *vmode_g, int val)
155: {
156: stdvga_set_linelength(vmode_g, val);
157: int pixels = (val * 8) / vga_bpp(vmode_g);
158: dispi_write(VBE_DISPI_INDEX_VIRT_WIDTH, pixels);
159: return 0;
160: }
161:
162: int
163: bochsvga_get_displaystart(struct vgamode_s *vmode_g)
164: {
165: int bpp = vga_bpp(vmode_g);
166: int linelength = dispi_read(VBE_DISPI_INDEX_VIRT_WIDTH) * bpp / 8;
167: int x = dispi_read(VBE_DISPI_INDEX_X_OFFSET);
168: int y = dispi_read(VBE_DISPI_INDEX_Y_OFFSET);
169: return x * bpp / 8 + linelength * y;
170: }
171:
172: int
173: bochsvga_set_displaystart(struct vgamode_s *vmode_g, int val)
174: {
175: stdvga_set_displaystart(vmode_g, val);
176: int bpp = vga_bpp(vmode_g);
177: int linelength = dispi_read(VBE_DISPI_INDEX_VIRT_WIDTH) * bpp / 8;
178: dispi_write(VBE_DISPI_INDEX_X_OFFSET, (val % linelength) * 8 / bpp);
179: dispi_write(VBE_DISPI_INDEX_Y_OFFSET, val / linelength);
180: return 0;
181: }
182:
183: int
184: bochsvga_get_dacformat(struct vgamode_s *vmode_g)
185: {
186: u16 en = dispi_read(VBE_DISPI_INDEX_ENABLE);
187: return (en & VBE_DISPI_8BIT_DAC) ? 8 : 6;
188: }
189:
190: int
191: bochsvga_set_dacformat(struct vgamode_s *vmode_g, int val)
192: {
193: u16 en = dispi_read(VBE_DISPI_INDEX_ENABLE);
194: if (val == 6)
195: en &= ~VBE_DISPI_8BIT_DAC;
196: else if (val == 8)
197: en |= VBE_DISPI_8BIT_DAC;
198: else
199: return -1;
200: dispi_write(VBE_DISPI_INDEX_ENABLE, en);
201: return 0;
202: }
203:
204: int
205: bochsvga_size_state(int states)
206: {
207: int size = stdvga_size_state(states);
208: if (size < 0)
209: return size;
210: if (states & 8)
211: size += (VBE_DISPI_INDEX_Y_OFFSET-VBE_DISPI_INDEX_XRES+1)*sizeof(u16);
212: return size;
213: }
214:
215: int
216: bochsvga_save_state(u16 seg, void *data, int states)
217: {
218: int ret = stdvga_save_state(seg, data, states);
219: if (ret < 0)
220: return ret;
221:
222: if (!(states & 8))
223: return 0;
224:
225: u16 *info = (data + stdvga_size_state(states));
226: u16 en = dispi_read(VBE_DISPI_INDEX_ENABLE);
227: SET_FARVAR(seg, *info, en);
228: info++;
229: if (!(en & VBE_DISPI_ENABLED))
230: return 0;
231: int i;
232: for (i = VBE_DISPI_INDEX_XRES; i <= VBE_DISPI_INDEX_Y_OFFSET; i++)
233: if (i != VBE_DISPI_INDEX_ENABLE) {
234: u16 v = dispi_read(i);
235: SET_FARVAR(seg, *info, v);
236: info++;
237: }
238: return 0;
239: }
240:
241: int
242: bochsvga_restore_state(u16 seg, void *data, int states)
243: {
244: int ret = stdvga_restore_state(seg, data, states);
245: if (ret < 0)
246: return ret;
247:
248: if (!(states & 8))
249: return 0;
250:
251: u16 *info = (data + stdvga_size_state(states));
252: u16 en = GET_FARVAR(seg, *info);
253: info++;
254: if (!(en & VBE_DISPI_ENABLED)) {
255: dispi_write(VBE_DISPI_INDEX_ENABLE, en);
256: return 0;
257: }
258: int i;
259: for (i = VBE_DISPI_INDEX_XRES; i <= VBE_DISPI_INDEX_Y_OFFSET; i++)
260: if (i == VBE_DISPI_INDEX_ENABLE) {
261: dispi_write(i, en);
262: } else {
263: dispi_write(i, GET_FARVAR(seg, *info));
264: info++;
265: }
266: return 0;
267: }
268:
269:
270: /****************************************************************
271: * Mode setting
272: ****************************************************************/
273:
274: int
275: bochsvga_set_mode(struct vgamode_s *vmode_g, int flags)
276: {
277: dispi_write(VBE_DISPI_INDEX_ENABLE, VBE_DISPI_DISABLED);
278: if (! is_bochsvga_mode(vmode_g))
279: return stdvga_set_mode(vmode_g, flags);
280:
281: u8 depth = GET_GLOBAL(vmode_g->depth);
282: if (depth == 4)
283: stdvga_set_mode(stdvga_find_mode(0x6a), 0);
284: if (depth == 8)
285: // XXX load_dac_palette(3);
286: ;
287:
288: dispi_write(VBE_DISPI_INDEX_BPP, depth);
289: u16 width = GET_GLOBAL(vmode_g->width);
290: u16 height = GET_GLOBAL(vmode_g->height);
291: dispi_write(VBE_DISPI_INDEX_XRES, width);
292: dispi_write(VBE_DISPI_INDEX_YRES, height);
293: dispi_write(VBE_DISPI_INDEX_BANK, 0);
294: u16 bf = ((flags & MF_NOCLEARMEM ? VBE_DISPI_NOCLEARMEM : 0)
295: | (flags & MF_LINEARFB ? VBE_DISPI_LFB_ENABLED : 0));
296: dispi_write(VBE_DISPI_INDEX_ENABLE, VBE_DISPI_ENABLED | bf);
297:
298: /* VGA compat setup */
299: u16 crtc_addr = VGAREG_VGA_CRTC_ADDRESS;
300: stdvga_crtc_write(crtc_addr, 0x11, 0x00);
301: stdvga_crtc_write(crtc_addr, 0x01, width / 8 - 1);
302: stdvga_set_linelength(vmode_g, width);
303: stdvga_crtc_write(crtc_addr, 0x12, height - 1);
304: u8 v = 0;
305: if ((height - 1) & 0x0100)
306: v |= 0x02;
307: if ((height - 1) & 0x0200)
308: v |= 0x40;
309: stdvga_crtc_mask(crtc_addr, 0x07, 0x42, v);
310:
311: stdvga_crtc_write(crtc_addr, 0x09, 0x00);
312: stdvga_crtc_mask(crtc_addr, 0x17, 0x00, 0x03);
313: stdvga_attr_mask(0x10, 0x00, 0x01);
314: stdvga_grdc_write(0x06, 0x05);
315: stdvga_sequ_write(0x02, 0x0f);
316: if (depth >= 8) {
317: stdvga_crtc_mask(crtc_addr, 0x14, 0x00, 0x40);
318: stdvga_attr_mask(0x10, 0x00, 0x40);
319: stdvga_sequ_mask(0x04, 0x00, 0x08);
320: stdvga_grdc_mask(0x05, 0x20, 0x40);
321: }
322:
323: return 0;
324: }
325:
326:
327: /****************************************************************
328: * Init
329: ****************************************************************/
330:
331: int
332: bochsvga_init(void)
333: {
334: int ret = stdvga_init();
335: if (ret)
336: return ret;
337:
338: /* Sanity checks */
339: dispi_write(VBE_DISPI_INDEX_ID, VBE_DISPI_ID0);
340: if (dispi_read(VBE_DISPI_INDEX_ID) != VBE_DISPI_ID0) {
341: dprintf(1, "No VBE DISPI interface detected\n");
342: return -1;
343: }
344:
345: dispi_write(VBE_DISPI_INDEX_ID, VBE_DISPI_ID5);
346:
347: if (GET_GLOBAL(HaveRunInit))
348: return 0;
349:
350: u32 lfb_addr = VBE_DISPI_LFB_PHYSICAL_ADDRESS;
351: int bdf = GET_GLOBAL(VgaBDF);
352: if (CONFIG_VGA_PCI && bdf >= 0) {
353: int barid = 0;
354: u32 bar = pci_config_readl(bdf, PCI_BASE_ADDRESS_0);
355: if ((bar & PCI_BASE_ADDRESS_SPACE) != PCI_BASE_ADDRESS_SPACE_MEMORY) {
356: barid = 1;
357: bar = pci_config_readl(bdf, PCI_BASE_ADDRESS_1);
358: }
359: lfb_addr = bar & PCI_BASE_ADDRESS_MEM_MASK;
360: dprintf(1, "VBE DISPI: bdf %02x:%02x.%x, bar %d\n", pci_bdf_to_bus(bdf)
361: , pci_bdf_to_dev(bdf), pci_bdf_to_fn(bdf), barid);
362: }
363:
364: SET_VGA(VBE_framebuffer, lfb_addr);
365: u32 totalmem = dispi_read(VBE_DISPI_INDEX_VIDEO_MEMORY_64K) * 64 * 1024;
366: SET_VGA(VBE_total_memory, totalmem);
367: SET_VGA(VBE_capabilities, VBE_CAPABILITY_8BIT_DAC);
368:
369: dprintf(1, "VBE DISPI: lfb_addr=%x, size %d MB\n",
370: lfb_addr, totalmem >> 20);
371:
372: // Validate modes
373: u16 en = dispi_read(VBE_DISPI_INDEX_ENABLE);
374: dispi_write(VBE_DISPI_INDEX_ENABLE, en | VBE_DISPI_GETCAPS);
375: u16 max_xres = dispi_read(VBE_DISPI_INDEX_XRES);
376: u16 max_bpp = dispi_read(VBE_DISPI_INDEX_BPP);
377: dispi_write(VBE_DISPI_INDEX_ENABLE, en);
378: struct bochsvga_mode *m = bochsvga_modes;
379: for (; m < &bochsvga_modes[ARRAY_SIZE(bochsvga_modes)]; m++) {
380: u16 width = GET_GLOBAL(m->info.width);
381: u16 height = GET_GLOBAL(m->info.height);
382: u8 depth = GET_GLOBAL(m->info.depth);
383: u32 mem = (height * DIV_ROUND_UP(width * vga_bpp(&m->info), 8)
384: * 4 / stdvga_bpp_factor(&m->info));
385:
386: if (width > max_xres || depth > max_bpp || mem > totalmem) {
387: dprintf(1, "Removing mode %x\n", GET_GLOBAL(m->mode));
388: SET_VGA(m->mode, 0xffff);
389: }
390: }
391:
392: return 0;
393: }
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