Annotation of qemu/roms/seabios/vgasrc/vgatables.c, revision 1.1.1.1

1.1       root        1: // Tables used by VGA bios
                      2: //
                      3: // Copyright (C) 2009  Kevin O'Connor <[email protected]>
                      4: // Copyright (C) 2001-2008 the LGPL VGABios developers Team
                      5: //
                      6: // This file may be distributed under the terms of the GNU LGPLv3 license.
                      7: 
                      8: #include "vgatables.h" // struct VideoParamTableEntry_s
                      9: #include "biosvar.h" // GET_GLOBAL
                     10: 
                     11: 
                     12: /****************************************************************
                     13:  * Video parameter table
                     14:  ****************************************************************/
                     15: 
                     16: struct VideoParam_s video_param_table[] VAR16 = {
                     17:     // index=0x00 no mode defined
                     18:     {},
                     19:     // index=0x01 no mode defined
                     20:     {},
                     21:     // index=0x02 no mode defined
                     22:     {},
                     23:     // index=0x03 no mode defined
                     24:     {},
                     25:     // index=0x04 vga mode 0x04
                     26:     { 40, 24, 8, 0x0800,      /* tw, th-1, ch, slength */
                     27:       { 0x09, 0x03, 0x00, 0x02 },    /* sequ_regs */
                     28:       0x63,                      /* miscreg */
                     29:       { 0x2d, 0x27, 0x28, 0x90, 0x2b, 0x80, 0xbf, 0x1f,
                     30:         0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                     31:         0x9c, 0x8e, 0x8f, 0x14, 0x00, 0x96, 0xb9, 0xa2,
                     32:         0xff },                      /* crtc_regs */
                     33:       { 0x00, 0x13, 0x15, 0x17, 0x02, 0x04, 0x06, 0x07,
                     34:         0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
                     35:         0x01, 0x00, 0x03, 0x00 },    /* actl_regs */
                     36:       { 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x0f, 0x0f, 0xff }, /* grdc_regs */
                     37:     },
                     38:     /* index=0x05 vga mode 0x05 */
                     39:     { 40, 24, 8, 0x0800,     /* tw, th-1, ch, slength */
                     40:       { 0x09, 0x03, 0x00, 0x02 },    /* sequ_regs */
                     41:       0x63,                      /* miscreg */
                     42:       { 0x2d, 0x27, 0x28, 0x90, 0x2b, 0x80, 0xbf, 0x1f,
                     43:         0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                     44:         0x9c, 0x8e, 0x8f, 0x14, 0x00, 0x96, 0xb9, 0xa2,
                     45:         0xff },                      /* crtc_regs */
                     46:       { 0x00, 0x13, 0x15, 0x17, 0x02, 0x04, 0x06, 0x07,
                     47:         0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
                     48:         0x01, 0x00, 0x03, 0x00 },    /* actl_regs */
                     49:       { 0x00, 0x00, 0x00, 0x00, 0x00, 0x30, 0x0f, 0x0f, 0xff }, /* grdc_regs */
                     50:     },
                     51:     /* index=0x06 vga mode 0x06 */
                     52:     { 80, 24, 8, 0x1000,     /* tw, th-1, ch, slength */
                     53:       { 0x01, 0x01, 0x00, 0x06 },    /* sequ_regs */
                     54:       0x63,                      /* miscreg */
                     55:       { 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f,
                     56:         0x00, 0xc1, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                     57:         0x9c, 0x8e, 0x8f, 0x28, 0x00, 0x96, 0xb9, 0xc2,
                     58:         0xff },                      /* crtc_regs */
                     59:       { 0x00, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17,
                     60:         0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17, 0x17,
                     61:         0x01, 0x00, 0x01, 0x00 },    /* actl_regs */
                     62:       { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x0d, 0x0f, 0xff }, /* grdc_regs */
                     63:      },
                     64:     /* index=0x07 vga mode 0x07 */
                     65:     { 80, 24, 16, 0x1000,    /* tw, th-1, ch, slength */
                     66:       { 0x00, 0x03, 0x00, 0x02 },    /* sequ_regs */
                     67:       0x66,                      /* miscreg */
                     68:       { 0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
                     69:         0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
                     70:         0x9c, 0x8e, 0x8f, 0x28, 0x0f, 0x96, 0xb9, 0xa3,
                     71:         0xff },                      /* crtc_regs */
                     72:       { 0x00, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
                     73:         0x10, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
                     74:         0x0e, 0x00, 0x0f, 0x08 },    /* actl_regs */
                     75:       { 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0a, 0x0f, 0xff }, /* grdc_regs */
                     76:      },
                     77:     /* index=0x08 no mode defined */
                     78:     {},
                     79:     /* index=0x09 no mode defined */
                     80:     {},
                     81:     /* index=0x0a no mode defined */
                     82:     {},
                     83:     /* index=0x0b no mode defined */
                     84:     {},
                     85:     /* index=0x0c no mode defined */
                     86:     {},
                     87:     /* index=0x0d vga mode 0x0d */
                     88:     { 40, 24, 8, 0x2000,     /* tw, th-1, ch, slength */
                     89:       { 0x09, 0x0f, 0x00, 0x06 },    /* sequ_regs */
                     90:       0x63,                      /* miscreg */
                     91:       { 0x2d, 0x27, 0x28, 0x90, 0x2b, 0x80, 0xbf, 0x1f,
                     92:         0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                     93:         0x9c, 0x8e, 0x8f, 0x14, 0x00, 0x96, 0xb9, 0xe3,
                     94:         0xff },                      /* crtc_regs */
                     95:       { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
                     96:         0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
                     97:         0x01, 0x00, 0x0f, 0x00 },    /* actl_regs */
                     98:       { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff }, /* grdc_regs */
                     99:      },
                    100:     /* index=0x0e vga mode 0x0e */
                    101:     { 80, 24, 8, 0x4000,     /* tw, th-1, ch, slength */
                    102:       { 0x01, 0x0f, 0x00, 0x06 },    /* sequ_regs */
                    103:       0x63,                      /* miscreg */
                    104:       { 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f,
                    105:         0x00, 0xc0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                    106:         0x9c, 0x8e, 0x8f, 0x28, 0x00, 0x96, 0xb9, 0xe3,
                    107:         0xff },                      /* crtc_regs */
                    108:       { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
                    109:         0x10, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, 0x17,
                    110:         0x01, 0x00, 0x0f, 0x00 },    /* actl_regs */
                    111:       { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff }, /* grdc_regs */
                    112:      },
                    113:     /* index=0x0f no mode defined */
                    114:     {},
                    115:     /* index=0x10 no mode defined */
                    116:     {},
                    117:     /* index=0x11 vga mode 0x0f */
                    118:     { 80, 24, 14, 0x8000,    /* tw, th-1, ch, slength */
                    119:       { 0x01, 0x0f, 0x00, 0x06 },    /* sequ_regs */
                    120:       0xa3,                      /* miscreg */
                    121:       { 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f,
                    122:         0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                    123:         0x83, 0x85, 0x5d, 0x28, 0x0f, 0x63, 0xba, 0xe3,
                    124:         0xff },                      /* crtc_regs */
                    125:       { 0x00, 0x08, 0x00, 0x00, 0x18, 0x18, 0x00, 0x00,
                    126:         0x00, 0x08, 0x00, 0x00, 0x00, 0x18, 0x00, 0x00,
                    127:         0x01, 0x00, 0x01, 0x00 },    /* actl_regs */
                    128:       { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff }, /* grdc_regs */
                    129:      },
                    130:     /* index=0x12 vga mode 0x10 */
                    131:     { 80, 24, 14, 0x8000,    /* tw, th-1, ch, slength */
                    132:       { 0x01, 0x0f, 0x00, 0x06 },    /* sequ_regs */
                    133:       0xa3,                      /* miscreg */
                    134:       { 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f,
                    135:         0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                    136:         0x83, 0x85, 0x5d, 0x28, 0x0f, 0x63, 0xba, 0xe3,
                    137:         0xff },                      /* crtc_regs */
                    138:       { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
                    139:         0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
                    140:         0x01, 0x00, 0x0f, 0x00 },    /* actl_regs */
                    141:       { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff }, /* grdc_regs */
                    142:      },
                    143:     /* index=0x13 no mode defined */
                    144:     {},
                    145:     /* index=0x14 no mode defined */
                    146:     {},
                    147:     /* index=0x15 no mode defined */
                    148:     {},
                    149:     /* index=0x16 no mode defined */
                    150:     {},
                    151:     /* index=0x17 vga mode 0x01 */
                    152:     { 40, 24, 16, 0x0800,    /* tw, th-1, ch, slength */
                    153:       { 0x08, 0x03, 0x00, 0x02 },    /* sequ_regs */
                    154:       0x67,                      /* miscreg */
                    155:       { 0x2d, 0x27, 0x28, 0x90, 0x2b, 0xa0, 0xbf, 0x1f,
                    156:         0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
                    157:         0x9c, 0x8e, 0x8f, 0x14, 0x1f, 0x96, 0xb9, 0xa3,
                    158:         0xff },                      /* crtc_regs */
                    159:       { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
                    160:         0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
                    161:         0x0c, 0x00, 0x0f, 0x08 },    /* actl_regs */
                    162:       { 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x0f, 0xff }, /* grdc_regs */
                    163:     },
                    164:     /* index=0x18 vga mode 0x03 */
                    165:     { 80, 24, 16, 0x1000,    /* tw, th-1, ch, slength */
                    166:       { 0x00, 0x03, 0x00, 0x02 },    /* sequ_regs */
                    167:       0x67,                      /* miscreg */
                    168:       { 0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
                    169:         0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
                    170:         0x9c, 0x8e, 0x8f, 0x28, 0x1f, 0x96, 0xb9, 0xa3,
                    171:         0xff },                      /* crtc_regs */
                    172:       { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
                    173:         0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
                    174:         0x0c, 0x00, 0x0f, 0x08 },    /* actl_regs */
                    175:       { 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0e, 0x0f, 0xff }, /* grdc_regs */
                    176:      },
                    177:     /* index=0x19 vga mode 0x07 */
                    178:     { 80, 24, 16, 0x1000,    /* tw, th-1, ch, slength */
                    179:       { 0x00, 0x03, 0x00, 0x02 },    /* sequ_regs */
                    180:       0x66,                      /* miscreg */
                    181:       { 0x5f, 0x4f, 0x50, 0x82, 0x55, 0x81, 0xbf, 0x1f,
                    182:         0x00, 0x4f, 0x0d, 0x0e, 0x00, 0x00, 0x00, 0x00,
                    183:         0x9c, 0x8e, 0x8f, 0x28, 0x0f, 0x96, 0xb9, 0xa3,
                    184:         0xff },                      /* crtc_regs */
                    185:       { 0x00, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08, 0x08,
                    186:         0x10, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18, 0x18,
                    187:         0x0e, 0x00, 0x0f, 0x08 },    /* actl_regs */
                    188:       { 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x0a, 0x0f, 0xff }, /* grdc_regs */
                    189:     },
                    190:     /* index=0x1a vga mode 0x11 */
                    191:     { 80, 29, 16, 0x0000,    /* tw, th-1, ch, slength */
                    192:       { 0x01, 0x0f, 0x00, 0x06 },    /* sequ_regs */
                    193:       0xe3,                      /* miscreg */
                    194:       { 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0x0b, 0x3e,
                    195:         0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                    196:         0xea, 0x8c, 0xdf, 0x28, 0x00, 0xe7, 0x04, 0xe3,
                    197:         0xff },                      /* crtc_regs */
                    198:       { 0x00, 0x3f, 0x00, 0x3f, 0x00, 0x3f, 0x00, 0x3f,
                    199:         0x00, 0x3f, 0x00, 0x3f, 0x00, 0x3f, 0x00, 0x3f,
                    200:         0x01, 0x00, 0x0f, 0x00 },    /* actl_regs */
                    201:       { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff }, /* grdc_regs */
                    202:     },
                    203:     /* index=0x1b vga mode 0x12 */
                    204:     { 80, 29, 16, 0x0000,    /* tw, th-1, ch, slength */
                    205:       { 0x01, 0x0f, 0x00, 0x06 },    /* sequ_regs */
                    206:       0xe3,                      /* miscreg */
                    207:       { 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0x0b, 0x3e,
                    208:         0x00, 0x40, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                    209:         0xea, 0x8c, 0xdf, 0x28, 0x00, 0xe7, 0x04, 0xe3,
                    210:         0xff },                      /* crtc_regs */
                    211:       { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
                    212:         0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
                    213:         0x01, 0x00, 0x0f, 0x00 },    /* actl_regs */
                    214:       { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff }, /* grdc_regs */
                    215:      },
                    216:     /* index=0x1c vga mode 0x13 */
                    217:     { 40, 24, 8, 0x0000,     /* tw, th-1, ch, slength */
                    218:       { 0x01, 0x0f, 0x00, 0x0e },    /* sequ_regs */
                    219:       0x63,                      /* miscreg */
                    220:       { 0x5f, 0x4f, 0x50, 0x82, 0x54, 0x80, 0xbf, 0x1f,
                    221:         0x00, 0x41, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                    222:         0x9c, 0x8e, 0x8f, 0x28, 0x40, 0x96, 0xb9, 0xa3,
                    223:         0xff },                      /* crtc_regs */
                    224:       { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07,
                    225:         0x08, 0x09, 0x0a, 0x0b, 0x0c, 0x0d, 0x0e, 0x0f,
                    226:         0x41, 0x00, 0x0f, 0x00 },    /* actl_regs */
                    227:       { 0x00, 0x00, 0x00, 0x00, 0x00, 0x40, 0x05, 0x0f, 0xff }, /* grdc_regs */
                    228:      },
                    229:     /* index=0x1d vga mode 0x6a */
                    230:     { 100, 36, 16, 0x0000,   /* tw, th-1, ch, slength */
                    231:       { 0x01, 0x0f, 0x00, 0x06 },    /* sequ_regs */
                    232:       0xe3,                      /* miscreg */
                    233:       { 0x7f, 0x63, 0x63, 0x83, 0x6b, 0x1b, 0x72, 0xf0,
                    234:         0x00, 0x60, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
                    235:         0x59, 0x8d, 0x57, 0x32, 0x00, 0x57, 0x73, 0xe3,
                    236:         0xff },                      /* crtc_regs */
                    237:       { 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x14, 0x07,
                    238:         0x38, 0x39, 0x3a, 0x3b, 0x3c, 0x3d, 0x3e, 0x3f,
                    239:         0x01, 0x00, 0x0f, 0x00 },    /* actl_regs */
                    240:       { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x05, 0x0f, 0xff }, /* grdc_regs */
                    241:      },
                    242: };
                    243: 
                    244: 
                    245: /****************************************************************
                    246:  * Palette definitions
                    247:  ****************************************************************/
                    248: 
                    249: /* Mono */
                    250: static u8 palette0[] VAR16 = {
                    251:   0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00,
                    252:   0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00,
                    253:   0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
                    254:   0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
                    255:   0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
                    256:   0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
                    257:   0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f,
                    258:   0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f,
                    259:   0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00,
                    260:   0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00,
                    261:   0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
                    262:   0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
                    263:   0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
                    264:   0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a, 0x2a,0x2a,0x2a,
                    265:   0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f,
                    266:   0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f, 0x3f,0x3f,0x3f
                    267: };
                    268: 
                    269: static u8 palette1[] VAR16 = {
                    270:   0x00,0x00,0x00, 0x00,0x00,0x2a, 0x00,0x2a,0x00, 0x00,0x2a,0x2a,
                    271:   0x2a,0x00,0x00, 0x2a,0x00,0x2a, 0x2a,0x15,0x00, 0x2a,0x2a,0x2a,
                    272:   0x00,0x00,0x00, 0x00,0x00,0x2a, 0x00,0x2a,0x00, 0x00,0x2a,0x2a,
                    273:   0x2a,0x00,0x00, 0x2a,0x00,0x2a, 0x2a,0x15,0x00, 0x2a,0x2a,0x2a,
                    274:   0x15,0x15,0x15, 0x15,0x15,0x3f, 0x15,0x3f,0x15, 0x15,0x3f,0x3f,
                    275:   0x3f,0x15,0x15, 0x3f,0x15,0x3f, 0x3f,0x3f,0x15, 0x3f,0x3f,0x3f,
                    276:   0x15,0x15,0x15, 0x15,0x15,0x3f, 0x15,0x3f,0x15, 0x15,0x3f,0x3f,
                    277:   0x3f,0x15,0x15, 0x3f,0x15,0x3f, 0x3f,0x3f,0x15, 0x3f,0x3f,0x3f,
                    278:   0x00,0x00,0x00, 0x00,0x00,0x2a, 0x00,0x2a,0x00, 0x00,0x2a,0x2a,
                    279:   0x2a,0x00,0x00, 0x2a,0x00,0x2a, 0x2a,0x15,0x00, 0x2a,0x2a,0x2a,
                    280:   0x00,0x00,0x00, 0x00,0x00,0x2a, 0x00,0x2a,0x00, 0x00,0x2a,0x2a,
                    281:   0x2a,0x00,0x00, 0x2a,0x00,0x2a, 0x2a,0x15,0x00, 0x2a,0x2a,0x2a,
                    282:   0x15,0x15,0x15, 0x15,0x15,0x3f, 0x15,0x3f,0x15, 0x15,0x3f,0x3f,
                    283:   0x3f,0x15,0x15, 0x3f,0x15,0x3f, 0x3f,0x3f,0x15, 0x3f,0x3f,0x3f,
                    284:   0x15,0x15,0x15, 0x15,0x15,0x3f, 0x15,0x3f,0x15, 0x15,0x3f,0x3f,
                    285:   0x3f,0x15,0x15, 0x3f,0x15,0x3f, 0x3f,0x3f,0x15, 0x3f,0x3f,0x3f
                    286: };
                    287: 
                    288: static u8 palette2[] VAR16 = {
                    289:   0x00,0x00,0x00, 0x00,0x00,0x2a, 0x00,0x2a,0x00, 0x00,0x2a,0x2a,
                    290:   0x2a,0x00,0x00, 0x2a,0x00,0x2a, 0x2a,0x2a,0x00, 0x2a,0x2a,0x2a,
                    291:   0x00,0x00,0x15, 0x00,0x00,0x3f, 0x00,0x2a,0x15, 0x00,0x2a,0x3f,
                    292:   0x2a,0x00,0x15, 0x2a,0x00,0x3f, 0x2a,0x2a,0x15, 0x2a,0x2a,0x3f,
                    293:   0x00,0x15,0x00, 0x00,0x15,0x2a, 0x00,0x3f,0x00, 0x00,0x3f,0x2a,
                    294:   0x2a,0x15,0x00, 0x2a,0x15,0x2a, 0x2a,0x3f,0x00, 0x2a,0x3f,0x2a,
                    295:   0x00,0x15,0x15, 0x00,0x15,0x3f, 0x00,0x3f,0x15, 0x00,0x3f,0x3f,
                    296:   0x2a,0x15,0x15, 0x2a,0x15,0x3f, 0x2a,0x3f,0x15, 0x2a,0x3f,0x3f,
                    297:   0x15,0x00,0x00, 0x15,0x00,0x2a, 0x15,0x2a,0x00, 0x15,0x2a,0x2a,
                    298:   0x3f,0x00,0x00, 0x3f,0x00,0x2a, 0x3f,0x2a,0x00, 0x3f,0x2a,0x2a,
                    299:   0x15,0x00,0x15, 0x15,0x00,0x3f, 0x15,0x2a,0x15, 0x15,0x2a,0x3f,
                    300:   0x3f,0x00,0x15, 0x3f,0x00,0x3f, 0x3f,0x2a,0x15, 0x3f,0x2a,0x3f,
                    301:   0x15,0x15,0x00, 0x15,0x15,0x2a, 0x15,0x3f,0x00, 0x15,0x3f,0x2a,
                    302:   0x3f,0x15,0x00, 0x3f,0x15,0x2a, 0x3f,0x3f,0x00, 0x3f,0x3f,0x2a,
                    303:   0x15,0x15,0x15, 0x15,0x15,0x3f, 0x15,0x3f,0x15, 0x15,0x3f,0x3f,
                    304:   0x3f,0x15,0x15, 0x3f,0x15,0x3f, 0x3f,0x3f,0x15, 0x3f,0x3f,0x3f
                    305: };
                    306: 
                    307: static u8 palette3[] VAR16 = {
                    308:   0x00,0x00,0x00, 0x00,0x00,0x2a, 0x00,0x2a,0x00, 0x00,0x2a,0x2a,
                    309:   0x2a,0x00,0x00, 0x2a,0x00,0x2a, 0x2a,0x15,0x00, 0x2a,0x2a,0x2a,
                    310:   0x15,0x15,0x15, 0x15,0x15,0x3f, 0x15,0x3f,0x15, 0x15,0x3f,0x3f,
                    311:   0x3f,0x15,0x15, 0x3f,0x15,0x3f, 0x3f,0x3f,0x15, 0x3f,0x3f,0x3f,
                    312:   0x00,0x00,0x00, 0x05,0x05,0x05, 0x08,0x08,0x08, 0x0b,0x0b,0x0b,
                    313:   0x0e,0x0e,0x0e, 0x11,0x11,0x11, 0x14,0x14,0x14, 0x18,0x18,0x18,
                    314:   0x1c,0x1c,0x1c, 0x20,0x20,0x20, 0x24,0x24,0x24, 0x28,0x28,0x28,
                    315:   0x2d,0x2d,0x2d, 0x32,0x32,0x32, 0x38,0x38,0x38, 0x3f,0x3f,0x3f,
                    316:   0x00,0x00,0x3f, 0x10,0x00,0x3f, 0x1f,0x00,0x3f, 0x2f,0x00,0x3f,
                    317:   0x3f,0x00,0x3f, 0x3f,0x00,0x2f, 0x3f,0x00,0x1f, 0x3f,0x00,0x10,
                    318:   0x3f,0x00,0x00, 0x3f,0x10,0x00, 0x3f,0x1f,0x00, 0x3f,0x2f,0x00,
                    319:   0x3f,0x3f,0x00, 0x2f,0x3f,0x00, 0x1f,0x3f,0x00, 0x10,0x3f,0x00,
                    320:   0x00,0x3f,0x00, 0x00,0x3f,0x10, 0x00,0x3f,0x1f, 0x00,0x3f,0x2f,
                    321:   0x00,0x3f,0x3f, 0x00,0x2f,0x3f, 0x00,0x1f,0x3f, 0x00,0x10,0x3f,
                    322:   0x1f,0x1f,0x3f, 0x27,0x1f,0x3f, 0x2f,0x1f,0x3f, 0x37,0x1f,0x3f,
                    323:   0x3f,0x1f,0x3f, 0x3f,0x1f,0x37, 0x3f,0x1f,0x2f, 0x3f,0x1f,0x27,
                    324: 
                    325:   0x3f,0x1f,0x1f, 0x3f,0x27,0x1f, 0x3f,0x2f,0x1f, 0x3f,0x37,0x1f,
                    326:   0x3f,0x3f,0x1f, 0x37,0x3f,0x1f, 0x2f,0x3f,0x1f, 0x27,0x3f,0x1f,
                    327:   0x1f,0x3f,0x1f, 0x1f,0x3f,0x27, 0x1f,0x3f,0x2f, 0x1f,0x3f,0x37,
                    328:   0x1f,0x3f,0x3f, 0x1f,0x37,0x3f, 0x1f,0x2f,0x3f, 0x1f,0x27,0x3f,
                    329:   0x2d,0x2d,0x3f, 0x31,0x2d,0x3f, 0x36,0x2d,0x3f, 0x3a,0x2d,0x3f,
                    330:   0x3f,0x2d,0x3f, 0x3f,0x2d,0x3a, 0x3f,0x2d,0x36, 0x3f,0x2d,0x31,
                    331:   0x3f,0x2d,0x2d, 0x3f,0x31,0x2d, 0x3f,0x36,0x2d, 0x3f,0x3a,0x2d,
                    332:   0x3f,0x3f,0x2d, 0x3a,0x3f,0x2d, 0x36,0x3f,0x2d, 0x31,0x3f,0x2d,
                    333:   0x2d,0x3f,0x2d, 0x2d,0x3f,0x31, 0x2d,0x3f,0x36, 0x2d,0x3f,0x3a,
                    334:   0x2d,0x3f,0x3f, 0x2d,0x3a,0x3f, 0x2d,0x36,0x3f, 0x2d,0x31,0x3f,
                    335:   0x00,0x00,0x1c, 0x07,0x00,0x1c, 0x0e,0x00,0x1c, 0x15,0x00,0x1c,
                    336:   0x1c,0x00,0x1c, 0x1c,0x00,0x15, 0x1c,0x00,0x0e, 0x1c,0x00,0x07,
                    337:   0x1c,0x00,0x00, 0x1c,0x07,0x00, 0x1c,0x0e,0x00, 0x1c,0x15,0x00,
                    338:   0x1c,0x1c,0x00, 0x15,0x1c,0x00, 0x0e,0x1c,0x00, 0x07,0x1c,0x00,
                    339:   0x00,0x1c,0x00, 0x00,0x1c,0x07, 0x00,0x1c,0x0e, 0x00,0x1c,0x15,
                    340:   0x00,0x1c,0x1c, 0x00,0x15,0x1c, 0x00,0x0e,0x1c, 0x00,0x07,0x1c,
                    341: 
                    342:   0x0e,0x0e,0x1c, 0x11,0x0e,0x1c, 0x15,0x0e,0x1c, 0x18,0x0e,0x1c,
                    343:   0x1c,0x0e,0x1c, 0x1c,0x0e,0x18, 0x1c,0x0e,0x15, 0x1c,0x0e,0x11,
                    344:   0x1c,0x0e,0x0e, 0x1c,0x11,0x0e, 0x1c,0x15,0x0e, 0x1c,0x18,0x0e,
                    345:   0x1c,0x1c,0x0e, 0x18,0x1c,0x0e, 0x15,0x1c,0x0e, 0x11,0x1c,0x0e,
                    346:   0x0e,0x1c,0x0e, 0x0e,0x1c,0x11, 0x0e,0x1c,0x15, 0x0e,0x1c,0x18,
                    347:   0x0e,0x1c,0x1c, 0x0e,0x18,0x1c, 0x0e,0x15,0x1c, 0x0e,0x11,0x1c,
                    348:   0x14,0x14,0x1c, 0x16,0x14,0x1c, 0x18,0x14,0x1c, 0x1a,0x14,0x1c,
                    349:   0x1c,0x14,0x1c, 0x1c,0x14,0x1a, 0x1c,0x14,0x18, 0x1c,0x14,0x16,
                    350:   0x1c,0x14,0x14, 0x1c,0x16,0x14, 0x1c,0x18,0x14, 0x1c,0x1a,0x14,
                    351:   0x1c,0x1c,0x14, 0x1a,0x1c,0x14, 0x18,0x1c,0x14, 0x16,0x1c,0x14,
                    352:   0x14,0x1c,0x14, 0x14,0x1c,0x16, 0x14,0x1c,0x18, 0x14,0x1c,0x1a,
                    353:   0x14,0x1c,0x1c, 0x14,0x1a,0x1c, 0x14,0x18,0x1c, 0x14,0x16,0x1c,
                    354:   0x00,0x00,0x10, 0x04,0x00,0x10, 0x08,0x00,0x10, 0x0c,0x00,0x10,
                    355:   0x10,0x00,0x10, 0x10,0x00,0x0c, 0x10,0x00,0x08, 0x10,0x00,0x04,
                    356:   0x10,0x00,0x00, 0x10,0x04,0x00, 0x10,0x08,0x00, 0x10,0x0c,0x00,
                    357:   0x10,0x10,0x00, 0x0c,0x10,0x00, 0x08,0x10,0x00, 0x04,0x10,0x00,
                    358: 
                    359:   0x00,0x10,0x00, 0x00,0x10,0x04, 0x00,0x10,0x08, 0x00,0x10,0x0c,
                    360:   0x00,0x10,0x10, 0x00,0x0c,0x10, 0x00,0x08,0x10, 0x00,0x04,0x10,
                    361:   0x08,0x08,0x10, 0x0a,0x08,0x10, 0x0c,0x08,0x10, 0x0e,0x08,0x10,
                    362:   0x10,0x08,0x10, 0x10,0x08,0x0e, 0x10,0x08,0x0c, 0x10,0x08,0x0a,
                    363:   0x10,0x08,0x08, 0x10,0x0a,0x08, 0x10,0x0c,0x08, 0x10,0x0e,0x08,
                    364:   0x10,0x10,0x08, 0x0e,0x10,0x08, 0x0c,0x10,0x08, 0x0a,0x10,0x08,
                    365:   0x08,0x10,0x08, 0x08,0x10,0x0a, 0x08,0x10,0x0c, 0x08,0x10,0x0e,
                    366:   0x08,0x10,0x10, 0x08,0x0e,0x10, 0x08,0x0c,0x10, 0x08,0x0a,0x10,
                    367:   0x0b,0x0b,0x10, 0x0c,0x0b,0x10, 0x0d,0x0b,0x10, 0x0f,0x0b,0x10,
                    368:   0x10,0x0b,0x10, 0x10,0x0b,0x0f, 0x10,0x0b,0x0d, 0x10,0x0b,0x0c,
                    369:   0x10,0x0b,0x0b, 0x10,0x0c,0x0b, 0x10,0x0d,0x0b, 0x10,0x0f,0x0b,
                    370:   0x10,0x10,0x0b, 0x0f,0x10,0x0b, 0x0d,0x10,0x0b, 0x0c,0x10,0x0b,
                    371:   0x0b,0x10,0x0b, 0x0b,0x10,0x0c, 0x0b,0x10,0x0d, 0x0b,0x10,0x0f,
                    372:   0x0b,0x10,0x10, 0x0b,0x0f,0x10, 0x0b,0x0d,0x10, 0x0b,0x0c,0x10,
                    373:   0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00,
                    374:   0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00, 0x00,0x00,0x00
                    375: };
                    376: 
                    377: 
                    378: /****************************************************************
                    379:  * Video mode list
                    380:  ****************************************************************/
                    381: 
                    382: #define PAL(x) x, sizeof(x)
                    383: #define VPARAM(x) &video_param_table[x]
                    384: 
                    385: static struct vgamode_s vga_modes[] VAR16 = {
                    386:     //mode vparam        model bits  sstart     pelm  dac
                    387:     {0x00, VPARAM(0x17), CTEXT,   4, SEG_CTEXT, 0xFF, PAL(palette2)},
                    388:     {0x01, VPARAM(0x17), CTEXT,   4, SEG_CTEXT, 0xFF, PAL(palette2)},
                    389:     {0x02, VPARAM(0x18), CTEXT,   4, SEG_CTEXT, 0xFF, PAL(palette2)},
                    390:     {0x03, VPARAM(0x18), CTEXT,   4, SEG_CTEXT, 0xFF, PAL(palette2)},
                    391:     {0x04, VPARAM(0x04), CGA,     2, SEG_CTEXT, 0xFF, PAL(palette1)},
                    392:     {0x05, VPARAM(0x05), CGA,     2, SEG_CTEXT, 0xFF, PAL(palette1)},
                    393:     {0x06, VPARAM(0x06), CGA,     1, SEG_CTEXT, 0xFF, PAL(palette1)},
                    394:     {0x07, VPARAM(0x07), MTEXT,   4, SEG_MTEXT, 0xFF, PAL(palette0)},
                    395:     {0x0D, VPARAM(0x0d), PLANAR4, 4, SEG_GRAPH, 0xFF, PAL(palette1)},
                    396:     {0x0E, VPARAM(0x0e), PLANAR4, 4, SEG_GRAPH, 0xFF, PAL(palette1)},
                    397:     {0x0F, VPARAM(0x11), PLANAR1, 1, SEG_GRAPH, 0xFF, PAL(palette0)},
                    398:     {0x10, VPARAM(0x12), PLANAR4, 4, SEG_GRAPH, 0xFF, PAL(palette2)},
                    399:     {0x11, VPARAM(0x1a), PLANAR1, 1, SEG_GRAPH, 0xFF, PAL(palette2)},
                    400:     {0x12, VPARAM(0x1b), PLANAR4, 4, SEG_GRAPH, 0xFF, PAL(palette2)},
                    401:     {0x13, VPARAM(0x1c), LINEAR8, 8, SEG_GRAPH, 0xFF, PAL(palette3)},
                    402:     {0x6A, VPARAM(0x1d), PLANAR4, 4, SEG_GRAPH, 0xFF, PAL(palette2)},
                    403: };
                    404: 
                    405: struct vgamode_s *
                    406: find_vga_entry(u8 mode)
                    407: {
                    408:     int i;
                    409:     for (i = 0; i < ARRAY_SIZE(vga_modes); i++) {
                    410:         struct vgamode_s *vmode_g = &vga_modes[i];
                    411:         if (GET_GLOBAL(vmode_g->svgamode) == mode)
                    412:             return vmode_g;
                    413:     }
                    414:     return NULL;
                    415: }
                    416: 
                    417: u16 video_save_pointer_table[14] VAR16;
                    418: 
                    419: 
                    420: /****************************************************************
                    421:  * Static functionality table
                    422:  ****************************************************************/
                    423: 
                    424: u8 static_functionality[0x10] VAR16 = {
                    425:  /* 0 */ 0xff,  // All modes supported #1
                    426:  /* 1 */ 0xe0,  // All modes supported #2
                    427:  /* 2 */ 0x0f,  // All modes supported #3
                    428:  /* 3 */ 0x00, 0x00, 0x00, 0x00,  // reserved
                    429:  /* 7 */ 0x07,  // 200, 350, 400 scan lines
                    430:  /* 8 */ 0x02,  // mamimum number of visible charsets in text mode
                    431:  /* 9 */ 0x08,  // total number of charset blocks in text mode
                    432:  /* a */ 0xe7,  // Change to add new functions
                    433:  /* b */ 0x0c,  // Change to add new functions
                    434:  /* c */ 0x00,  // reserved
                    435:  /* d */ 0x00,  // reserved
                    436:  /* e */ 0x00,  // Change to add new functions
                    437:  /* f */ 0x00   // reserved
                    438: };

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